diff options
author | Paul Walmsley <paul@pwsan.com> | 2010-10-08 13:40:19 -0400 |
---|---|---|
committer | Paul Walmsley <paul@pwsan.com> | 2010-10-08 13:40:19 -0400 |
commit | aa218dafd7b37ba92fcfdd6d5c8d459772f88042 (patch) | |
tree | f2963de6ff263066214530e670249055254db2e3 /arch/arm/plat-omap/common.c | |
parent | d13586574d373ef40acd4725c9a269daa355e412 (diff) |
OMAP: split plat-omap/common.c
Split plat-omap/common.c into three pieces:
1. the 32KiHz sync timer and clocksource code, which now lives in
plat-omap/counter_32k.c;
2. the OMAP2+ common code, which has been moved to mach-omap2/common.c;
3. and the remainder of the OMAP-wide common code, which includes the
deprecated ATAGs code and a deprecated video RAM reservation function.
The primary motivation for doing this is to move the OMAP2+-specific parts
into an OMAP2+-specific file, so that build breakage related to the
System Control Module code can be resolved.
Benoît Cousson <b-cousson@ti.com> suggested a new filename and found
some bugs in the counter_32k.c comments - thanks Benoît.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Diffstat (limited to 'arch/arm/plat-omap/common.c')
-rw-r--r-- | arch/arm/plat-omap/common.c | 275 |
1 files changed, 0 insertions, 275 deletions
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c index cbaf14bbe19..221a675ebba 100644 --- a/arch/arm/plat-omap/common.c +++ b/arch/arm/plat-omap/common.c | |||
@@ -11,38 +11,15 @@ | |||
11 | * it under the terms of the GNU General Public License version 2 as | 11 | * it under the terms of the GNU General Public License version 2 as |
12 | * published by the Free Software Foundation. | 12 | * published by the Free Software Foundation. |
13 | */ | 13 | */ |
14 | #include <linux/module.h> | ||
15 | #include <linux/kernel.h> | 14 | #include <linux/kernel.h> |
16 | #include <linux/init.h> | 15 | #include <linux/init.h> |
17 | #include <linux/delay.h> | ||
18 | #include <linux/console.h> | ||
19 | #include <linux/serial.h> | ||
20 | #include <linux/tty.h> | ||
21 | #include <linux/serial_8250.h> | ||
22 | #include <linux/serial_reg.h> | ||
23 | #include <linux/clk.h> | ||
24 | #include <linux/io.h> | 16 | #include <linux/io.h> |
25 | #include <linux/omapfb.h> | 17 | #include <linux/omapfb.h> |
26 | 18 | ||
27 | #include <mach/hardware.h> | ||
28 | #include <asm/system.h> | ||
29 | #include <asm/pgtable.h> | ||
30 | #include <asm/mach/map.h> | ||
31 | #include <asm/setup.h> | ||
32 | |||
33 | #include <plat/common.h> | 19 | #include <plat/common.h> |
34 | #include <plat/board.h> | 20 | #include <plat/board.h> |
35 | #include <plat/control.h> | ||
36 | #include <plat/mux.h> | ||
37 | #include <plat/fpga.h> | ||
38 | #include <plat/serial.h> | ||
39 | #include <plat/vram.h> | 21 | #include <plat/vram.h> |
40 | 22 | ||
41 | #include <plat/clock.h> | ||
42 | |||
43 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) | ||
44 | # include "../mach-omap2/sdrc.h" | ||
45 | #endif | ||
46 | 23 | ||
47 | #define NO_LENGTH_CHECK 0xffffffff | 24 | #define NO_LENGTH_CHECK 0xffffffff |
48 | 25 | ||
@@ -88,255 +65,3 @@ void __init omap_reserve(void) | |||
88 | omapfb_reserve_sdram_memblock(); | 65 | omapfb_reserve_sdram_memblock(); |
89 | omap_vram_reserve_sdram_memblock(); | 66 | omap_vram_reserve_sdram_memblock(); |
90 | } | 67 | } |
91 | |||
92 | /* | ||
93 | * 32KHz clocksource ... always available, on pretty most chips except | ||
94 | * OMAP 730 and 1510. Other timers could be used as clocksources, with | ||
95 | * higher resolution in free-running counter modes (e.g. 12 MHz xtal), | ||
96 | * but systems won't necessarily want to spend resources that way. | ||
97 | */ | ||
98 | |||
99 | #define OMAP16XX_TIMER_32K_SYNCHRONIZED 0xfffbc410 | ||
100 | |||
101 | #if !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX)) | ||
102 | |||
103 | #include <linux/clocksource.h> | ||
104 | |||
105 | /* | ||
106 | * offset_32k holds the init time counter value. It is then subtracted | ||
107 | * from every counter read to achieve a counter that counts time from the | ||
108 | * kernel boot (needed for sched_clock()). | ||
109 | */ | ||
110 | static u32 offset_32k __read_mostly; | ||
111 | |||
112 | #ifdef CONFIG_ARCH_OMAP16XX | ||
113 | static cycle_t omap16xx_32k_read(struct clocksource *cs) | ||
114 | { | ||
115 | return omap_readl(OMAP16XX_TIMER_32K_SYNCHRONIZED) - offset_32k; | ||
116 | } | ||
117 | #else | ||
118 | #define omap16xx_32k_read NULL | ||
119 | #endif | ||
120 | |||
121 | #ifdef CONFIG_ARCH_OMAP2420 | ||
122 | static cycle_t omap2420_32k_read(struct clocksource *cs) | ||
123 | { | ||
124 | return omap_readl(OMAP2420_32KSYNCT_BASE + 0x10) - offset_32k; | ||
125 | } | ||
126 | #else | ||
127 | #define omap2420_32k_read NULL | ||
128 | #endif | ||
129 | |||
130 | #ifdef CONFIG_ARCH_OMAP2430 | ||
131 | static cycle_t omap2430_32k_read(struct clocksource *cs) | ||
132 | { | ||
133 | return omap_readl(OMAP2430_32KSYNCT_BASE + 0x10) - offset_32k; | ||
134 | } | ||
135 | #else | ||
136 | #define omap2430_32k_read NULL | ||
137 | #endif | ||
138 | |||
139 | #ifdef CONFIG_ARCH_OMAP3 | ||
140 | static cycle_t omap34xx_32k_read(struct clocksource *cs) | ||
141 | { | ||
142 | return omap_readl(OMAP3430_32KSYNCT_BASE + 0x10) - offset_32k; | ||
143 | } | ||
144 | #else | ||
145 | #define omap34xx_32k_read NULL | ||
146 | #endif | ||
147 | |||
148 | #ifdef CONFIG_ARCH_OMAP4 | ||
149 | static cycle_t omap44xx_32k_read(struct clocksource *cs) | ||
150 | { | ||
151 | return omap_readl(OMAP4430_32KSYNCT_BASE + 0x10) - offset_32k; | ||
152 | } | ||
153 | #else | ||
154 | #define omap44xx_32k_read NULL | ||
155 | #endif | ||
156 | |||
157 | /* | ||
158 | * Kernel assumes that sched_clock can be called early but may not have | ||
159 | * things ready yet. | ||
160 | */ | ||
161 | static cycle_t omap_32k_read_dummy(struct clocksource *cs) | ||
162 | { | ||
163 | return 0; | ||
164 | } | ||
165 | |||
166 | static struct clocksource clocksource_32k = { | ||
167 | .name = "32k_counter", | ||
168 | .rating = 250, | ||
169 | .read = omap_32k_read_dummy, | ||
170 | .mask = CLOCKSOURCE_MASK(32), | ||
171 | .shift = 10, | ||
172 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | ||
173 | }; | ||
174 | |||
175 | /* | ||
176 | * Returns current time from boot in nsecs. It's OK for this to wrap | ||
177 | * around for now, as it's just a relative time stamp. | ||
178 | */ | ||
179 | unsigned long long sched_clock(void) | ||
180 | { | ||
181 | return clocksource_cyc2ns(clocksource_32k.read(&clocksource_32k), | ||
182 | clocksource_32k.mult, clocksource_32k.shift); | ||
183 | } | ||
184 | |||
185 | /** | ||
186 | * read_persistent_clock - Return time from a persistent clock. | ||
187 | * | ||
188 | * Reads the time from a source which isn't disabled during PM, the | ||
189 | * 32k sync timer. Convert the cycles elapsed since last read into | ||
190 | * nsecs and adds to a monotonically increasing timespec. | ||
191 | */ | ||
192 | static struct timespec persistent_ts; | ||
193 | static cycles_t cycles, last_cycles; | ||
194 | void read_persistent_clock(struct timespec *ts) | ||
195 | { | ||
196 | unsigned long long nsecs; | ||
197 | cycles_t delta; | ||
198 | struct timespec *tsp = &persistent_ts; | ||
199 | |||
200 | last_cycles = cycles; | ||
201 | cycles = clocksource_32k.read(&clocksource_32k); | ||
202 | delta = cycles - last_cycles; | ||
203 | |||
204 | nsecs = clocksource_cyc2ns(delta, | ||
205 | clocksource_32k.mult, clocksource_32k.shift); | ||
206 | |||
207 | timespec_add_ns(tsp, nsecs); | ||
208 | *ts = *tsp; | ||
209 | } | ||
210 | |||
211 | static int __init omap_init_clocksource_32k(void) | ||
212 | { | ||
213 | static char err[] __initdata = KERN_ERR | ||
214 | "%s: can't register clocksource!\n"; | ||
215 | |||
216 | if (cpu_is_omap16xx() || cpu_class_is_omap2()) { | ||
217 | struct clk *sync_32k_ick; | ||
218 | |||
219 | if (cpu_is_omap16xx()) | ||
220 | clocksource_32k.read = omap16xx_32k_read; | ||
221 | else if (cpu_is_omap2420()) | ||
222 | clocksource_32k.read = omap2420_32k_read; | ||
223 | else if (cpu_is_omap2430()) | ||
224 | clocksource_32k.read = omap2430_32k_read; | ||
225 | else if (cpu_is_omap34xx()) | ||
226 | clocksource_32k.read = omap34xx_32k_read; | ||
227 | else if (cpu_is_omap44xx()) | ||
228 | clocksource_32k.read = omap44xx_32k_read; | ||
229 | else | ||
230 | return -ENODEV; | ||
231 | |||
232 | sync_32k_ick = clk_get(NULL, "omap_32ksync_ick"); | ||
233 | if (sync_32k_ick) | ||
234 | clk_enable(sync_32k_ick); | ||
235 | |||
236 | clocksource_32k.mult = clocksource_hz2mult(32768, | ||
237 | clocksource_32k.shift); | ||
238 | |||
239 | offset_32k = clocksource_32k.read(&clocksource_32k); | ||
240 | |||
241 | if (clocksource_register(&clocksource_32k)) | ||
242 | printk(err, clocksource_32k.name); | ||
243 | } | ||
244 | return 0; | ||
245 | } | ||
246 | arch_initcall(omap_init_clocksource_32k); | ||
247 | |||
248 | #endif /* !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX)) */ | ||
249 | |||
250 | /* Global address base setup code */ | ||
251 | |||
252 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) | ||
253 | |||
254 | static void __init __omap2_set_globals(struct omap_globals *omap2_globals) | ||
255 | { | ||
256 | omap2_set_globals_tap(omap2_globals); | ||
257 | omap2_set_globals_sdrc(omap2_globals); | ||
258 | omap2_set_globals_control(omap2_globals); | ||
259 | omap2_set_globals_prcm(omap2_globals); | ||
260 | } | ||
261 | |||
262 | #endif | ||
263 | |||
264 | #if defined(CONFIG_ARCH_OMAP2420) | ||
265 | |||
266 | static struct omap_globals omap242x_globals = { | ||
267 | .class = OMAP242X_CLASS, | ||
268 | .tap = OMAP2_L4_IO_ADDRESS(0x48014000), | ||
269 | .sdrc = OMAP2420_SDRC_BASE, | ||
270 | .sms = OMAP2420_SMS_BASE, | ||
271 | .ctrl = OMAP242X_CTRL_BASE, | ||
272 | .prm = OMAP2420_PRM_BASE, | ||
273 | .cm = OMAP2420_CM_BASE, | ||
274 | }; | ||
275 | |||
276 | void __init omap2_set_globals_242x(void) | ||
277 | { | ||
278 | __omap2_set_globals(&omap242x_globals); | ||
279 | } | ||
280 | #endif | ||
281 | |||
282 | #if defined(CONFIG_ARCH_OMAP2430) | ||
283 | |||
284 | static struct omap_globals omap243x_globals = { | ||
285 | .class = OMAP243X_CLASS, | ||
286 | .tap = OMAP2_L4_IO_ADDRESS(0x4900a000), | ||
287 | .sdrc = OMAP243X_SDRC_BASE, | ||
288 | .sms = OMAP243X_SMS_BASE, | ||
289 | .ctrl = OMAP243X_CTRL_BASE, | ||
290 | .prm = OMAP2430_PRM_BASE, | ||
291 | .cm = OMAP2430_CM_BASE, | ||
292 | }; | ||
293 | |||
294 | void __init omap2_set_globals_243x(void) | ||
295 | { | ||
296 | __omap2_set_globals(&omap243x_globals); | ||
297 | } | ||
298 | #endif | ||
299 | |||
300 | #if defined(CONFIG_ARCH_OMAP3) | ||
301 | |||
302 | static struct omap_globals omap3_globals = { | ||
303 | .class = OMAP343X_CLASS, | ||
304 | .tap = OMAP2_L4_IO_ADDRESS(0x4830A000), | ||
305 | .sdrc = OMAP343X_SDRC_BASE, | ||
306 | .sms = OMAP343X_SMS_BASE, | ||
307 | .ctrl = OMAP343X_CTRL_BASE, | ||
308 | .prm = OMAP3430_PRM_BASE, | ||
309 | .cm = OMAP3430_CM_BASE, | ||
310 | }; | ||
311 | |||
312 | void __init omap2_set_globals_3xxx(void) | ||
313 | { | ||
314 | __omap2_set_globals(&omap3_globals); | ||
315 | } | ||
316 | |||
317 | void __init omap3_map_io(void) | ||
318 | { | ||
319 | omap2_set_globals_3xxx(); | ||
320 | omap34xx_map_common_io(); | ||
321 | } | ||
322 | #endif | ||
323 | |||
324 | #if defined(CONFIG_ARCH_OMAP4) | ||
325 | static struct omap_globals omap4_globals = { | ||
326 | .class = OMAP443X_CLASS, | ||
327 | .tap = OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE), | ||
328 | .ctrl = OMAP443X_SCM_BASE, | ||
329 | .ctrl_pad = OMAP443X_CTRL_BASE, | ||
330 | .prm = OMAP4430_PRM_BASE, | ||
331 | .cm = OMAP4430_CM_BASE, | ||
332 | .cm2 = OMAP4430_CM2_BASE, | ||
333 | }; | ||
334 | |||
335 | void __init omap2_set_globals_443x(void) | ||
336 | { | ||
337 | omap2_set_globals_tap(&omap4_globals); | ||
338 | omap2_set_globals_control(&omap4_globals); | ||
339 | omap2_set_globals_prcm(&omap4_globals); | ||
340 | } | ||
341 | #endif | ||
342 | |||