diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-10-21 19:42:32 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-10-21 19:42:32 -0400 |
commit | b5153163ed580e00c67bdfecb02b2e3843817b3e (patch) | |
tree | b8c878601f07f5df8f694435857a5f3dcfd75482 /arch/arm/plat-mxc/include/mach/system.h | |
parent | a8cbf22559ceefdcdfac00701e8e6da7518b7e8e (diff) | |
parent | 6451d7783ba5ff24eb1a544eaa6665b890f30466 (diff) |
Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (278 commits)
arm: remove machine_desc.io_pg_offst and .phys_io
arm: use addruart macro to establish debug mappings
arm: return both physical and virtual addresses from addruart
arm/debug: consolidate addruart macros for CONFIG_DEBUG_ICEDCC
ARM: make struct machine_desc definition coherent with its comment
eukrea_mbimxsd-baseboard: Pass the correct GPIO to gpio_free
cpuimx27: fix compile when ULPI is selected
mach-pcm037_eet: fix compile errors
Fixing ethernet driver compilation error for i.MX31 ADS board
cpuimx51: update board support
mx5: add cpuimx51sd module and its baseboard
iomux-mx51: fix GPIO_1_xx 's IOMUX configuration
imx-esdhc: update devices registration
mx51: add resources for SD/MMC on i.MX51
iomux-mx51: fix SD1 and SD2's iomux configuration
clock-mx51: rename CLOCK1 to CLOCK_CCGR for better readability
clock-mx51: factorize clk_set_parent and clk_get_rate
eukrea_mbimxsd: add support for DVI displays
cpuimx25 & cpuimx35: fix OTG port registration in host mode
i.MX31 and i.MX35 : fix errate TLSbo65953 and ENGcm09472
...
Diffstat (limited to 'arch/arm/plat-mxc/include/mach/system.h')
-rw-r--r-- | arch/arm/plat-mxc/include/mach/system.h | 32 |
1 files changed, 29 insertions, 3 deletions
diff --git a/arch/arm/plat-mxc/include/mach/system.h b/arch/arm/plat-mxc/include/mach/system.h index 4acd1143a9b..95be51bfe9a 100644 --- a/arch/arm/plat-mxc/include/mach/system.h +++ b/arch/arm/plat-mxc/include/mach/system.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 1999 ARM Limited | 2 | * Copyright (C) 1999 ARM Limited |
3 | * Copyright (C) 2000 Deep Blue Solutions Ltd | 3 | * Copyright (C) 2000 Deep Blue Solutions Ltd |
4 | * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. | 4 | * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
@@ -28,8 +28,34 @@ static inline void arch_idle(void) | |||
28 | mxc91231_prepare_idle(); | 28 | mxc91231_prepare_idle(); |
29 | } | 29 | } |
30 | #endif | 30 | #endif |
31 | 31 | /* fix i.MX31 errata TLSbo65953 and i.MX35 errata ENGcm09472 */ | |
32 | cpu_do_idle(); | 32 | if (cpu_is_mx31() || cpu_is_mx35()) { |
33 | unsigned long reg = 0; | ||
34 | __asm__ __volatile__( | ||
35 | /* disable I and D cache */ | ||
36 | "mrc p15, 0, %0, c1, c0, 0\n" | ||
37 | "bic %0, %0, #0x00001000\n" | ||
38 | "bic %0, %0, #0x00000004\n" | ||
39 | "mcr p15, 0, %0, c1, c0, 0\n" | ||
40 | /* invalidate I cache */ | ||
41 | "mov %0, #0\n" | ||
42 | "mcr p15, 0, %0, c7, c5, 0\n" | ||
43 | /* clear and invalidate D cache */ | ||
44 | "mov %0, #0\n" | ||
45 | "mcr p15, 0, %0, c7, c14, 0\n" | ||
46 | /* WFI */ | ||
47 | "mov %0, #0\n" | ||
48 | "mcr p15, 0, %0, c7, c0, 4\n" | ||
49 | "nop\n" "nop\n" "nop\n" "nop\n" | ||
50 | "nop\n" "nop\n" "nop\n" | ||
51 | /* enable I and D cache */ | ||
52 | "mrc p15, 0, %0, c1, c0, 0\n" | ||
53 | "orr %0, %0, #0x00001000\n" | ||
54 | "orr %0, %0, #0x00000004\n" | ||
55 | "mcr p15, 0, %0, c1, c0, 0\n" | ||
56 | : "=r" (reg)); | ||
57 | } else | ||
58 | cpu_do_idle(); | ||
33 | } | 59 | } |
34 | 60 | ||
35 | void arch_reset(char mode, const char *cmd); | 61 | void arch_reset(char mode, const char *cmd); |