ARM: imx: dynamically register spi_imx devices (imx25)

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>

1 files changed, 7 insertions, 1 deletions

diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h
index 1ebf33fedaa..16ac6b6d496 100644
--- a/arch/arm/plat-mxc/include/mach/mx25.h
+++ b/arch/arm/plat-mxc/include/mach/mx25.h
@@ -14,6 +14,7 @@
 #define MX25_I2C1_BASE_ADDR             (MX25_AIPS1_BASE_ADDR + 0x80000)
 #define MX25_I2C3_BASE_ADDR             (MX25_AIPS1_BASE_ADDR + 0x84000)
 #define MX25_I2C2_BASE_ADDR             (MX25_AIPS1_BASE_ADDR + 0x98000)
+#define MX25_CSPI1_BASE_ADDR            (MX25_AIPS1_BASE_ADDR + 0xa4000)
 #define MX25_IOMUXC_BASE_ADDR           (MX25_AIPS1_BASE_ADDR + 0xac000)
 
 #define MX25_CRM_BASE_ADDR              (MX25_AIPS2_BASE_ADDR + 0x80000)
@@ -33,18 +34,23 @@
 #define MX25_UART1_BASE_ADDR            0x43f90000
 #define MX25_UART2_BASE_ADDR            0x43f94000
 
+#define MX25_CSPI3_BASE_ADDR            0x50004000
+#define MX25_CSPI2_BASE_ADDR            0x50010000
 #define MX25_FEC_BASE_ADDR              0x50038000
 #define MX25_NFC_BASE_ADDR              0xbb000000
 #define MX25_DRYICE_BASE_ADDR           0x53ffc000
 #define MX25_LCDC_BASE_ADDR             0x53fbc000
 
+#define MX25_INT_CSPI3          0
 #define MX25_INT_I2C1           3
 #define MX25_INT_I2C2           4
 #define MX25_INT_I2C3           10
+#define MX25_INT_CSPI2          13
+#define MX25_INT_CSPI1          14
 #define MX25_INT_DRYICE         25
-#define MX25_INT_FEC            57
 #define MX25_INT_NANDFC         33
 #define MX25_INT_LCDC           39
+#define MX25_INT_FEC            57
 
 #if defined(IMX_NEEDS_DEPRECATED_SYMBOLS)
 #define UART1_BASE_ADDR                 MX25_UART1_BASE_ADDR