ARM: SAMSUNG: move S5PC100 support from plat-s5pc1xx to plat-s5p framework

This patch moves S5PC100 SoC support to plat-s5p framework. Most
periperal support code has been already moved from plat-s5pc1xx to
mach-s5pc100.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>

9 files changed, 161 insertions, 142 deletions

diff --git a/arch/arm/mach-s5pc100/include/mach/debug-macro.S b/arch/arm/mach-s5pc100/include/mach/debug-macro.S
index e181f578948..70e02e91ee3 100644
--- a/arch/arm/mach-s5pc100/include/mach/debug-macro.S
+++ b/arch/arm/mach-s5pc100/include/mach/debug-macro.S
@@ -22,12 +22,14 @@
          * aligned and add in the offset when we load the value here.
          */
 
-        .macro addruart, rx, tmp
+        .macro addruart, rx, rtmp
                 mrc     p15, 0, \rx, c1, c0
                 tst     \rx, #1
                 ldreq   \rx, = S3C_PA_UART
-                ldrne   \rx, = (S3C_VA_UART + S3C_PA_UART & 0xfffff)
+                ldrne   \rx, = S3C_VA_UART
+#if CONFIG_DEBUG_S3C_UART != 0
                 add     \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART)
+#endif
         .endm
 
 /* include the reset of the code which will do the work, we're only
diff --git a/arch/arm/mach-s5pc100/include/mach/entry-macro.S b/arch/arm/mach-s5pc100/include/mach/entry-macro.S
index 67131939e62..ba76af052c8 100644
--- a/arch/arm/mach-s5pc100/include/mach/entry-macro.S
+++ b/arch/arm/mach-s5pc100/include/mach/entry-macro.S
@@ -20,7 +20,7 @@
         .endm
 
         .macro  get_irqnr_preamble, base, tmp
-        ldr     \base, =S3C_VA_VIC0
+        ldr     \base, =VA_VIC0
         .endm
 
         .macro  arch_ret_to_user, tmp1, tmp2
@@ -29,18 +29,18 @@
         .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
 
         @ check the vic0
-        mov     \irqnr, # S3C_IRQ_OFFSET + 31
+        mov     \irqnr, # S5P_IRQ_OFFSET + 31
         ldr     \irqstat, [ \base, # VIC_IRQ_STATUS ]
         teq     \irqstat, #0
 
         @ otherwise try vic1
-        addeq   \tmp, \base, #(S3C_VA_VIC1 - S3C_VA_VIC0)
+        addeq   \tmp, \base, #(VA_VIC1 - VA_VIC0)
         addeq   \irqnr, \irqnr, #32
         ldreq   \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
         teqeq   \irqstat, #0
 
         @ otherwise try vic2
-        addeq   \tmp, \base, #(S3C_VA_VIC2 - S3C_VA_VIC0)
+        addeq   \tmp, \base, #(VA_VIC2 - VA_VIC0)
         addeq   \irqnr, \irqnr, #32
         ldreq   \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
         teqeq   \irqstat, #0
diff --git a/arch/arm/mach-s5pc100/include/mach/irqs.h b/arch/arm/mach-s5pc100/include/mach/irqs.h
index b53fa48a52c..84c74acaa63 100644
--- a/arch/arm/mach-s5pc100/include/mach/irqs.h
+++ b/arch/arm/mach-s5pc100/include/mach/irqs.h
@@ -11,9 +11,106 @@
 
 #include <plat/irqs.h>
 
-/* LCD */
+/* VIC0: system, DMA, timer */
+#define IRQ_EINT16_31           S5P_IRQ_VIC0(16)
+#define IRQ_BATF                S5P_IRQ_VIC0(17)
+#define IRQ_MDMA                S5P_IRQ_VIC0(18)
+#define IRQ_PDMA0               S5P_IRQ_VIC0(19)
+#define IRQ_PDMA1               S5P_IRQ_VIC0(20)
+#define IRQ_TIMER0_VIC          S5P_IRQ_VIC0(21)
+#define IRQ_TIMER1_VIC          S5P_IRQ_VIC0(22)
+#define IRQ_TIMER2_VIC          S5P_IRQ_VIC0(23)
+#define IRQ_TIMER3_VIC          S5P_IRQ_VIC0(24)
+#define IRQ_TIMER4_VIC          S5P_IRQ_VIC0(25)
+#define IRQ_SYSTIMER            S5P_IRQ_VIC0(26)
+#define IRQ_WDT                 S5P_IRQ_VIC0(27)
+#define IRQ_RTC_ALARM           S5P_IRQ_VIC0(28)
+#define IRQ_RTC_TIC             S5P_IRQ_VIC0(29)
+#define IRQ_GPIOINT             S5P_IRQ_VIC0(30)
+
+/* VIC1: ARM, power, memory, connectivity */
+#define IRQ_CORTEX0             S5P_IRQ_VIC1(0)
+#define IRQ_CORTEX1             S5P_IRQ_VIC1(1)
+#define IRQ_CORTEX2             S5P_IRQ_VIC1(2)
+#define IRQ_CORTEX3             S5P_IRQ_VIC1(3)
+#define IRQ_CORTEX4             S5P_IRQ_VIC1(4)
+#define IRQ_IEMAPC              S5P_IRQ_VIC1(5)
+#define IRQ_IEMIEC              S5P_IRQ_VIC1(6)
+#define IRQ_ONENAND             S5P_IRQ_VIC1(7)
+#define IRQ_NFC                 S5P_IRQ_VIC1(8)
+#define IRQ_CFC                 S5P_IRQ_VIC1(9)
+#define IRQ_UART0               S5P_IRQ_VIC1(10)
+#define IRQ_UART1               S5P_IRQ_VIC1(11)
+#define IRQ_UART2               S5P_IRQ_VIC1(12)
+#define IRQ_UART3               S5P_IRQ_VIC1(13)
+#define IRQ_IIC                 S5P_IRQ_VIC1(14)
+#define IRQ_SPI0                S5P_IRQ_VIC1(15)
+#define IRQ_SPI1                S5P_IRQ_VIC1(16)
+#define IRQ_SPI2                S5P_IRQ_VIC1(17)
+#define IRQ_IRDA                S5P_IRQ_VIC1(18)
+#define IRQ_CAN0                S5P_IRQ_VIC1(19)
+#define IRQ_CAN1                S5P_IRQ_VIC1(20)
+#define IRQ_HSIRX               S5P_IRQ_VIC1(21)
+#define IRQ_HSITX               S5P_IRQ_VIC1(22)
+#define IRQ_UHOST               S5P_IRQ_VIC1(23)
+#define IRQ_OTG                 S5P_IRQ_VIC1(24)
+#define IRQ_MSM                 S5P_IRQ_VIC1(25)
+#define IRQ_HSMMC0              S5P_IRQ_VIC1(26)
+#define IRQ_HSMMC1              S5P_IRQ_VIC1(27)
+#define IRQ_HSMMC2              S5P_IRQ_VIC1(28)
+#define IRQ_MIPICSI             S5P_IRQ_VIC1(29)
+#define IRQ_MIPIDSI             S5P_IRQ_VIC1(30)
+
+/* VIC2: multimedia, audio, security */
+#define IRQ_LCD0                S5P_IRQ_VIC2(0)
+#define IRQ_LCD1                S5P_IRQ_VIC2(1)
+#define IRQ_LCD2                S5P_IRQ_VIC2(2)
+#define IRQ_LCD3                S5P_IRQ_VIC2(3)
+#define IRQ_ROTATOR             S5P_IRQ_VIC2(4)
+#define IRQ_FIMC0               S5P_IRQ_VIC2(5)
+#define IRQ_FIMC1               S5P_IRQ_VIC2(6)
+#define IRQ_FIMC2               S5P_IRQ_VIC2(7)
+#define IRQ_JPEG                S5P_IRQ_VIC2(8)
+#define IRQ_2D                  S5P_IRQ_VIC2(9)
+#define IRQ_3D                  S5P_IRQ_VIC2(10)
+#define IRQ_MIXER               S5P_IRQ_VIC2(11)
+#define IRQ_HDMI                S5P_IRQ_VIC2(12)
+#define IRQ_IIC1                S5P_IRQ_VIC2(13)
+#define IRQ_MFC                 S5P_IRQ_VIC2(14)
+#define IRQ_TVENC               S5P_IRQ_VIC2(15)
+#define IRQ_I2S0                S5P_IRQ_VIC2(16)
+#define IRQ_I2S1                S5P_IRQ_VIC2(17)
+#define IRQ_I2S2                S5P_IRQ_VIC2(18)
+#define IRQ_AC97                S5P_IRQ_VIC2(19)
+#define IRQ_PCM0                S5P_IRQ_VIC2(20)
+#define IRQ_PCM1                S5P_IRQ_VIC2(21)
+#define IRQ_SPDIF               S5P_IRQ_VIC2(22)
+#define IRQ_ADC                 S5P_IRQ_VIC2(23)
+#define IRQ_PENDN               S5P_IRQ_VIC2(24)
+#define IRQ_TC                  IRQ_PENDN
+#define IRQ_KEYPAD              S5P_IRQ_VIC2(25)
+#define IRQ_CG                  S5P_IRQ_VIC2(26)
+#define IRQ_SEC                 S5P_IRQ_VIC2(27)
+#define IRQ_SECRX               S5P_IRQ_VIC2(28)
+#define IRQ_SECTX               S5P_IRQ_VIC2(29)
+#define IRQ_SDMIRQ              S5P_IRQ_VIC2(30)
+#define IRQ_SDMFIQ              S5P_IRQ_VIC2(31)
+#define IRQ_VIC_END             S5P_IRQ_VIC2(31)
+
+#define S5P_IRQ_EINT_BASE       (IRQ_VIC_END + 1)
+
+#define IRQ_EINT(x)             ((x) < 16 ? S5P_IRQ_VIC0(x) : \
+                                        (S5P_IRQ_EINT_BASE + (x)-16))
+
+#define S3C_IRQ_GPIO_BASE       (IRQ_EINT(31) + 1)
+#define S3C_IRQ_GPIO(x)         (S3C_IRQ_GPIO_BASE + (x))
+
+/* Until MP04 Groups -> 40 (exactly 39) Groups * 8 ~= 320 GPIOs */
+#define NR_IRQS         (S3C_IRQ_GPIO(320) + 1)
+
+/* Compatibility */
 #define IRQ_LCD_FIFO            IRQ_LCD0
 #define IRQ_LCD_VSYNC           IRQ_LCD1
 #define IRQ_LCD_SYSTEM          IRQ_LCD2
 
-#endif /* __ASM_ARCH_IRQ_H */
+#endif /* __ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/map.h b/arch/arm/mach-s5pc100/include/mach/map.h
index 4681ebe8bef..6428f489820 100644
--- a/arch/arm/mach-s5pc100/include/mach/map.h
+++ b/arch/arm/mach-s5pc100/include/mach/map.h
@@ -3,9 +3,7 @@
  * Copyright 2009 Samsung Electronics Co.
  *      Byungho Min <bhmin@samsung.com>
  *
- * Based on mach-s3c6400/include/mach/map.h
- *
- * S5PC1XX - Memory map definitions
+ * S5PC100 - Memory map definitions
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -16,135 +14,59 @@
 #define __ASM_ARCH_MAP_H __FILE__
 
 #include <plat/map-base.h>
+#include <plat/map-s5p.h>
 
-/*
- * map-base.h has already defined virtual memory address
- * S3C_VA_IRQ           S3C_ADDR(0x00000000)    irq controller(s)
- * S3C_VA_SYS           S3C_ADDR(0x00100000)    system control
- * S3C_VA_MEM           S3C_ADDR(0x00200000)    system control (not used)
- * S3C_VA_TIMER         S3C_ADDR(0x00300000)    timer block
- * S3C_VA_WATCHDOG      S3C_ADDR(0x00400000)    watchdog
- * S3C_VA_UART          S3C_ADDR(0x01000000)    UART
- *
- * S5PC100 specific virtual memory address can be defined here
- * S5PC1XX_VA_GPIO      S3C_ADDR(0x00500000)    GPIO
- *
- */
-
-/* Chip ID */
 #define S5PC100_PA_CHIPID       (0xE0000000)
-#define S5PC1XX_PA_CHIPID       S5PC100_PA_CHIPID
-#define S5PC1XX_VA_CHIPID       S3C_VA_SYS
-
-/* System */
-#define S5PC100_PA_CLK          (0xE0100000)
-#define S5PC100_PA_CLK_OTHER    (0xE0200000)
-#define S5PC100_PA_PWR          (0xE0108000)
-#define S5PC1XX_PA_CLK          S5PC100_PA_CLK
-#define S5PC1XX_PA_PWR          S5PC100_PA_PWR
-#define S5PC1XX_PA_CLK_OTHER    S5PC100_PA_CLK_OTHER
-#define S5PC1XX_VA_CLK          (S3C_VA_SYS + 0x10000)
-#define S5PC1XX_VA_PWR          (S3C_VA_SYS + 0x20000)
-#define S5PC1XX_VA_CLK_OTHER    (S3C_VA_SYS + 0x30000)
-
-/* GPIO */
+#define S5P_PA_CHIPID           S5PC100_PA_CHIPID
+
+#define S5PC100_PA_SYSCON       (0xE0100000)
+#define S5P_PA_SYSCON           S5PC100_PA_SYSCON
+
+#define S5PC100_PA_OTHERS       (0xE0200000)
+#define S5PC100_VA_OTHERS       (S3C_VA_SYS + 0x10000)
+
 #define S5PC100_PA_GPIO         (0xE0300000)
-#define S5PC1XX_PA_GPIO         S5PC100_PA_GPIO
-#define S5PC1XX_VA_GPIO         S3C_ADDR(0x00500000)
-
-/* Interrupt */
-#define S5PC100_PA_VIC          (0xE4000000)
-#define S5PC100_VA_VIC          S3C_VA_IRQ
-#define S5PC100_PA_VIC_OFFSET   0x100000
-#define S5PC100_VA_VIC_OFFSET   0x10000
-#define S5PC1XX_PA_VIC(x)       (S5PC100_PA_VIC + ((x) * S5PC100_PA_VIC_OFFSET))
-#define S5PC1XX_VA_VIC(x)       (S5PC100_VA_VIC + ((x) * S5PC100_VA_VIC_OFFSET))
-
-/* DMA */
-#define S5PC100_PA_MDMA         (0xE8100000)
-#define S5PC100_PA_PDMA0        (0xE9000000)
-#define S5PC100_PA_PDMA1        (0xE9200000)
-
-/* Timer */
-#define S5PC100_PA_TIMER        (0xEA000000)
-#define S5PC1XX_PA_TIMER        S5PC100_PA_TIMER
-#define S5PC1XX_VA_TIMER        S3C_VA_TIMER
+#define S5P_PA_GPIO             S5PC100_PA_GPIO
 
-/* RTC */
-#define S5PC100_PA_RTC          (0xEA300000)
+#define S5PC100_PA_VIC0         (0xE4000000)
+#define S5P_PA_VIC0             S5PC100_PA_VIC0
 
-/* UART */
-#define S5PC100_PA_UART         (0xEC000000)
-#define S5PC1XX_PA_UART         S5PC100_PA_UART
-#define S5PC1XX_VA_UART         S3C_VA_UART
+#define S5PC100_PA_VIC1         (0xE4100000)
+#define S5P_PA_VIC1             S5PC100_PA_VIC1
 
-/* I2C */
-#define S5PC100_PA_I2C          (0xEC100000)
-#define S5PC100_PA_I2C1         (0xEC200000)
+#define S5PC100_PA_VIC2         (0xE4200000)
+#define S5P_PA_VIC2             S5PC100_PA_VIC2
 
-/* USB HS OTG */
-#define S5PC100_PA_USB_HSOTG    (0xED200000)
-#define S5PC100_PA_USB_HSPHY    (0xED300000)
+#define S5PC100_PA_TIMER        (0xEA000000)
+#define S5P_PA_TIMER            S5PC100_PA_TIMER
 
-/* SD/MMC */
-#define S5PC100_PA_HSMMC(x)     (0xED800000 + ((x) * 0x100000))
-#define S5PC100_PA_HSMMC0       S5PC100_PA_HSMMC(0)
-#define S5PC100_PA_HSMMC1       S5PC100_PA_HSMMC(1)
-#define S5PC100_PA_HSMMC2       S5PC100_PA_HSMMC(2)
+#define S5PC100_PA_SYSTIMER     (0xEA100000)
 
-/* LCD */
-#define S5PC100_PA_FB           (0xEE000000)
+#define S5PC100_PA_UART         (0xEC000000)
 
-/* Multimedia */
-#define S5PC100_PA_G2D          (0xEE800000)
-#define S5PC100_PA_JPEG         (0xEE500000)
-#define S5PC100_PA_ROTATOR      (0xEE100000)
-#define S5PC100_PA_G3D          (0xEF000000)
+#define S5P_PA_UART0            (S5PC100_PA_UART + 0x0)
+#define S5P_PA_UART1            (S5PC100_PA_UART + 0x400)
+#define S5P_PA_UART2            (S5PC100_PA_UART + 0x800)
+#define S5P_PA_UART3            (S5PC100_PA_UART + 0xC00)
+#define S5P_SZ_UART             SZ_256
 
-/* I2S */
-#define S5PC100_PA_I2S0         (0xF2000000)
-#define S5PC100_PA_I2S1         (0xF2100000)
-#define S5PC100_PA_I2S2         (0xF2200000)
+#define S5PC100_PA_IIC0         (0xEC100000)
+#define S5PC100_PA_IIC1         (0xEC200000)
 
-/* KEYPAD */
-#define S5PC100_PA_KEYPAD       (0xF3100000)
+#define S5PC100_PA_FB           (0xEE000000)
 
-/* ADC & TouchScreen */
-#define S5PC100_PA_TSADC        (0xF3000000)
+#define S5PC100_PA_HSMMC(x)     (0xED800000 + ((x) * 0x100000))
 
-/* ETC */
 #define S5PC100_PA_SDRAM        (0x20000000)
-#define S5PC1XX_PA_SDRAM        S5PC100_PA_SDRAM
+#define S5P_PA_SDRAM            S5PC100_PA_SDRAM
 
-/* compatibility defines. */
-#define S3C_PA_RTC              S5PC100_PA_RTC
+/* compatibiltiy defines. */
 #define S3C_PA_UART             S5PC100_PA_UART
-#define S3C_PA_UART0            (S5PC100_PA_UART + 0x0)
-#define S3C_PA_UART1            (S5PC100_PA_UART + 0x400)
-#define S3C_PA_UART2            (S5PC100_PA_UART + 0x800)
-#define S3C_PA_UART3            (S5PC100_PA_UART + 0xC00)
-#define S3C_VA_UART0            (S3C_VA_UART + 0x0)
-#define S3C_VA_UART1            (S3C_VA_UART + 0x400)
-#define S3C_VA_UART2            (S3C_VA_UART + 0x800)
-#define S3C_VA_UART3            (S3C_VA_UART + 0xC00)
-#define S3C_UART_OFFSET         0x400
-#define S3C_VA_UARTx(x)         (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
+#define S3C_PA_IIC              S5PC100_PA_IIC0
+#define S3C_PA_IIC1             S5PC100_PA_IIC1
 #define S3C_PA_FB               S5PC100_PA_FB
-#define S3C_PA_G2D              S5PC100_PA_G2D
-#define S3C_PA_G3D              S5PC100_PA_G3D
-#define S3C_PA_JPEG             S5PC100_PA_JPEG
-#define S3C_PA_ROTATOR          S5PC100_PA_ROTATOR
-#define S3C_VA_VIC0             (S3C_VA_IRQ + 0x0)
-#define S3C_VA_VIC1             (S3C_VA_IRQ + 0x10000)
-#define S3C_VA_VIC2             (S3C_VA_IRQ + 0x20000)
-#define S3C_PA_IIC              S5PC100_PA_I2C
-#define S3C_PA_IIC1             S5PC100_PA_I2C1
-#define S3C_PA_USB_HSOTG        S5PC100_PA_USB_HSOTG
-#define S3C_PA_USB_HSPHY        S5PC100_PA_USB_HSPHY
-#define S3C_PA_HSMMC0           S5PC100_PA_HSMMC0
-#define S3C_PA_HSMMC1           S5PC100_PA_HSMMC1
-#define S3C_PA_HSMMC2           S5PC100_PA_HSMMC2
-#define S3C_PA_KEYPAD           S5PC100_PA_KEYPAD
-#define S3C_PA_TSADC            S5PC100_PA_TSADC
-
-#endif /* __ASM_ARCH_C100_MAP_H */
+#define S3C_PA_HSMMC0           S5PC100_PA_HSMMC(0)
+#define S3C_PA_HSMMC1           S5PC100_PA_HSMMC(1)
+#define S3C_PA_HSMMC2           S5PC100_PA_HSMMC(2)
+
+#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-clock.h b/arch/arm/mach-s5pc100/include/mach/regs-clock.h
index f2283bdc941..5d27d286d50 100644
--- a/arch/arm/mach-s5pc100/include/mach/regs-clock.h
+++ b/arch/arm/mach-s5pc100/include/mach/regs-clock.h
@@ -17,6 +17,8 @@
 
 #define S5P_CLKREG(x)           (S3C_VA_SYS + (x))
 
+#define S5PC100_REG_OTHERS(x)   (S5PC100_VA_OTHERS + (x))
+
 #define S5P_APLL_LOCK           S5P_CLKREG(0x00)
 #define S5P_MPLL_LOCK           S5P_CLKREG(0x04)
 #define S5P_EPLL_LOCK           S5P_CLKREG(0x08)
@@ -68,4 +70,8 @@
 #define S5P_CLKDIV1_PCLKD1_MASK         (0x7<<16)
 #define S5P_CLKDIV1_PCLKD1_SHIFT        (16)
 
+#define S5PC100_SWRESET         S5PC100_REG_OTHERS(0x000)
+
+#define S5PC100_SWRESET_RESETVAL        0xc100
+
 #endif /* __ASM_ARCH_REGS_CLOCK_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-gpio.h b/arch/arm/mach-s5pc100/include/mach/regs-gpio.h
index 68666913354..cd6200adabc 100644
--- a/arch/arm/mach-s5pc100/include/mach/regs-gpio.h
+++ b/arch/arm/mach-s5pc100/include/mach/regs-gpio.h
@@ -1,4 +1,4 @@
-/* linux/arch/arm/plat-s5pc1xx/include/plat/regs-gpio.h
+/* linux/arch/arm/plat-s5pc100/include/plat/regs-gpio.h
  *
  * Copyright 2009 Samsung Electronics Co.
  *      Byungho Min <bhmin@samsung.com>
@@ -12,7 +12,7 @@
 #include <mach/map.h>
 
 /* S5PC100 */
-#define S5PC100_GPIO_BASE       S5PC1XX_VA_GPIO
+#define S5PC100_GPIO_BASE       S5P_VA_GPIO
 #define S5PC100_GPA0_BASE       (S5PC100_GPIO_BASE + 0x0000)
 #define S5PC100_GPA1_BASE       (S5PC100_GPIO_BASE + 0x0020)
 #define S5PC100_GPB_BASE        (S5PC100_GPIO_BASE + 0x0040)
@@ -60,7 +60,7 @@
 
 /* Common part */
 /* External interrupt base is same at both s5pc100 and s5pc110 */
-#define S5PC1XX_EINT_BASE       (S5PC100_EINT_BASE)
+#define S5P_EINT_BASE                   (S5PC100_EINT_BASE)
 
 #define S5PC100_GPx_INPUT(__gpio)       (0x0 << ((__gpio) * 4))
 #define S5PC100_GPx_OUTPUT(__gpio)      (0x1 << ((__gpio) * 4))
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-irq.h b/arch/arm/mach-s5pc100/include/mach/regs-irq.h
index 751ac15438c..4d9036d0f28 100644
--- a/arch/arm/mach-s5pc100/include/mach/regs-irq.h
+++ b/arch/arm/mach-s5pc100/include/mach/regs-irq.h
@@ -3,7 +3,7 @@
  * Copyright 2009 Samsung Electronics Co.
  *      Byungho Min <bhmin@samsung.com>
  *
- * S5PC1XX - IRQ register definitions
+ * S5PC100 - IRQ register definitions
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -16,9 +16,4 @@
 #include <mach/map.h>
 #include <asm/hardware/vic.h>
 
-/* interrupt controller */
-#define S5PC1XX_VIC0REG(x)                      ((x) + S5PC1XX_VA_VIC(0))
-#define S5PC1XX_VIC1REG(x)                      ((x) + S5PC1XX_VA_VIC(1))
-#define S5PC1XX_VIC2REG(x)                      ((x) + S5PC1XX_VA_VIC(2))
-
 #endif /* __ASM_ARCH_REGS_IRQ_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/system.h b/arch/arm/mach-s5pc100/include/mach/system.h
index f0d31a2a598..681f626a9ae 100644
--- a/arch/arm/mach-s5pc100/include/mach/system.h
+++ b/arch/arm/mach-s5pc100/include/mach/system.h
@@ -3,7 +3,7 @@
  * Copyright 2009 Samsung Electronics Co.
  *      Byungho Min <bhmin@samsung.com>
  *
- * S5PC1XX - system implementation
+ * S5PC100 - system implementation
  *
  * Based on mach-s3c6400/include/mach/system.h
  */
@@ -13,14 +13,11 @@
 
 #include <linux/io.h>
 #include <mach/map.h>
-#include <plat/regs-clock.h>
-
-void (*s5pc1xx_idle)(void);
+#include <mach/regs-clock.h>
 
 static void arch_idle(void)
 {
-        if (s5pc1xx_idle)
-                s5pc1xx_idle();
+        /* nothing here yet */
 }
 
 static void arch_reset(char mode, const char *cmd)
diff --git a/arch/arm/mach-s5pc100/include/mach/tick.h b/arch/arm/mach-s5pc100/include/mach/tick.h
index f338c9eec71..20f68730ed1 100644
--- a/arch/arm/mach-s5pc100/include/mach/tick.h
+++ b/arch/arm/mach-s5pc100/include/mach/tick.h
@@ -20,8 +20,8 @@
  */
 static inline u32 s3c24xx_ostimer_pending(void)
 {
-        u32 pend = __raw_readl(S3C_VA_VIC0 + VIC_RAW_STATUS);
-        return pend & 1 << (IRQ_TIMER4_VIC - S5PC1XX_IRQ_VIC0(0));
+        u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS);
+        return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0)));
 }
 
 #define TICK_MAX        (0xffffffff)