diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2006-11-23 06:41:32 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-11-30 07:24:47 -0500 |
commit | 10dd5ce28d78e2440e8fa1135d17e33399d75340 (patch) | |
tree | d2e76765a57e7e47a9c424f99c3a22bf99c6da64 /arch/arm/mach-rpc | |
parent | 127e477e0cd8da4d3058709ab2dc7b92dccbcba5 (diff) |
[ARM] Remove compatibility layer for ARM irqs
set_irq_chipdata -> set_irq_chip_data
get_irq_chipdata -> get_irq_chip_data
do_level_IRQ -> handle_level_irq
do_edge_IRQ -> handle_edge_irq
do_simple_IRQ -> handle_simple_irq
irqdesc -> irq_desc
irqchip -> irq_chip
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-rpc')
-rw-r--r-- | arch/arm/mach-rpc/irq.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/mach-rpc/irq.c b/arch/arm/mach-rpc/irq.c index 56b2716f8cf..7a029621db4 100644 --- a/arch/arm/mach-rpc/irq.c +++ b/arch/arm/mach-rpc/irq.c | |||
@@ -34,7 +34,7 @@ static void iomd_unmask_irq_a(unsigned int irq) | |||
34 | iomd_writeb(val | mask, IOMD_IRQMASKA); | 34 | iomd_writeb(val | mask, IOMD_IRQMASKA); |
35 | } | 35 | } |
36 | 36 | ||
37 | static struct irqchip iomd_a_chip = { | 37 | static struct irq_chip iomd_a_chip = { |
38 | .ack = iomd_ack_irq_a, | 38 | .ack = iomd_ack_irq_a, |
39 | .mask = iomd_mask_irq_a, | 39 | .mask = iomd_mask_irq_a, |
40 | .unmask = iomd_unmask_irq_a, | 40 | .unmask = iomd_unmask_irq_a, |
@@ -58,7 +58,7 @@ static void iomd_unmask_irq_b(unsigned int irq) | |||
58 | iomd_writeb(val | mask, IOMD_IRQMASKB); | 58 | iomd_writeb(val | mask, IOMD_IRQMASKB); |
59 | } | 59 | } |
60 | 60 | ||
61 | static struct irqchip iomd_b_chip = { | 61 | static struct irq_chip iomd_b_chip = { |
62 | .ack = iomd_mask_irq_b, | 62 | .ack = iomd_mask_irq_b, |
63 | .mask = iomd_mask_irq_b, | 63 | .mask = iomd_mask_irq_b, |
64 | .unmask = iomd_unmask_irq_b, | 64 | .unmask = iomd_unmask_irq_b, |
@@ -82,7 +82,7 @@ static void iomd_unmask_irq_dma(unsigned int irq) | |||
82 | iomd_writeb(val | mask, IOMD_DMAMASK); | 82 | iomd_writeb(val | mask, IOMD_DMAMASK); |
83 | } | 83 | } |
84 | 84 | ||
85 | static struct irqchip iomd_dma_chip = { | 85 | static struct irq_chip iomd_dma_chip = { |
86 | .ack = iomd_mask_irq_dma, | 86 | .ack = iomd_mask_irq_dma, |
87 | .mask = iomd_mask_irq_dma, | 87 | .mask = iomd_mask_irq_dma, |
88 | .unmask = iomd_unmask_irq_dma, | 88 | .unmask = iomd_unmask_irq_dma, |
@@ -106,7 +106,7 @@ static void iomd_unmask_irq_fiq(unsigned int irq) | |||
106 | iomd_writeb(val | mask, IOMD_FIQMASK); | 106 | iomd_writeb(val | mask, IOMD_FIQMASK); |
107 | } | 107 | } |
108 | 108 | ||
109 | static struct irqchip iomd_fiq_chip = { | 109 | static struct irq_chip iomd_fiq_chip = { |
110 | .ack = iomd_mask_irq_fiq, | 110 | .ack = iomd_mask_irq_fiq, |
111 | .mask = iomd_mask_irq_fiq, | 111 | .mask = iomd_mask_irq_fiq, |
112 | .unmask = iomd_unmask_irq_fiq, | 112 | .unmask = iomd_unmask_irq_fiq, |
@@ -134,19 +134,19 @@ void __init rpc_init_irq(void) | |||
134 | switch (irq) { | 134 | switch (irq) { |
135 | case 0 ... 7: | 135 | case 0 ... 7: |
136 | set_irq_chip(irq, &iomd_a_chip); | 136 | set_irq_chip(irq, &iomd_a_chip); |
137 | set_irq_handler(irq, do_level_IRQ); | 137 | set_irq_handler(irq, handle_level_irq); |
138 | set_irq_flags(irq, flags); | 138 | set_irq_flags(irq, flags); |
139 | break; | 139 | break; |
140 | 140 | ||
141 | case 8 ... 15: | 141 | case 8 ... 15: |
142 | set_irq_chip(irq, &iomd_b_chip); | 142 | set_irq_chip(irq, &iomd_b_chip); |
143 | set_irq_handler(irq, do_level_IRQ); | 143 | set_irq_handler(irq, handle_level_irq); |
144 | set_irq_flags(irq, flags); | 144 | set_irq_flags(irq, flags); |
145 | break; | 145 | break; |
146 | 146 | ||
147 | case 16 ... 21: | 147 | case 16 ... 21: |
148 | set_irq_chip(irq, &iomd_dma_chip); | 148 | set_irq_chip(irq, &iomd_dma_chip); |
149 | set_irq_handler(irq, do_level_IRQ); | 149 | set_irq_handler(irq, handle_level_irq); |
150 | set_irq_flags(irq, flags); | 150 | set_irq_flags(irq, flags); |
151 | break; | 151 | break; |
152 | 152 | ||