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authorCatalin Marinas <catalin.marinas@arm.com>2008-04-18 17:43:08 -0400
committerCatalin Marinas <catalin.marinas@arm.com>2008-04-18 17:43:08 -0400
commitb7b0ba942f7b18de678cd081902aad8a0b6581c6 (patch)
tree65e36cdf831906876bc558ab6d40db58d9ba5e92 /arch/arm/mach-realview
parentcb170a45d69b573a08247acfbbff3b9d6e6e2f8f (diff)
RealView: Move the SCU initialisation out of __v6_setup
This patch moves the SCU initialisation from __v6_setup to the smp_prepare_cpus() function as it relies on platform-specific settings. Changes to get_core_count() are mainly for allowing cleaner code with the upcoming PB11MPCore patches. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm/mach-realview')
-rw-r--r--arch/arm/mach-realview/platsmp.c43
1 files changed, 35 insertions, 8 deletions
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c
index de2b7159557..2ff1acaf2be 100644
--- a/arch/arm/mach-realview/platsmp.c
+++ b/arch/arm/mach-realview/platsmp.c
@@ -15,11 +15,13 @@
15#include <linux/smp.h> 15#include <linux/smp.h>
16 16
17#include <asm/cacheflush.h> 17#include <asm/cacheflush.h>
18#include <asm/hardware/arm_scu.h>
19#include <asm/hardware.h> 18#include <asm/hardware.h>
20#include <asm/io.h> 19#include <asm/io.h>
21#include <asm/mach-types.h> 20#include <asm/mach-types.h>
22 21
22#include <asm/arch/board-eb.h>
23#include <asm/arch/scu.h>
24
23extern void realview_secondary_startup(void); 25extern void realview_secondary_startup(void);
24 26
25/* 27/*
@@ -31,9 +33,13 @@ volatile int __cpuinitdata pen_release = -1;
31static unsigned int __init get_core_count(void) 33static unsigned int __init get_core_count(void)
32{ 34{
33 unsigned int ncores; 35 unsigned int ncores;
36 void __iomem *scu_base = 0;
37
38 if (machine_is_realview_eb() && core_tile_eb11mp())
39 scu_base = __io_address(REALVIEW_EB11MP_SCU_BASE);
34 40
35 if (machine_is_realview_eb() && core_tile_eb11mp()) { 41 if (scu_base) {
36 ncores = __raw_readl(__io_address(REALVIEW_EB11MP_SCU_BASE) + SCU_CONFIG); 42 ncores = __raw_readl(scu_base + SCU_CONFIG);
37 ncores = (ncores & 0x03) + 1; 43 ncores = (ncores & 0x03) + 1;
38 } else 44 } else
39 ncores = 1; 45 ncores = 1;
@@ -41,6 +47,24 @@ static unsigned int __init get_core_count(void)
41 return ncores; 47 return ncores;
42} 48}
43 49
50/*
51 * Setup the SCU
52 */
53static void scu_enable(void)
54{
55 u32 scu_ctrl;
56 void __iomem *scu_base;
57
58 if (machine_is_realview_eb() && core_tile_eb11mp())
59 scu_base = __io_address(REALVIEW_EB11MP_SCU_BASE);
60 else
61 BUG();
62
63 scu_ctrl = __raw_readl(scu_base + SCU_CTRL);
64 scu_ctrl |= 1;
65 __raw_writel(scu_ctrl, scu_base + SCU_CTRL);
66}
67
44static DEFINE_SPINLOCK(boot_lock); 68static DEFINE_SPINLOCK(boot_lock);
45 69
46void __cpuinit platform_secondary_init(unsigned int cpu) 70void __cpuinit platform_secondary_init(unsigned int cpu)
@@ -210,11 +234,14 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
210 cpu_set(i, cpu_present_map); 234 cpu_set(i, cpu_present_map);
211 235
212 /* 236 /*
213 * Do we need any more CPUs? If so, then let them know where 237 * Initialise the SCU if there are more than one CPU and let
214 * to start. Note that, on modern versions of MILO, the "poke" 238 * them know where to start. Note that, on modern versions of
215 * doesn't actually do anything until each individual core is 239 * MILO, the "poke" doesn't actually do anything until each
216 * sent a soft interrupt to get it out of WFI 240 * individual core is sent a soft interrupt to get it out of
241 * WFI
217 */ 242 */
218 if (max_cpus > 1) 243 if (max_cpus > 1) {
244 scu_enable();
219 poke_milo(); 245 poke_milo();
246 }
220} 247}