diff options
author | Lennert Buytenhek <buytenh@wantstofly.org> | 2008-05-10 17:25:46 -0400 |
---|---|---|
committer | Lennert Buytenhek <buytenh@marvell.com> | 2008-06-22 16:44:47 -0400 |
commit | 19cfd5c09f780ac870fd9d89201c4ebc0b22be81 (patch) | |
tree | 655e4eb79d22a8e9a62676f6fc13391bf8de931f /arch/arm/mach-orion5x/ts209-setup.c | |
parent | 386a048a1ea42ff9ac87ffa344c4c19a5cc59678 (diff) |
[ARM] Orion: rework MPP handling
Instead of having board code poke directly into the MPP configuration
registers, and separately calling orion5x_gpio_set_valid_pins() to
indicate which MPP pins can be used as GPIO pins, introduce a helper
function for configuring the roles of each of the MPP pins, and have
that helper function handle gpio validity internally.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Sylver Bruneau <sylver.bruneau@googlemail.com>
Acked-by: Russell King <linux@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-orion5x/ts209-setup.c')
-rw-r--r-- | arch/arm/mach-orion5x/ts209-setup.c | 48 |
1 files changed, 27 insertions, 21 deletions
diff --git a/arch/arm/mach-orion5x/ts209-setup.c b/arch/arm/mach-orion5x/ts209-setup.c index 0ec067fcb51..5ad7ad9b946 100644 --- a/arch/arm/mach-orion5x/ts209-setup.c +++ b/arch/arm/mach-orion5x/ts209-setup.c | |||
@@ -28,6 +28,7 @@ | |||
28 | #include <asm/mach/pci.h> | 28 | #include <asm/mach/pci.h> |
29 | #include <asm/arch/orion5x.h> | 29 | #include <asm/arch/orion5x.h> |
30 | #include "common.h" | 30 | #include "common.h" |
31 | #include "mpp.h" | ||
31 | 32 | ||
32 | #define QNAP_TS209_NOR_BOOT_BASE 0xf4000000 | 33 | #define QNAP_TS209_NOR_BOOT_BASE 0xf4000000 |
33 | #define QNAP_TS209_NOR_BOOT_SIZE SZ_8M | 34 | #define QNAP_TS209_NOR_BOOT_SIZE SZ_8M |
@@ -332,6 +333,30 @@ static struct mv_sata_platform_data qnap_ts209_sata_data = { | |||
332 | 333 | ||
333 | * General Setup | 334 | * General Setup |
334 | ****************************************************************************/ | 335 | ****************************************************************************/ |
336 | static struct orion5x_mpp_mode ts209_mpp_modes[] __initdata = { | ||
337 | { 0, MPP_UNUSED }, | ||
338 | { 1, MPP_GPIO }, /* USB copy button */ | ||
339 | { 2, MPP_GPIO }, /* Load defaults button */ | ||
340 | { 3, MPP_GPIO }, /* GPIO RTC */ | ||
341 | { 4, MPP_UNUSED }, | ||
342 | { 5, MPP_UNUSED }, | ||
343 | { 6, MPP_GPIO }, /* PCI Int A */ | ||
344 | { 7, MPP_GPIO }, /* PCI Int B */ | ||
345 | { 8, MPP_UNUSED }, | ||
346 | { 9, MPP_UNUSED }, | ||
347 | { 10, MPP_UNUSED }, | ||
348 | { 11, MPP_UNUSED }, | ||
349 | { 12, MPP_SATA_LED }, /* SATA 0 presence */ | ||
350 | { 13, MPP_SATA_LED }, /* SATA 1 presence */ | ||
351 | { 14, MPP_SATA_LED }, /* SATA 0 active */ | ||
352 | { 15, MPP_SATA_LED }, /* SATA 1 active */ | ||
353 | { 16, MPP_UART }, /* UART1 RXD */ | ||
354 | { 17, MPP_UART }, /* UART1 TXD */ | ||
355 | { 18, MPP_GPIO }, /* SW_RST */ | ||
356 | { 19, MPP_UNUSED }, | ||
357 | { -1 }, | ||
358 | }; | ||
359 | |||
335 | /* | 360 | /* |
336 | * QNAP TS-[12]09 specific power off method via UART1-attached PIC | 361 | * QNAP TS-[12]09 specific power off method via UART1-attached PIC |
337 | */ | 362 | */ |
@@ -364,33 +389,14 @@ static void __init qnap_ts209_init(void) | |||
364 | */ | 389 | */ |
365 | orion5x_init(); | 390 | orion5x_init(); |
366 | 391 | ||
392 | orion5x_mpp_conf(ts209_mpp_modes); | ||
393 | |||
367 | /* | 394 | /* |
368 | * Setup Multiplexing Pins -- | ||
369 | * MPP[0] Reserved | ||
370 | * MPP[1] USB copy button (0 active) | ||
371 | * MPP[2] Load defaults button (0 active) | ||
372 | * MPP[3] GPIO RTC | ||
373 | * MPP[4-5] Reserved | ||
374 | * MPP[6] PCI Int A | ||
375 | * MPP[7] PCI Int B | ||
376 | * MPP[8-11] Reserved | ||
377 | * MPP[12] SATA 0 presence | ||
378 | * MPP[13] SATA 1 presence | ||
379 | * MPP[14] SATA 0 active | ||
380 | * MPP[15] SATA 1 active | ||
381 | * MPP[16] UART1 RXD | ||
382 | * MPP[17] UART1 TXD | ||
383 | * MPP[18] SW_RST (0 active) | ||
384 | * MPP[19] Reserved | ||
385 | * MPP[20] PCI clock 0 | 395 | * MPP[20] PCI clock 0 |
386 | * MPP[21] PCI clock 1 | 396 | * MPP[21] PCI clock 1 |
387 | * MPP[22] USB 0 over current | 397 | * MPP[22] USB 0 over current |
388 | * MPP[23-25] Reserved | 398 | * MPP[23-25] Reserved |
389 | */ | 399 | */ |
390 | orion5x_write(MPP_0_7_CTRL, 0x3); | ||
391 | orion5x_write(MPP_8_15_CTRL, 0x55550000); | ||
392 | orion5x_write(MPP_16_19_CTRL, 0x5500); | ||
393 | orion5x_gpio_set_valid_pins(0x3cc0fff); | ||
394 | 400 | ||
395 | /* | 401 | /* |
396 | * Configure peripherals. | 402 | * Configure peripherals. |