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authorKevin Hilman <khilman@deeprootsystems.com>2010-09-27 10:49:30 -0400
committerKevin Hilman <khilman@deeprootsystems.com>2010-09-29 15:42:42 -0400
commit046465b76a41a32a8d56e691b167fb9ba7729970 (patch)
tree51f2e7c0ad0747235cc63e05d42c7b7a82c1748f /arch/arm/mach-omap2/omap_hwmod_2420_data.c
parentdb12ba53fe8b2d79c06bfe00589b3e98fd50cb4c (diff)
OMAP2/3: UART: add omap_hwmod data for UARTs 1-4
This patch adds omap_hwmod data for UARTs on OMAP2 and OMAP3 platforms. UART4 support for 3630 and OMAP2 hwmod data added by Govindraj R. Signed-off-by: Govindraj.R <govindraj.raja@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-omap2/omap_hwmod_2420_data.c')
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2420_data.c193
1 files changed, 193 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index 3cc768e8bc0..ba145f7d589 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -15,6 +15,7 @@
15#include <mach/irqs.h> 15#include <mach/irqs.h>
16#include <plat/cpu.h> 16#include <plat/cpu.h>
17#include <plat/dma.h> 17#include <plat/dma.h>
18#include <plat/serial.h>
18 19
19#include "omap_hwmod_common_data.h" 20#include "omap_hwmod_common_data.h"
20 21
@@ -71,6 +72,9 @@ static struct omap_hwmod omap2420_l3_main_hwmod = {
71}; 72};
72 73
73static struct omap_hwmod omap2420_l4_wkup_hwmod; 74static struct omap_hwmod omap2420_l4_wkup_hwmod;
75static struct omap_hwmod omap2420_uart1_hwmod;
76static struct omap_hwmod omap2420_uart2_hwmod;
77static struct omap_hwmod omap2420_uart3_hwmod;
74 78
75/* L4_CORE -> L4_WKUP interface */ 79/* L4_CORE -> L4_WKUP interface */
76static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = { 80static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = {
@@ -79,6 +83,60 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = {
79 .user = OCP_USER_MPU | OCP_USER_SDMA, 83 .user = OCP_USER_MPU | OCP_USER_SDMA,
80}; 84};
81 85
86/* L4 CORE -> UART1 interface */
87static struct omap_hwmod_addr_space omap2420_uart1_addr_space[] = {
88 {
89 .pa_start = OMAP2_UART1_BASE,
90 .pa_end = OMAP2_UART1_BASE + SZ_8K - 1,
91 .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
92 },
93};
94
95static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = {
96 .master = &omap2420_l4_core_hwmod,
97 .slave = &omap2420_uart1_hwmod,
98 .clk = "uart1_ick",
99 .addr = omap2420_uart1_addr_space,
100 .addr_cnt = ARRAY_SIZE(omap2420_uart1_addr_space),
101 .user = OCP_USER_MPU | OCP_USER_SDMA,
102};
103
104/* L4 CORE -> UART2 interface */
105static struct omap_hwmod_addr_space omap2420_uart2_addr_space[] = {
106 {
107 .pa_start = OMAP2_UART2_BASE,
108 .pa_end = OMAP2_UART2_BASE + SZ_1K - 1,
109 .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
110 },
111};
112
113static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = {
114 .master = &omap2420_l4_core_hwmod,
115 .slave = &omap2420_uart2_hwmod,
116 .clk = "uart2_ick",
117 .addr = omap2420_uart2_addr_space,
118 .addr_cnt = ARRAY_SIZE(omap2420_uart2_addr_space),
119 .user = OCP_USER_MPU | OCP_USER_SDMA,
120};
121
122/* L4 PER -> UART3 interface */
123static struct omap_hwmod_addr_space omap2420_uart3_addr_space[] = {
124 {
125 .pa_start = OMAP2_UART3_BASE,
126 .pa_end = OMAP2_UART3_BASE + SZ_1K - 1,
127 .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
128 },
129};
130
131static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = {
132 .master = &omap2420_l4_core_hwmod,
133 .slave = &omap2420_uart3_hwmod,
134 .clk = "uart3_ick",
135 .addr = omap2420_uart3_addr_space,
136 .addr_cnt = ARRAY_SIZE(omap2420_uart3_addr_space),
137 .user = OCP_USER_MPU | OCP_USER_SDMA,
138};
139
82/* Slave interfaces on the L4_CORE interconnect */ 140/* Slave interfaces on the L4_CORE interconnect */
83static struct omap_hwmod_ocp_if *omap2420_l4_core_slaves[] = { 141static struct omap_hwmod_ocp_if *omap2420_l4_core_slaves[] = {
84 &omap2420_l3_main__l4_core, 142 &omap2420_l3_main__l4_core,
@@ -87,6 +145,9 @@ static struct omap_hwmod_ocp_if *omap2420_l4_core_slaves[] = {
87/* Master interfaces on the L4_CORE interconnect */ 145/* Master interfaces on the L4_CORE interconnect */
88static struct omap_hwmod_ocp_if *omap2420_l4_core_masters[] = { 146static struct omap_hwmod_ocp_if *omap2420_l4_core_masters[] = {
89 &omap2420_l4_core__l4_wkup, 147 &omap2420_l4_core__l4_wkup,
148 &omap2_l4_core__uart1,
149 &omap2_l4_core__uart2,
150 &omap2_l4_core__uart3,
90}; 151};
91 152
92/* L4 CORE */ 153/* L4 CORE */
@@ -165,12 +226,144 @@ static struct omap_hwmod omap2420_iva_hwmod = {
165 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) 226 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
166}; 227};
167 228
229/* UART */
230
231static struct omap_hwmod_class_sysconfig uart_sysc = {
232 .rev_offs = 0x50,
233 .sysc_offs = 0x54,
234 .syss_offs = 0x58,
235 .sysc_flags = (SYSC_HAS_SIDLEMODE |
236 SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
237 SYSC_HAS_AUTOIDLE),
238 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
239 .sysc_fields = &omap_hwmod_sysc_type1,
240};
241
242static struct omap_hwmod_class uart_class = {
243 .name = "uart",
244 .sysc = &uart_sysc,
245};
246
247/* UART1 */
248
249static struct omap_hwmod_irq_info uart1_mpu_irqs[] = {
250 { .irq = INT_24XX_UART1_IRQ, },
251};
252
253static struct omap_hwmod_dma_info uart1_sdma_reqs[] = {
254 { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, },
255 { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, },
256};
257
258static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = {
259 &omap2_l4_core__uart1,
260};
261
262static struct omap_hwmod omap2420_uart1_hwmod = {
263 .name = "uart1",
264 .mpu_irqs = uart1_mpu_irqs,
265 .mpu_irqs_cnt = ARRAY_SIZE(uart1_mpu_irqs),
266 .sdma_reqs = uart1_sdma_reqs,
267 .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs),
268 .main_clk = "uart1_fck",
269 .prcm = {
270 .omap2 = {
271 .module_offs = CORE_MOD,
272 .prcm_reg_id = 1,
273 .module_bit = OMAP24XX_EN_UART1_SHIFT,
274 .idlest_reg_id = 1,
275 .idlest_idle_bit = OMAP24XX_EN_UART1_SHIFT,
276 },
277 },
278 .slaves = omap2420_uart1_slaves,
279 .slaves_cnt = ARRAY_SIZE(omap2420_uart1_slaves),
280 .class = &uart_class,
281 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
282};
283
284/* UART2 */
285
286static struct omap_hwmod_irq_info uart2_mpu_irqs[] = {
287 { .irq = INT_24XX_UART2_IRQ, },
288};
289
290static struct omap_hwmod_dma_info uart2_sdma_reqs[] = {
291 { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, },
292 { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, },
293};
294
295static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = {
296 &omap2_l4_core__uart2,
297};
298
299static struct omap_hwmod omap2420_uart2_hwmod = {
300 .name = "uart2",
301 .mpu_irqs = uart2_mpu_irqs,
302 .mpu_irqs_cnt = ARRAY_SIZE(uart2_mpu_irqs),
303 .sdma_reqs = uart2_sdma_reqs,
304 .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs),
305 .main_clk = "uart2_fck",
306 .prcm = {
307 .omap2 = {
308 .module_offs = CORE_MOD,
309 .prcm_reg_id = 1,
310 .module_bit = OMAP24XX_EN_UART2_SHIFT,
311 .idlest_reg_id = 1,
312 .idlest_idle_bit = OMAP24XX_EN_UART2_SHIFT,
313 },
314 },
315 .slaves = omap2420_uart2_slaves,
316 .slaves_cnt = ARRAY_SIZE(omap2420_uart2_slaves),
317 .class = &uart_class,
318 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
319};
320
321/* UART3 */
322
323static struct omap_hwmod_irq_info uart3_mpu_irqs[] = {
324 { .irq = INT_24XX_UART3_IRQ, },
325};
326
327static struct omap_hwmod_dma_info uart3_sdma_reqs[] = {
328 { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, },
329 { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, },
330};
331
332static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = {
333 &omap2_l4_core__uart3,
334};
335
336static struct omap_hwmod omap2420_uart3_hwmod = {
337 .name = "uart3",
338 .mpu_irqs = uart3_mpu_irqs,
339 .mpu_irqs_cnt = ARRAY_SIZE(uart3_mpu_irqs),
340 .sdma_reqs = uart3_sdma_reqs,
341 .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs),
342 .main_clk = "uart3_fck",
343 .prcm = {
344 .omap2 = {
345 .module_offs = CORE_MOD,
346 .prcm_reg_id = 2,
347 .module_bit = OMAP24XX_EN_UART3_SHIFT,
348 .idlest_reg_id = 2,
349 .idlest_idle_bit = OMAP24XX_EN_UART3_SHIFT,
350 },
351 },
352 .slaves = omap2420_uart3_slaves,
353 .slaves_cnt = ARRAY_SIZE(omap2420_uart3_slaves),
354 .class = &uart_class,
355 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
356};
357
168static __initdata struct omap_hwmod *omap2420_hwmods[] = { 358static __initdata struct omap_hwmod *omap2420_hwmods[] = {
169 &omap2420_l3_main_hwmod, 359 &omap2420_l3_main_hwmod,
170 &omap2420_l4_core_hwmod, 360 &omap2420_l4_core_hwmod,
171 &omap2420_l4_wkup_hwmod, 361 &omap2420_l4_wkup_hwmod,
172 &omap2420_mpu_hwmod, 362 &omap2420_mpu_hwmod,
173 &omap2420_iva_hwmod, 363 &omap2420_iva_hwmod,
364 &omap2420_uart1_hwmod,
365 &omap2420_uart2_hwmod,
366 &omap2420_uart3_hwmod,
174 NULL, 367 NULL,
175}; 368};
176 369