omap: mux: Add 36xx CBP package support

Add 36xx CBP package support

Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

1 files changed, 42 insertions, 0 deletions

diff --git a/arch/arm/mach-omap2/mux34xx.h b/arch/arm/mach-omap2/mux34xx.h
index a7cc8713bd3..6543ebf8ecf 100644
--- a/arch/arm/mach-omap2/mux34xx.h
+++ b/arch/arm/mach-omap2/mux34xx.h
@@ -170,10 +170,13 @@
 #define OMAP3_CONTROL_PADCONF_SDMMC1_DAT1_OFFSET                0x11a
 #define OMAP3_CONTROL_PADCONF_SDMMC1_DAT2_OFFSET                0x11c
 #define OMAP3_CONTROL_PADCONF_SDMMC1_DAT3_OFFSET                0x11e
+
+/* SDMMC1_DAT4 - DAT7 are SIM_IO SIM_CLK SIM_PWRCTRL and SIM_RST on 36xx */
 #define OMAP3_CONTROL_PADCONF_SDMMC1_DAT4_OFFSET                0x120
 #define OMAP3_CONTROL_PADCONF_SDMMC1_DAT5_OFFSET                0x122
 #define OMAP3_CONTROL_PADCONF_SDMMC1_DAT6_OFFSET                0x124
 #define OMAP3_CONTROL_PADCONF_SDMMC1_DAT7_OFFSET                0x126
+
 #define OMAP3_CONTROL_PADCONF_SDMMC2_CLK_OFFSET                 0x128
 #define OMAP3_CONTROL_PADCONF_SDMMC2_CMD_OFFSET                 0x12a
 #define OMAP3_CONTROL_PADCONF_SDMMC2_DAT0_OFFSET                0x12c
@@ -281,6 +284,7 @@
 #define OMAP3_CONTROL_PADCONF_SAD2D_MCAD34_OFFSET               0x1f8
 #define OMAP3_CONTROL_PADCONF_SAD2D_MCAD35_OFFSET               0x1fa
 #define OMAP3_CONTROL_PADCONF_SAD2D_MCAD36_OFFSET               0x1fc
+
 /* Note that 34xx TRM has SAD2D instead of CHASSIS for these */
 #define OMAP3_CONTROL_PADCONF_CHASSIS_CLK26MI_OFFSET            0x1fe
 #define OMAP3_CONTROL_PADCONF_CHASSIS_NRESPWRON_OFFSET          0x200
@@ -302,6 +306,7 @@
 #define OMAP3_CONTROL_PADCONF_CHASSIS_MSTDBY_OFFSET             0x220
 #define OMAP3_CONTROL_PADCONF_CHASSIS_IDLEREQ_OFFSET            0x222
 #define OMAP3_CONTROL_PADCONF_CHASSIS_IDLEACK_OFFSET            0x224
+
 #define OMAP3_CONTROL_PADCONF_SAD2D_MWRITE_OFFSET               0x226
 #define OMAP3_CONTROL_PADCONF_SAD2D_SWRITE_OFFSET               0x228
 #define OMAP3_CONTROL_PADCONF_SAD2D_MREAD_OFFSET                0x22a
@@ -310,6 +315,43 @@
 #define OMAP3_CONTROL_PADCONF_SAD2D_SBUSFLAG_OFFSET             0x230
 #define OMAP3_CONTROL_PADCONF_SDRC_CKE0_OFFSET                  0x232
 #define OMAP3_CONTROL_PADCONF_SDRC_CKE1_OFFSET                  0x234
+
+/* 36xx only */
+#define OMAP3_CONTROL_PADCONF_GPMC_A11_OFFSET                   0x236
+#define OMAP3_CONTROL_PADCONF_SDRC_BA0_OFFSET                   0x570
+#define OMAP3_CONTROL_PADCONF_SDRC_BA1_OFFSET                   0x572
+#define OMAP3_CONTROL_PADCONF_SDRC_A0_OFFSET                    0x574
+#define OMAP3_CONTROL_PADCONF_SDRC_A1_OFFSET                    0x576
+#define OMAP3_CONTROL_PADCONF_SDRC_A2_OFFSET                    0x578
+#define OMAP3_CONTROL_PADCONF_SDRC_A3_OFFSET                    0x57a
+#define OMAP3_CONTROL_PADCONF_SDRC_A4_OFFSET                    0x57c
+#define OMAP3_CONTROL_PADCONF_SDRC_A5_OFFSET                    0x57e
+#define OMAP3_CONTROL_PADCONF_SDRC_A6_OFFSET                    0x580
+#define OMAP3_CONTROL_PADCONF_SDRC_A7_OFFSET                    0x582
+#define OMAP3_CONTROL_PADCONF_SDRC_A8_OFFSET                    0x584
+#define OMAP3_CONTROL_PADCONF_SDRC_A9_OFFSET                    0x586
+#define OMAP3_CONTROL_PADCONF_SDRC_A10_OFFSET                   0x588
+#define OMAP3_CONTROL_PADCONF_SDRC_A11_OFFSET                   0x58a
+#define OMAP3_CONTROL_PADCONF_SDRC_A12_OFFSET                   0x58c
+#define OMAP3_CONTROL_PADCONF_SDRC_A13_OFFSET                   0x58e
+#define OMAP3_CONTROL_PADCONF_SDRC_A14_OFFSET                   0x590
+#define OMAP3_CONTROL_PADCONF_SDRC_NCS0_OFFSET                  0x592
+#define OMAP3_CONTROL_PADCONF_SDRC_NCS1_OFFSET                  0x594
+#define OMAP3_CONTROL_PADCONF_SDRC_NCLK_OFFSET                  0x596
+#define OMAP3_CONTROL_PADCONF_SDRC_NRAS_OFFSET                  0x598
+#define OMAP3_CONTROL_PADCONF_SDRC_NCAS_OFFSET                  0x59a
+#define OMAP3_CONTROL_PADCONF_SDRC_NWE_OFFSET                   0x59c
+#define OMAP3_CONTROL_PADCONF_SDRC_DM0_OFFSET                   0x59e
+#define OMAP3_CONTROL_PADCONF_SDRC_DM1_OFFSET                   0x5a0
+#define OMAP3_CONTROL_PADCONF_SDRC_DM2_OFFSET                   0x5a2
+#define OMAP3_CONTROL_PADCONF_SDRC_DM3_OFFSET                   0x5a4
+
+/* 36xx only, these are SDMMC1_DAT4 - DAT7 on 34xx */
+#define OMAP3_CONTROL_PADCONF_SIM_IO_OFFSET                     0x120
+#define OMAP3_CONTROL_PADCONF_SIM_CLK_OFFSET                    0x122
+#define OMAP3_CONTROL_PADCONF_SIM_PWRCTRL_OFFSET                0x124
+#define OMAP3_CONTROL_PADCONF_SIM_RST_OFFSET                    0x126
+
 #define OMAP3_CONTROL_PADCONF_ETK_CLK_OFFSET                    0x5a8
 #define OMAP3_CONTROL_PADCONF_ETK_CTL_OFFSET                    0x5aa
 #define OMAP3_CONTROL_PADCONF_ETK_D0_OFFSET                     0x5ac