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authorRussell King <rmk+kernel@arm.linux.org.uk>2011-05-09 03:57:10 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-05-23 13:04:45 -0400
commit29d668d260a5a022eaad1cc91fea08d02deb45b1 (patch)
treeb5eabf162e00017827d4d167e800b45e12aeff57 /arch/arm/mach-omap1
parentdf4c144f7514071a54a46eaa5a9e16299c056e29 (diff)
ARM: omap1: delete useless interrupt handler
The OMAP1 clocksource interrupt handler just increments a variable which otherwise isn't used, so this seems to be unnecessary. Tony Lindgren confirms, so lets remove it. Acked-by: Kevin Hilman <khilman@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Cc: linux-omap@vger.kernel.org Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-omap1')
-rw-r--r--arch/arm/mach-omap1/time.c15
1 files changed, 0 insertions, 15 deletions
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index 6885d2fac18..e2c29b477c9 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -189,20 +189,6 @@ static __init void omap_init_mpu_timer(unsigned long rate)
189 * --------------------------------------------------------------------------- 189 * ---------------------------------------------------------------------------
190 */ 190 */
191 191
192static unsigned long omap_mpu_timer2_overflows;
193
194static irqreturn_t omap_mpu_timer2_interrupt(int irq, void *dev_id)
195{
196 omap_mpu_timer2_overflows++;
197 return IRQ_HANDLED;
198}
199
200static struct irqaction omap_mpu_timer2_irq = {
201 .name = "mpu_timer2",
202 .flags = IRQF_DISABLED,
203 .handler = omap_mpu_timer2_interrupt,
204};
205
206static cycle_t mpu_read(struct clocksource *cs) 192static cycle_t mpu_read(struct clocksource *cs)
207{ 193{
208 return ~omap_mpu_timer_read(1); 194 return ~omap_mpu_timer_read(1);
@@ -247,7 +233,6 @@ static void __init omap_init_clocksource(unsigned long rate)
247 static char err[] __initdata = KERN_ERR 233 static char err[] __initdata = KERN_ERR
248 "%s: can't register clocksource!\n"; 234 "%s: can't register clocksource!\n";
249 235
250 setup_irq(INT_TIMER2, &omap_mpu_timer2_irq);
251 omap_mpu_timer_start(1, ~0, 1); 236 omap_mpu_timer_start(1, ~0, 1);
252 init_sched_clock(&cd, mpu_update_sched_clock, 32, rate); 237 init_sched_clock(&cd, mpu_update_sched_clock, 32, rate);
253 238