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authorDan Williams <dan.j.williams@intel.com>2007-05-14 20:03:36 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-05-16 10:35:27 -0400
commitd73d8011779292788def2cd2520d6f39d9b406de (patch)
tree4a74fca4a1e549091414a0a0cbbc2cf63fcbd64e /arch/arm/mach-iop33x/irq.c
parente702a7155d14a6e11645e17d829217ae98fd45bb (diff)
[ARM] 4383/1: iop: fix usage of '__init' and 'inline' in iop files
WARNING: arch/arm/mach-iop13xx/built-in.o - Section mismatch: reference to .init.text:iop13xx_pcie_map_irq from .text between 'iop13xx_pci_setup' (at offset 0x7fc) and 'iop13xx_map_pci_memory' While fixing this warning I also recalled Adrian Bunk's recommendation to not use inline in .c files, as 'iop13xx_map_pci_memory' is needlessly inlined. Removing 'inline' uncovered some dead code so that is cleaned up as well. Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-iop33x/irq.c')
-rw-r--r--arch/arm/mach-iop33x/irq.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/mach-iop33x/irq.c b/arch/arm/mach-iop33x/irq.c
index c65ea78a242..f09dd054b9c 100644
--- a/arch/arm/mach-iop33x/irq.c
+++ b/arch/arm/mach-iop33x/irq.c
@@ -22,32 +22,32 @@
22static u32 iop33x_mask0; 22static u32 iop33x_mask0;
23static u32 iop33x_mask1; 23static u32 iop33x_mask1;
24 24
25static inline void intctl0_write(u32 val) 25static void intctl0_write(u32 val)
26{ 26{
27 asm volatile("mcr p6, 0, %0, c0, c0, 0" : : "r" (val)); 27 asm volatile("mcr p6, 0, %0, c0, c0, 0" : : "r" (val));
28} 28}
29 29
30static inline void intctl1_write(u32 val) 30static void intctl1_write(u32 val)
31{ 31{
32 asm volatile("mcr p6, 0, %0, c1, c0, 0" : : "r" (val)); 32 asm volatile("mcr p6, 0, %0, c1, c0, 0" : : "r" (val));
33} 33}
34 34
35static inline void intstr0_write(u32 val) 35static void intstr0_write(u32 val)
36{ 36{
37 asm volatile("mcr p6, 0, %0, c2, c0, 0" : : "r" (val)); 37 asm volatile("mcr p6, 0, %0, c2, c0, 0" : : "r" (val));
38} 38}
39 39
40static inline void intstr1_write(u32 val) 40static void intstr1_write(u32 val)
41{ 41{
42 asm volatile("mcr p6, 0, %0, c3, c0, 0" : : "r" (val)); 42 asm volatile("mcr p6, 0, %0, c3, c0, 0" : : "r" (val));
43} 43}
44 44
45static inline void intbase_write(u32 val) 45static void intbase_write(u32 val)
46{ 46{
47 asm volatile("mcr p6, 0, %0, c12, c0, 0" : : "r" (val)); 47 asm volatile("mcr p6, 0, %0, c12, c0, 0" : : "r" (val));
48} 48}
49 49
50static inline void intsize_write(u32 val) 50static void intsize_write(u32 val)
51{ 51{
52 asm volatile("mcr p6, 0, %0, c13, c0, 0" : : "r" (val)); 52 asm volatile("mcr p6, 0, %0, c13, c0, 0" : : "r" (val));
53} 53}