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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2007-05-05 15:59:27 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-05-05 15:59:27 -0400
commit3603ab2b62ad8372fc93816b080b370dd55d7cec (patch)
treee9012ae43fe5988c288074ee12fc4a0fc2f6b63a /arch/arm/mach-iop13xx
parent0af92befeb4b330c46cce6b520b2cc775cd6931f (diff)
[ARM] mm 10: allow memory type to be specified with ioremap
__ioremap() took a set of page table flags (specifically the cacheable and bufferable bits) to control the mapping type. However, with the advent of ARMv6, this is far too limited. Replace the page table flags with a memory type index, so that the desired attributes can be selected from the mem_type table. Finally, to prevent silent miscompilation due to the differing arguments, rename the __ioremap() and __ioremap_pfn() functions. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-iop13xx')
-rw-r--r--arch/arm/mach-iop13xx/io.c10
-rw-r--r--arch/arm/mach-iop13xx/pci.c8
2 files changed, 9 insertions, 9 deletions
diff --git a/arch/arm/mach-iop13xx/io.c b/arch/arm/mach-iop13xx/io.c
index e79a1b62600..5b22fdeca52 100644
--- a/arch/arm/mach-iop13xx/io.c
+++ b/arch/arm/mach-iop13xx/io.c
@@ -41,7 +41,7 @@ void * __iomem __iop13xx_io(unsigned long io_addr)
41EXPORT_SYMBOL(__iop13xx_io); 41EXPORT_SYMBOL(__iop13xx_io);
42 42
43void * __iomem __iop13xx_ioremap(unsigned long cookie, size_t size, 43void * __iomem __iop13xx_ioremap(unsigned long cookie, size_t size,
44 unsigned long flags) 44 unsigned int mtype)
45{ 45{
46 void __iomem * retval; 46 void __iomem * retval;
47 47
@@ -61,9 +61,9 @@ void * __iomem __iop13xx_ioremap(unsigned long cookie, size_t size,
61 (cookie - IOP13XX_PCIE_LOWER_MEM_RA)); 61 (cookie - IOP13XX_PCIE_LOWER_MEM_RA));
62 break; 62 break;
63 case IOP13XX_PBI_LOWER_MEM_RA ... IOP13XX_PBI_UPPER_MEM_RA: 63 case IOP13XX_PBI_LOWER_MEM_RA ... IOP13XX_PBI_UPPER_MEM_RA:
64 retval = __ioremap(IOP13XX_PBI_LOWER_MEM_PA + 64 retval = __arm_ioremap(IOP13XX_PBI_LOWER_MEM_PA +
65 (cookie - IOP13XX_PBI_LOWER_MEM_RA), 65 (cookie - IOP13XX_PBI_LOWER_MEM_RA),
66 size, flags); 66 size, mtype);
67 break; 67 break;
68 case IOP13XX_PCIE_LOWER_IO_PA ... IOP13XX_PCIE_UPPER_IO_PA: 68 case IOP13XX_PCIE_LOWER_IO_PA ... IOP13XX_PCIE_UPPER_IO_PA:
69 retval = (void *) IOP13XX_PCIE_IO_PHYS_TO_VIRT(cookie); 69 retval = (void *) IOP13XX_PCIE_IO_PHYS_TO_VIRT(cookie);
@@ -75,7 +75,7 @@ void * __iomem __iop13xx_ioremap(unsigned long cookie, size_t size,
75 retval = (void *) IOP13XX_PMMR_PHYS_TO_VIRT(cookie); 75 retval = (void *) IOP13XX_PMMR_PHYS_TO_VIRT(cookie);
76 break; 76 break;
77 default: 77 default:
78 retval = __ioremap(cookie, size, flags); 78 retval = __arm_ioremap(cookie, size, mtype);
79 } 79 }
80 80
81 return retval; 81 return retval;
diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c
index 89ec70ea318..d85b88fcb7e 100644
--- a/arch/arm/mach-iop13xx/pci.c
+++ b/arch/arm/mach-iop13xx/pci.c
@@ -88,9 +88,9 @@ void iop13xx_map_pci_memory(void)
88 88
89 if (end) { 89 if (end) {
90 iop13xx_atux_mem_base = 90 iop13xx_atux_mem_base =
91 (u32) __ioremap_pfn( 91 (u32) __arm_ioremap_pfn(
92 __phys_to_pfn(IOP13XX_PCIX_LOWER_MEM_PA) 92 __phys_to_pfn(IOP13XX_PCIX_LOWER_MEM_PA)
93 , 0, iop13xx_atux_mem_size, 0); 93 , 0, iop13xx_atux_mem_size, MT_DEVICE);
94 if (!iop13xx_atux_mem_base) { 94 if (!iop13xx_atux_mem_base) {
95 printk("%s: atux allocation " 95 printk("%s: atux allocation "
96 "failed\n", __FUNCTION__); 96 "failed\n", __FUNCTION__);
@@ -114,9 +114,9 @@ void iop13xx_map_pci_memory(void)
114 114
115 if (end) { 115 if (end) {
116 iop13xx_atue_mem_base = 116 iop13xx_atue_mem_base =
117 (u32) __ioremap_pfn( 117 (u32) __arm_ioremap_pfn(
118 __phys_to_pfn(IOP13XX_PCIE_LOWER_MEM_PA) 118 __phys_to_pfn(IOP13XX_PCIE_LOWER_MEM_PA)
119 , 0, iop13xx_atue_mem_size, 0); 119 , 0, iop13xx_atue_mem_size, MT_DEVICE);
120 if (!iop13xx_atue_mem_base) { 120 if (!iop13xx_atue_mem_base) {
121 printk("%s: atue allocation " 121 printk("%s: atue allocation "
122 "failed\n", __FUNCTION__); 122 "failed\n", __FUNCTION__);