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authorLinus Torvalds <torvalds@linux-foundation.org>2011-01-07 20:08:46 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2011-01-07 20:08:46 -0500
commit021db8e2bde53024a163fb4417a185de46fe77aa (patch)
tree098a28bd2414ea2622493a1736a677dab5085dfc /arch/arm/mach-davinci/include
parent72eb6a791459c87a0340318840bb3bd9252b627b (diff)
parent07fe0351702b6f0c9749e80cdbcb758686b0fe9b (diff)
Merge branch 'next-spi' of git://git.secretlab.ca/git/linux-2.6
* 'next-spi' of git://git.secretlab.ca/git/linux-2.6: (77 commits) spi/omap: Fix DMA API usage in OMAP MCSPI driver spi/imx: correct the test on platform_get_irq() return value spi/topcliff: Typo fix threhold to threshold spi/dw_spi Typo change diable to disable. spi/fsl_espi: change the read behaviour of the SPIRF spi/mpc52xx-psc-spi: move probe/remove to proper sections spi/dw_spi: add DMA support spi/dw_spi: change to EXPORT_SYMBOL_GPL for exported APIs spi/dw_spi: Fix too short timeout in spi polling loop spi/pl022: convert running variable spi/pl022: convert busy flag to a bool spi/pl022: pass the returned sglen to the DMA engine spi/pl022: map the buffers on the DMA engine spi/topcliff_pch: Fix data transfer issue spi/imx: remove autodetection spi/pxa2xx: pass of_node to spi device and set a parent device spi/pxa2xx: Modify RX-Tresh instead of busy-loop for the remaining RX bytes. spi/pxa2xx: Add chipselect support for Sodaville spi/pxa2xx: Consider CE4100's FIFO depth spi/pxa2xx: Add CE4100 support ...
Diffstat (limited to 'arch/arm/mach-davinci/include')
-rw-r--r--arch/arm/mach-davinci/include/mach/spi.h52
1 files changed, 46 insertions, 6 deletions
diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h
index 910efbf099c..38f4da5ca13 100644
--- a/arch/arm/mach-davinci/include/mach/spi.h
+++ b/arch/arm/mach-davinci/include/mach/spi.h
@@ -19,26 +19,66 @@
19#ifndef __ARCH_ARM_DAVINCI_SPI_H 19#ifndef __ARCH_ARM_DAVINCI_SPI_H
20#define __ARCH_ARM_DAVINCI_SPI_H 20#define __ARCH_ARM_DAVINCI_SPI_H
21 21
22#define SPI_INTERN_CS 0xFF
23
22enum { 24enum {
23 SPI_VERSION_1, /* For DM355/DM365/DM6467 */ 25 SPI_VERSION_1, /* For DM355/DM365/DM6467 */
24 SPI_VERSION_2, /* For DA8xx */ 26 SPI_VERSION_2, /* For DA8xx */
25}; 27};
26 28
29/**
30 * davinci_spi_platform_data - Platform data for SPI master device on DaVinci
31 *
32 * @version: version of the SPI IP. Different DaVinci devices have slightly
33 * varying versions of the same IP.
34 * @num_chipselect: number of chipselects supported by this SPI master
35 * @intr_line: interrupt line used to connect the SPI IP to the ARM interrupt
36 * controller withn the SoC. Possible values are 0 and 1.
37 * @chip_sel: list of GPIOs which can act as chip-selects for the SPI.
38 * SPI_INTERN_CS denotes internal SPI chip-select. Not necessary
39 * to populate if all chip-selects are internal.
40 * @cshold_bug: set this to true if the SPI controller on your chip requires
41 * a write to CSHOLD bit in between transfers (like in DM355).
42 */
27struct davinci_spi_platform_data { 43struct davinci_spi_platform_data {
28 u8 version; 44 u8 version;
29 u8 num_chipselect; 45 u8 num_chipselect;
46 u8 intr_line;
47 u8 *chip_sel;
48 bool cshold_bug;
49};
50
51/**
52 * davinci_spi_config - Per-chip-select configuration for SPI slave devices
53 *
54 * @wdelay: amount of delay between transmissions. Measured in number of
55 * SPI module clocks.
56 * @odd_parity: polarity of parity flag at the end of transmit data stream.
57 * 0 - odd parity, 1 - even parity.
58 * @parity_enable: enable transmission of parity at end of each transmit
59 * data stream.
60 * @io_type: type of IO transfer. Choose between polled, interrupt and DMA.
61 * @timer_disable: disable chip-select timers (setup and hold)
62 * @c2tdelay: chip-select setup time. Measured in number of SPI module clocks.
63 * @t2cdelay: chip-select hold time. Measured in number of SPI module clocks.
64 * @t2edelay: transmit data finished to SPI ENAn pin inactive time. Measured
65 * in number of SPI clocks.
66 * @c2edelay: chip-select active to SPI ENAn signal active time. Measured in
67 * number of SPI clocks.
68 */
69struct davinci_spi_config {
30 u8 wdelay; 70 u8 wdelay;
31 u8 odd_parity; 71 u8 odd_parity;
32 u8 parity_enable; 72 u8 parity_enable;
33 u8 wait_enable; 73#define SPI_IO_TYPE_INTR 0
74#define SPI_IO_TYPE_POLL 1
75#define SPI_IO_TYPE_DMA 2
76 u8 io_type;
34 u8 timer_disable; 77 u8 timer_disable;
35 u8 clk_internal;
36 u8 cs_hold;
37 u8 intr_level;
38 u8 poll_mode;
39 u8 use_dma;
40 u8 c2tdelay; 78 u8 c2tdelay;
41 u8 t2cdelay; 79 u8 t2cdelay;
80 u8 t2edelay;
81 u8 c2edelay;
42}; 82};
43 83
44#endif /* __ARCH_ARM_DAVINCI_SPI_H */ 84#endif /* __ARCH_ARM_DAVINCI_SPI_H */