diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-01-15 15:33:40 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-01-15 15:33:40 -0500 |
commit | 16c1020362083b320868c0deef492249089c3cd3 (patch) | |
tree | ff200df3502e6010745713275d69fd0a07e399cf /arch/arm/mach-bcmring | |
parent | 65e5d002b5ad220db2bf9557f53de5a98f7dab86 (diff) | |
parent | bbba75606963c82febf7bd2761ea848ac5d1a1bb (diff) |
Merge branch 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-arm: (161 commits)
ARM: pxa: fix building issue of missing physmap.h
ARM: mmp: PXA910 drive strength FAST using wrong value
ARM: mmp: MMP2 drive strength FAST using wrong value
ARM: pxa: fix recursive calls in pxa_low_gpio_chip
AT91: Support for gsia18s board
AT91: Acme Systems FOX Board G20 board files
AT91: board-sam9m10g45ek.c: Remove duplicate inclusion of mach/hardware.h
ARM: pxa: fix suspend/resume array index miscalculation
ARM: pxa: use cpu_has_ipr() consistently in irq.c
ARM: pxa: remove unused variable in clock-pxa3xx.c
ARM: pxa: fix warning in zeus.c
ARM: sa1111: fix typo in sa1111_retrigger_lowirq()
ARM mxs: clkdev related compile fixes
ARM i.MX mx31_3ds: Fix MC13783 regulator names
ARM: plat-stmp3xxx: irq_data conversion.
ARM: plat-spear: irq_data conversion.
ARM: plat-orion: irq_data conversion.
ARM: plat-omap: irq_data conversion.
ARM: plat-nomadik: irq_data conversion.
ARM: plat-mxc: irq_data conversion.
...
Fix up trivial conflict in arch/arm/plat-omap/gpio.c (Lennert
Buytenhek's irq_data conversion clashing with some omap irq updates)
Diffstat (limited to 'arch/arm/mach-bcmring')
-rw-r--r-- | arch/arm/mach-bcmring/irq.c | 42 |
1 files changed, 21 insertions, 21 deletions
diff --git a/arch/arm/mach-bcmring/irq.c b/arch/arm/mach-bcmring/irq.c index e3152631eb3..84dcda0d1d9 100644 --- a/arch/arm/mach-bcmring/irq.c +++ b/arch/arm/mach-bcmring/irq.c | |||
@@ -30,61 +30,61 @@ | |||
30 | #include <mach/csp/intcHw_reg.h> | 30 | #include <mach/csp/intcHw_reg.h> |
31 | #include <mach/csp/mm_io.h> | 31 | #include <mach/csp/mm_io.h> |
32 | 32 | ||
33 | static void bcmring_mask_irq0(unsigned int irq) | 33 | static void bcmring_mask_irq0(struct irq_data *d) |
34 | { | 34 | { |
35 | writel(1 << (irq - IRQ_INTC0_START), | 35 | writel(1 << (d->irq - IRQ_INTC0_START), |
36 | MM_IO_BASE_INTC0 + INTCHW_INTENCLEAR); | 36 | MM_IO_BASE_INTC0 + INTCHW_INTENCLEAR); |
37 | } | 37 | } |
38 | 38 | ||
39 | static void bcmring_unmask_irq0(unsigned int irq) | 39 | static void bcmring_unmask_irq0(struct irq_data *d) |
40 | { | 40 | { |
41 | writel(1 << (irq - IRQ_INTC0_START), | 41 | writel(1 << (d->irq - IRQ_INTC0_START), |
42 | MM_IO_BASE_INTC0 + INTCHW_INTENABLE); | 42 | MM_IO_BASE_INTC0 + INTCHW_INTENABLE); |
43 | } | 43 | } |
44 | 44 | ||
45 | static void bcmring_mask_irq1(unsigned int irq) | 45 | static void bcmring_mask_irq1(struct irq_data *d) |
46 | { | 46 | { |
47 | writel(1 << (irq - IRQ_INTC1_START), | 47 | writel(1 << (d->irq - IRQ_INTC1_START), |
48 | MM_IO_BASE_INTC1 + INTCHW_INTENCLEAR); | 48 | MM_IO_BASE_INTC1 + INTCHW_INTENCLEAR); |
49 | } | 49 | } |
50 | 50 | ||
51 | static void bcmring_unmask_irq1(unsigned int irq) | 51 | static void bcmring_unmask_irq1(struct irq_data *d) |
52 | { | 52 | { |
53 | writel(1 << (irq - IRQ_INTC1_START), | 53 | writel(1 << (d->irq - IRQ_INTC1_START), |
54 | MM_IO_BASE_INTC1 + INTCHW_INTENABLE); | 54 | MM_IO_BASE_INTC1 + INTCHW_INTENABLE); |
55 | } | 55 | } |
56 | 56 | ||
57 | static void bcmring_mask_irq2(unsigned int irq) | 57 | static void bcmring_mask_irq2(struct irq_data *d) |
58 | { | 58 | { |
59 | writel(1 << (irq - IRQ_SINTC_START), | 59 | writel(1 << (d->irq - IRQ_SINTC_START), |
60 | MM_IO_BASE_SINTC + INTCHW_INTENCLEAR); | 60 | MM_IO_BASE_SINTC + INTCHW_INTENCLEAR); |
61 | } | 61 | } |
62 | 62 | ||
63 | static void bcmring_unmask_irq2(unsigned int irq) | 63 | static void bcmring_unmask_irq2(struct irq_data *d) |
64 | { | 64 | { |
65 | writel(1 << (irq - IRQ_SINTC_START), | 65 | writel(1 << (d->irq - IRQ_SINTC_START), |
66 | MM_IO_BASE_SINTC + INTCHW_INTENABLE); | 66 | MM_IO_BASE_SINTC + INTCHW_INTENABLE); |
67 | } | 67 | } |
68 | 68 | ||
69 | static struct irq_chip bcmring_irq0_chip = { | 69 | static struct irq_chip bcmring_irq0_chip = { |
70 | .name = "ARM-INTC0", | 70 | .name = "ARM-INTC0", |
71 | .ack = bcmring_mask_irq0, | 71 | .irq_ack = bcmring_mask_irq0, |
72 | .mask = bcmring_mask_irq0, /* mask a specific interrupt, blocking its delivery. */ | 72 | .irq_mask = bcmring_mask_irq0, /* mask a specific interrupt, blocking its delivery. */ |
73 | .unmask = bcmring_unmask_irq0, /* unmaks an interrupt */ | 73 | .irq_unmask = bcmring_unmask_irq0, /* unmaks an interrupt */ |
74 | }; | 74 | }; |
75 | 75 | ||
76 | static struct irq_chip bcmring_irq1_chip = { | 76 | static struct irq_chip bcmring_irq1_chip = { |
77 | .name = "ARM-INTC1", | 77 | .name = "ARM-INTC1", |
78 | .ack = bcmring_mask_irq1, | 78 | .irq_ack = bcmring_mask_irq1, |
79 | .mask = bcmring_mask_irq1, | 79 | .irq_mask = bcmring_mask_irq1, |
80 | .unmask = bcmring_unmask_irq1, | 80 | .irq_unmask = bcmring_unmask_irq1, |
81 | }; | 81 | }; |
82 | 82 | ||
83 | static struct irq_chip bcmring_irq2_chip = { | 83 | static struct irq_chip bcmring_irq2_chip = { |
84 | .name = "ARM-SINTC", | 84 | .name = "ARM-SINTC", |
85 | .ack = bcmring_mask_irq2, | 85 | .irq_ack = bcmring_mask_irq2, |
86 | .mask = bcmring_mask_irq2, | 86 | .irq_mask = bcmring_mask_irq2, |
87 | .unmask = bcmring_unmask_irq2, | 87 | .irq_unmask = bcmring_unmask_irq2, |
88 | }; | 88 | }; |
89 | 89 | ||
90 | static void vic_init(void __iomem *base, struct irq_chip *chip, | 90 | static void vic_init(void __iomem *base, struct irq_chip *chip, |