aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/kernel
diff options
context:
space:
mode:
authorGrant Likely <grant.likely@secretlab.ca>2011-04-28 16:27:20 -0400
committerGrant Likely <grant.likely@secretlab.ca>2011-05-11 09:12:32 -0400
commit4c2896e88d976d0e5b2213c64cde885f5677fa2b (patch)
treed5573124e35cb3b81b7ac56fb4d7708eacf4991d /arch/arm/kernel
parent7ee4b98eca42c1ff1df7dcf443dac07f0a2ea93d (diff)
arm/dt: Make __vet_atags also accept a dtb image
The dtb is passed to the kernel via register r2, which is the same method that is used to pass an atags pointer. This patch modifies __vet_atags to not clear r2 when it encounters a dtb image. v2: fixed bugs pointed out by Nicolas Pitre Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'arch/arm/kernel')
-rw-r--r--arch/arm/kernel/head-common.S24
-rw-r--r--arch/arm/kernel/head.S8
2 files changed, 22 insertions, 10 deletions
diff --git a/arch/arm/kernel/head-common.S b/arch/arm/kernel/head-common.S
index c84b57d27d0..854bd22380d 100644
--- a/arch/arm/kernel/head-common.S
+++ b/arch/arm/kernel/head-common.S
@@ -15,6 +15,12 @@
15#define ATAG_CORE_SIZE ((2*4 + 3*4) >> 2) 15#define ATAG_CORE_SIZE ((2*4 + 3*4) >> 2)
16#define ATAG_CORE_SIZE_EMPTY ((2*4) >> 2) 16#define ATAG_CORE_SIZE_EMPTY ((2*4) >> 2)
17 17
18#ifdef CONFIG_CPU_BIG_ENDIAN
19#define OF_DT_MAGIC 0xd00dfeed
20#else
21#define OF_DT_MAGIC 0xedfe0dd0 /* 0xd00dfeed in big-endian */
22#endif
23
18/* 24/*
19 * Exception handling. Something went wrong and we can't proceed. We 25 * Exception handling. Something went wrong and we can't proceed. We
20 * ought to tell the user, but since we don't have any guarantee that 26 * ought to tell the user, but since we don't have any guarantee that
@@ -28,20 +34,26 @@
28 34
29/* Determine validity of the r2 atags pointer. The heuristic requires 35/* Determine validity of the r2 atags pointer. The heuristic requires
30 * that the pointer be aligned, in the first 16k of physical RAM and 36 * that the pointer be aligned, in the first 16k of physical RAM and
31 * that the ATAG_CORE marker is first and present. Future revisions 37 * that the ATAG_CORE marker is first and present. If CONFIG_OF_FLATTREE
38 * is selected, then it will also accept a dtb pointer. Future revisions
32 * of this function may be more lenient with the physical address and 39 * of this function may be more lenient with the physical address and
33 * may also be able to move the ATAGS block if necessary. 40 * may also be able to move the ATAGS block if necessary.
34 * 41 *
35 * Returns: 42 * Returns:
36 * r2 either valid atags pointer, or zero 43 * r2 either valid atags pointer, valid dtb pointer, or zero
37 * r5, r6 corrupted 44 * r5, r6 corrupted
38 */ 45 */
39__vet_atags: 46__vet_atags:
40 tst r2, #0x3 @ aligned? 47 tst r2, #0x3 @ aligned?
41 bne 1f 48 bne 1f
42 49
43 ldr r5, [r2, #0] @ is first tag ATAG_CORE? 50 ldr r5, [r2, #0]
44 cmp r5, #ATAG_CORE_SIZE 51#ifdef CONFIG_OF_FLATTREE
52 ldr r6, =OF_DT_MAGIC @ is it a DTB?
53 cmp r5, r6
54 beq 2f
55#endif
56 cmp r5, #ATAG_CORE_SIZE @ is first tag ATAG_CORE?
45 cmpne r5, #ATAG_CORE_SIZE_EMPTY 57 cmpne r5, #ATAG_CORE_SIZE_EMPTY
46 bne 1f 58 bne 1f
47 ldr r5, [r2, #4] 59 ldr r5, [r2, #4]
@@ -49,7 +61,7 @@ __vet_atags:
49 cmp r5, r6 61 cmp r5, r6
50 bne 1f 62 bne 1f
51 63
52 mov pc, lr @ atag pointer is ok 642: mov pc, lr @ atag/dtb pointer is ok
53 65
541: mov r2, #0 661: mov r2, #0
55 mov pc, lr 67 mov pc, lr
@@ -61,7 +73,7 @@ ENDPROC(__vet_atags)
61 * 73 *
62 * r0 = cp#15 control register 74 * r0 = cp#15 control register
63 * r1 = machine ID 75 * r1 = machine ID
64 * r2 = atags pointer 76 * r2 = atags/dtb pointer
65 * r9 = processor ID 77 * r9 = processor ID
66 */ 78 */
67 __INIT 79 __INIT
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index c9173cfbbc7..a5e5c5b9b48 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -59,7 +59,7 @@
59 * 59 *
60 * This is normally called from the decompressor code. The requirements 60 * This is normally called from the decompressor code. The requirements
61 * are: MMU = off, D-cache = off, I-cache = dont care, r0 = 0, 61 * are: MMU = off, D-cache = off, I-cache = dont care, r0 = 0,
62 * r1 = machine nr, r2 = atags pointer. 62 * r1 = machine nr, r2 = atags or dtb pointer.
63 * 63 *
64 * This code is mostly position independent, so if you link the kernel at 64 * This code is mostly position independent, so if you link the kernel at
65 * 0xc0008000, you call this at __pa(0xc0008000). 65 * 0xc0008000, you call this at __pa(0xc0008000).
@@ -91,7 +91,7 @@ ENTRY(stext)
91#endif 91#endif
92 92
93 /* 93 /*
94 * r1 = machine no, r2 = atags, 94 * r1 = machine no, r2 = atags or dtb,
95 * r8 = phys_offset, r9 = cpuid, r10 = procinfo 95 * r8 = phys_offset, r9 = cpuid, r10 = procinfo
96 */ 96 */
97 bl __vet_atags 97 bl __vet_atags
@@ -339,7 +339,7 @@ __secondary_data:
339 * 339 *
340 * r0 = cp#15 control register 340 * r0 = cp#15 control register
341 * r1 = machine ID 341 * r1 = machine ID
342 * r2 = atags pointer 342 * r2 = atags or dtb pointer
343 * r4 = page table pointer 343 * r4 = page table pointer
344 * r9 = processor ID 344 * r9 = processor ID
345 * r13 = *virtual* address to jump to upon completion 345 * r13 = *virtual* address to jump to upon completion
@@ -376,7 +376,7 @@ ENDPROC(__enable_mmu)
376 * 376 *
377 * r0 = cp#15 control register 377 * r0 = cp#15 control register
378 * r1 = machine ID 378 * r1 = machine ID
379 * r2 = atags pointer 379 * r2 = atags or dtb pointer
380 * r9 = processor ID 380 * r9 = processor ID
381 * r13 = *virtual* address to jump to upon completion 381 * r13 = *virtual* address to jump to upon completion
382 * 382 *