Merge branch 'x86/mpparse' into x86/devel

Conflicts:

	arch/x86/Kconfig
	arch/x86/kernel/io_apic_32.c
	arch/x86/kernel/setup_64.c
	arch/x86/mm/init_32.c

Signed-off-by: Ingo Molnar <mingo@elte.hu>

1 files changed, 23 insertions, 0 deletions

diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index 7b44e492cf6..da13d6d1b2b 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -610,6 +610,29 @@ and is between 256 and 4096 characters. It is defined in the file
                         See drivers/char/README.epca and
                         Documentation/digiepca.txt.
 
+        disable_mtrr_cleanup [X86]
+        enable_mtrr_cleanup [X86]
+                        The kernel tries to adjust MTRR layout from continuous
+                        to discrete, to make X server driver able to add WB
+                        entry later. This parameter enables/disables that.
+
+        mtrr_chunk_size=nn[KMG] [X86]
+                        used for mtrr cleanup. It is largest continous chunk
+                        that could hold holes aka. UC entries.
+
+        mtrr_gran_size=nn[KMG] [X86]
+                        Used for mtrr cleanup. It is granularity of mtrr block.
+                        Default is 1.
+                        Large value could prevent small alignment from
+                        using up MTRRs.
+
+        mtrr_spare_reg_nr=n [X86]
+                        Format: <integer>
+                        Range: 0,7 : spare reg number
+                        Default : 1
+                        Used for mtrr cleanup. It is spare mtrr entries number.
+                        Set to 2 or more if your graphical card needs more.
+
         disable_mtrr_trim [X86, Intel and AMD only]
                         By default the kernel will trim any uncacheable
                         memory out of your available memory pool based on