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authorLen Brown <len.brown@intel.com>2010-08-15 01:06:31 -0400
committerLen Brown <len.brown@intel.com>2010-08-15 01:06:31 -0400
commit95ee46aa8698f2000647dfb362400fadbb5807cf (patch)
treee5a05c7297f997e191c73091934e42e3195c0e40 /Documentation/powerpc/dts-bindings/fsl/diu.txt
parentcfa806f059801dbe7e435745eb2e187c8bfe1e7f (diff)
parent92fa5bd9a946b6e7aab6764e7312e4e3d9bed295 (diff)
Merge branch 'linus' into release
Conflicts: drivers/acpi/debug.c Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'Documentation/powerpc/dts-bindings/fsl/diu.txt')
-rw-r--r--Documentation/powerpc/dts-bindings/fsl/diu.txt20
1 files changed, 18 insertions, 2 deletions
diff --git a/Documentation/powerpc/dts-bindings/fsl/diu.txt b/Documentation/powerpc/dts-bindings/fsl/diu.txt
index deb35de7098..b66cb6d31d6 100644
--- a/Documentation/powerpc/dts-bindings/fsl/diu.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/diu.txt
@@ -4,10 +4,17 @@ The Freescale DIU is a LCD controller, with proper hardware, it can also
4drive DVI monitors. 4drive DVI monitors.
5 5
6Required properties: 6Required properties:
7- compatible : should be "fsl-diu". 7- compatible : should be "fsl,diu" or "fsl,mpc5121-diu".
8- reg : should contain at least address and length of the DIU register 8- reg : should contain at least address and length of the DIU register
9 set. 9 set.
10- Interrupts : one DIU interrupt should be describe here. 10- interrupts : one DIU interrupt should be described here.
11- interrupt-parent : the phandle for the interrupt controller that
12 services interrupts for this device.
13
14Optional properties:
15- edid : verbatim EDID data block describing attached display.
16 Data from the detailed timing descriptor will be used to
17 program the display controller.
11 18
12Example (MPC8610HPCD): 19Example (MPC8610HPCD):
13 display@2c000 { 20 display@2c000 {
@@ -16,3 +23,12 @@ Example (MPC8610HPCD):
16 interrupts = <72 2>; 23 interrupts = <72 2>;
17 interrupt-parent = <&mpic>; 24 interrupt-parent = <&mpic>;
18 }; 25 };
26
27Example for MPC5121:
28 display@2100 {
29 compatible = "fsl,mpc5121-diu";
30 reg = <0x2100 0x100>;
31 interrupts = <64 0x8>;
32 interrupt-parent = <&ipic>;
33 edid = [edid-data];
34 };