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authorBen Dooks <ben-linux@fluff.org>2007-02-27 18:16:26 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-03-02 06:58:58 -0500
commit540988eb67f2eee80d0e44bf5f606e388b80500e (patch)
tree0065a43f9c83a0a1b33d0ecb3e79f556b7a0a4bc /Documentation/arm
parent1b7b56982fdcd9d85effd76f3928cf5d6eb26155 (diff)
[ARM] 4238/1: S3C24XX: docs: update suspend and resume
Remove some of the explicit use of S3C2410 where it is generic to all the S3C24XX series. Add more info on the CRC code, and add an example of using IRQ_EINT0 to resume from suspend Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'Documentation/arm')
-rw-r--r--Documentation/arm/Samsung-S3C24XX/Suspend.txt35
1 files changed, 33 insertions, 2 deletions
diff --git a/Documentation/arm/Samsung-S3C24XX/Suspend.txt b/Documentation/arm/Samsung-S3C24XX/Suspend.txt
index e12bc3284a2..0dab6e32c13 100644
--- a/Documentation/arm/Samsung-S3C24XX/Suspend.txt
+++ b/Documentation/arm/Samsung-S3C24XX/Suspend.txt
@@ -5,10 +5,10 @@
5Introduction 5Introduction
6------------ 6------------
7 7
8 The S3C2410 supports a low-power suspend mode, where the SDRAM is kept 8 The S3C24XX supports a low-power suspend mode, where the SDRAM is kept
9 in Self-Refresh mode, and all but the essential peripheral blocks are 9 in Self-Refresh mode, and all but the essential peripheral blocks are
10 powered down. For more information on how this works, please look 10 powered down. For more information on how this works, please look
11 at the S3C2410 datasheets from Samsung. 11 at the relevant CPU datasheet from Samsung.
12 12
13 13
14Requirements 14Requirements
@@ -56,6 +56,27 @@ Machine Support
56 Note, the original method of adding an late_initcall() is wrong, 56 Note, the original method of adding an late_initcall() is wrong,
57 and will end up initialising all compiled machines' pm init! 57 and will end up initialising all compiled machines' pm init!
58 58
59 The following is an example of code used for testing wakeup from
60 an falling edge on IRQ_EINT0:
61
62
63static irqreturn_t button_irq(int irq, void *pw)
64{
65 return IRQ_HANDLED;
66}
67
68statuc void __init machine_init(void)
69{
70 ...
71
72 request_irq(IRQ_EINT0, button_irq, IRQF_TRIGGER_FALLING,
73 "button-irq-eint0", NULL);
74
75 enable_irq_wake(IRQ_EINT0);
76
77 s3c2410_pm_init();
78}
79
59 80
60Debugging 81Debugging
61--------- 82---------
@@ -70,6 +91,12 @@ Debugging
70 care should be taken that any external clock sources that the UARTs 91 care should be taken that any external clock sources that the UARTs
71 rely on are still enabled at that point. 92 rely on are still enabled at that point.
72 93
94 3) If any debugging is placed in the resume path, then it must have the
95 relevant clocks and peripherals setup before use (ie, bootloader).
96
97 For example, if you transmit a character from the UART, the baud
98 rate and uart controls must be setup beforehand.
99
73 100
74Configuration 101Configuration
75------------- 102-------------
@@ -89,6 +116,10 @@ Configuration
89 Allows the entire memory to be checksummed before and after the 116 Allows the entire memory to be checksummed before and after the
90 suspend to see if there has been any corruption of the contents. 117 suspend to see if there has been any corruption of the contents.
91 118
119 Note, the time to calculate the CRC is dependant on the CPU speed
120 and the size of memory. For an 64Mbyte RAM area on an 200MHz
121 S3C2410, this can take approximately 4 seconds to complete.
122
92 This support requires the CRC32 function to be enabled. 123 This support requires the CRC32 function to be enabled.
93 124
94 125