diff options
author | Ben Dooks <ben-linux@fluff.org> | 2007-05-28 13:19:16 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-05-30 08:15:23 -0400 |
commit | eca8c2424171b6b6b2dcb0faa92dfddd1e3297d9 (patch) | |
tree | 680afa1b68832a4a81f07d706e4249a0f4290afa | |
parent | 486cab2ba25b469f7a8822e84fd43960a472e3d9 (diff) |
[ARM] 4412/1: S3C2412: reset errata fix
The S3C2412 has an reset-errata where the clock
may cause a glitch switching back to EXTCLK. We
force a switch to EXTCLK before writing the
reset register to force use of the CLKCON sync
logic to properly switch.
Fix problem reported by Matthieu Castet.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r-- | arch/arm/mach-s3c2412/s3c2412.c | 24 | ||||
-rw-r--r-- | include/asm-arm/arch-s3c2410/regs-s3c2412.h | 21 |
2 files changed, 45 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c index c602aa39f9c..782b5814ced 100644 --- a/arch/arm/mach-s3c2412/s3c2412.c +++ b/arch/arm/mach-s3c2412/s3c2412.c | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <linux/list.h> | 16 | #include <linux/list.h> |
17 | #include <linux/timer.h> | 17 | #include <linux/timer.h> |
18 | #include <linux/init.h> | 18 | #include <linux/init.h> |
19 | #include <linux/delay.h> | ||
19 | #include <linux/sysdev.h> | 20 | #include <linux/sysdev.h> |
20 | #include <linux/serial_core.h> | 21 | #include <linux/serial_core.h> |
21 | #include <linux/platform_device.h> | 22 | #include <linux/platform_device.h> |
@@ -29,6 +30,7 @@ | |||
29 | #include <asm/io.h> | 30 | #include <asm/io.h> |
30 | #include <asm/irq.h> | 31 | #include <asm/irq.h> |
31 | 32 | ||
33 | #include <asm/arch/reset.h> | ||
32 | #include <asm/arch/idle.h> | 34 | #include <asm/arch/idle.h> |
33 | 35 | ||
34 | #include <asm/arch/regs-clock.h> | 36 | #include <asm/arch/regs-clock.h> |
@@ -38,6 +40,7 @@ | |||
38 | #include <asm/arch/regs-gpioj.h> | 40 | #include <asm/arch/regs-gpioj.h> |
39 | #include <asm/arch/regs-dsc.h> | 41 | #include <asm/arch/regs-dsc.h> |
40 | #include <asm/arch/regs-spi.h> | 42 | #include <asm/arch/regs-spi.h> |
43 | #include <asm/arch/regs-s3c2412.h> | ||
41 | 44 | ||
42 | #include <asm/plat-s3c24xx/s3c2412.h> | 45 | #include <asm/plat-s3c24xx/s3c2412.h> |
43 | #include <asm/plat-s3c24xx/cpu.h> | 46 | #include <asm/plat-s3c24xx/cpu.h> |
@@ -106,6 +109,23 @@ static void s3c2412_idle(void) | |||
106 | cpu_do_idle(); | 109 | cpu_do_idle(); |
107 | } | 110 | } |
108 | 111 | ||
112 | static void s3c2412_hard_reset(void) | ||
113 | { | ||
114 | /* errata "Watch-dog/Software Reset Problem" specifies that | ||
115 | * this reset must be done with the SYSCLK sourced from | ||
116 | * EXTCLK instead of FOUT to avoid a glitch in the reset | ||
117 | * mechanism. | ||
118 | * | ||
119 | * See the watchdog section of the S3C2412 manual for more | ||
120 | * information on this fix. | ||
121 | */ | ||
122 | |||
123 | __raw_writel(0x00, S3C2412_CLKSRC); | ||
124 | __raw_writel(S3C2412_SWRST_RESET, S3C2412_SWRST); | ||
125 | |||
126 | mdelay(1); | ||
127 | } | ||
128 | |||
109 | /* s3c2412_map_io | 129 | /* s3c2412_map_io |
110 | * | 130 | * |
111 | * register the standard cpu IO areas, and any passed in from the | 131 | * register the standard cpu IO areas, and any passed in from the |
@@ -122,6 +142,10 @@ void __init s3c2412_map_io(struct map_desc *mach_desc, int mach_size) | |||
122 | 142 | ||
123 | s3c24xx_idle = s3c2412_idle; | 143 | s3c24xx_idle = s3c2412_idle; |
124 | 144 | ||
145 | /* set custom reset hook */ | ||
146 | |||
147 | s3c24xx_reset_hook = s3c2412_hard_reset; | ||
148 | |||
125 | /* register our io-tables */ | 149 | /* register our io-tables */ |
126 | 150 | ||
127 | iotable_init(s3c2412_iodesc, ARRAY_SIZE(s3c2412_iodesc)); | 151 | iotable_init(s3c2412_iodesc, ARRAY_SIZE(s3c2412_iodesc)); |
diff --git a/include/asm-arm/arch-s3c2410/regs-s3c2412.h b/include/asm-arm/arch-s3c2410/regs-s3c2412.h new file mode 100644 index 00000000000..8ca6a3bc855 --- /dev/null +++ b/include/asm-arm/arch-s3c2410/regs-s3c2412.h | |||
@@ -0,0 +1,21 @@ | |||
1 | /* linux/include/asm-arm/arch-s3c2410/regs-s3c2412.h | ||
2 | * | ||
3 | * Copyright 2007 Simtec Electronics | ||
4 | * http://armlinux.simtec.co.uk/ | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | * | ||
11 | * S3C2412 specific register definitions | ||
12 | */ | ||
13 | |||
14 | #ifndef __ASM_ARCH_REGS_S3C2412_H | ||
15 | #define __ASM_ARCH_REGS_S3C2412_H "s3c2412" | ||
16 | |||
17 | #define S3C2412_SWRST (S3C24XX_VA_CLKPWR + 0x30) | ||
18 | #define S3C2412_SWRST_RESET (0x533C2412) | ||
19 | |||
20 | #endif /* __ASM_ARCH_REGS_S3C2412_H */ | ||
21 | |||