diff options
author | Luis R. Rodriguez <lrodriguez@atheros.com> | 2009-10-27 12:59:36 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2009-10-30 16:49:19 -0400 |
commit | ec11bb88f977321f117865b4d21079bbacc474ee (patch) | |
tree | b255ed9465fced36ae5d58f55827022f1ea38162 | |
parent | 11158472c4ea7a4817d85912c491afa36a244192 (diff) |
ath9k_hw: correct AR_PHY_SPECTRAL_SCAN register offset
We had 0x9912 but AR_PHY_SPECTRAL_SCAN is 0x9910. By using the
0x9912 we were making the hardware unresponsive. This allows us
to move forward with hardware reset on ar9271 on the ath9k_htc
driver.
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r-- | drivers/net/wireless/ath/ath9k/hw.c | 3 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/phy.h | 16 |
2 files changed, 16 insertions, 3 deletions
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c index ea6965134c0..2fbadbee1aa 100644 --- a/drivers/net/wireless/ath/ath9k/hw.c +++ b/drivers/net/wireless/ath/ath9k/hw.c | |||
@@ -1274,7 +1274,8 @@ static void ath9k_hw_override_ini(struct ath_hw *ah, | |||
1274 | * AR9271 1.1 | 1274 | * AR9271 1.1 |
1275 | */ | 1275 | */ |
1276 | if (AR_SREV_9271_10(ah)) { | 1276 | if (AR_SREV_9271_10(ah)) { |
1277 | val = REG_READ(ah, AR_PHY_SPECTRAL_SCAN) | AR_PHY_SPECTRAL_SCAN_ENABLE; | 1277 | val = REG_READ(ah, AR_PHY_SPECTRAL_SCAN) | |
1278 | AR_PHY_SPECTRAL_SCAN_ENABLE; | ||
1278 | REG_WRITE(ah, AR_PHY_SPECTRAL_SCAN, val); | 1279 | REG_WRITE(ah, AR_PHY_SPECTRAL_SCAN, val); |
1279 | } | 1280 | } |
1280 | else if (AR_SREV_9271_11(ah)) | 1281 | else if (AR_SREV_9271_11(ah)) |
diff --git a/drivers/net/wireless/ath/ath9k/phy.h b/drivers/net/wireless/ath/ath9k/phy.h index 140fef74c66..b64bc69d7bb 100644 --- a/drivers/net/wireless/ath/ath9k/phy.h +++ b/drivers/net/wireless/ath/ath9k/phy.h | |||
@@ -186,8 +186,20 @@ bool ath9k_hw_init_rf(struct ath_hw *ah, | |||
186 | #define AR_PHY_PLL_CTL_44_2133 0xeb | 186 | #define AR_PHY_PLL_CTL_44_2133 0xeb |
187 | #define AR_PHY_PLL_CTL_40_2133 0xea | 187 | #define AR_PHY_PLL_CTL_40_2133 0xea |
188 | 188 | ||
189 | #define AR_PHY_SPECTRAL_SCAN 0x9912 | 189 | #define AR_PHY_SPECTRAL_SCAN 0x9910 /* AR9280 spectral scan configuration register */ |
190 | #define AR_PHY_SPECTRAL_SCAN_ENABLE 0x1 | 190 | #define AR_PHY_SPECTRAL_SCAN_ENABLE 0x1 |
191 | #define AR_PHY_SPECTRAL_SCAN_ENA 0x00000001 /* Enable spectral scan, reg 68, bit 0 */ | ||
192 | #define AR_PHY_SPECTRAL_SCAN_ENA_S 0 /* Enable spectral scan, reg 68, bit 0 */ | ||
193 | #define AR_PHY_SPECTRAL_SCAN_ACTIVE 0x00000002 /* Activate spectral scan reg 68, bit 1*/ | ||
194 | #define AR_PHY_SPECTRAL_SCAN_ACTIVE_S 1 /* Activate spectral scan reg 68, bit 1*/ | ||
195 | #define AR_PHY_SPECTRAL_SCAN_FFT_PERIOD 0x000000F0 /* Interval for FFT reports, reg 68, bits 4-7*/ | ||
196 | #define AR_PHY_SPECTRAL_SCAN_FFT_PERIOD_S 4 | ||
197 | #define AR_PHY_SPECTRAL_SCAN_PERIOD 0x0000FF00 /* Interval for FFT reports, reg 68, bits 8-15*/ | ||
198 | #define AR_PHY_SPECTRAL_SCAN_PERIOD_S 8 | ||
199 | #define AR_PHY_SPECTRAL_SCAN_COUNT 0x00FF0000 /* Number of reports, reg 68, bits 16-23*/ | ||
200 | #define AR_PHY_SPECTRAL_SCAN_COUNT_S 16 | ||
201 | #define AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT 0x01000000 /* Short repeat, reg 68, bit 24*/ | ||
202 | #define AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT_S 24 /* Short repeat, reg 68, bit 24*/ | ||
191 | 203 | ||
192 | #define AR_PHY_RX_DELAY 0x9914 | 204 | #define AR_PHY_RX_DELAY 0x9914 |
193 | #define AR_PHY_SEARCH_START_DELAY 0x9918 | 205 | #define AR_PHY_SEARCH_START_DELAY 0x9918 |