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authorMark Glaisher <mark.glaisher@st.com>2006-11-24 01:13:52 -0500
committerPaul Mundt <lethal@linux-sh.org>2006-12-05 20:45:39 -0500
commitdb9b99d461ddbbaa43c1e3581b1677b82c960948 (patch)
treea4bb8ff3f8339f3389e4b367bd1c1ecd7caab752
parente803aaf63a18b26668fbfbfd41c65527bcc10532 (diff)
sh: dma-api channel capability extensions.
This extends the SH DMA API for allowing handling of DMA channels based off of their respective capabilities. A couple of functions are added to the existing API, the core bits are register_chan_caps() for registering channel capabilities, and request_dma_bycap() for fetching a channel dynamically based off of a capability set. Signed-off-by: Mark Glaisher <mark.glaisher@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r--arch/sh/drivers/dma/dma-api.c274
-rw-r--r--include/asm-sh/dma.h40
2 files changed, 218 insertions, 96 deletions
diff --git a/arch/sh/drivers/dma/dma-api.c b/arch/sh/drivers/dma/dma-api.c
index 47c3e837599..e062067edd2 100644
--- a/arch/sh/drivers/dma/dma-api.c
+++ b/arch/sh/drivers/dma/dma-api.c
@@ -11,61 +11,27 @@
11 */ 11 */
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/interrupt.h>
15#include <linux/spinlock.h> 14#include <linux/spinlock.h>
16#include <linux/proc_fs.h> 15#include <linux/proc_fs.h>
17#include <linux/list.h> 16#include <linux/list.h>
18#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18#include <linux/mm.h>
19#include <asm/dma.h> 19#include <asm/dma.h>
20 20
21DEFINE_SPINLOCK(dma_spin_lock); 21DEFINE_SPINLOCK(dma_spin_lock);
22static LIST_HEAD(registered_dmac_list); 22static LIST_HEAD(registered_dmac_list);
23 23
24/*
25 * A brief note about the reasons for this API as it stands.
26 *
27 * For starters, the old ISA DMA API didn't work for us for a number of
28 * reasons, for one, the vast majority of channels on the SH DMAC are
29 * dual-address mode only, and both the new and the old DMA APIs are after the
30 * concept of managing a DMA buffer, which doesn't overly fit this model very
31 * well. In addition to which, the new API is largely geared at IOMMUs and
32 * GARTs, and doesn't even support the channel notion very well.
33 *
34 * The other thing that's a marginal issue, is the sheer number of random DMA
35 * engines that are present (ie, in boards like the Dreamcast), some of which
36 * cascade off of the SH DMAC, and others do not. As such, there was a real
37 * need for a scalable subsystem that could deal with both single and
38 * dual-address mode usage, in addition to interoperating with cascaded DMACs.
39 *
40 * There really isn't any reason why this needs to be SH specific, though I'm
41 * not aware of too many other processors (with the exception of some MIPS)
42 * that have the same concept of a dual address mode, or any real desire to
43 * actually make use of the DMAC even if such a subsystem were exposed
44 * elsewhere.
45 *
46 * The idea for this was derived from the ARM port, which acted as an excellent
47 * reference when trying to address these issues.
48 *
49 * It should also be noted that the decision to add Yet Another DMA API(tm) to
50 * the kernel wasn't made easily, and was only decided upon after conferring
51 * with jejb with regards to the state of the old and new APIs as they applied
52 * to these circumstances. Philip Blundell was also a great help in figuring
53 * out some single-address mode DMA semantics that were otherwise rather
54 * confusing.
55 */
56
57struct dma_info *get_dma_info(unsigned int chan) 24struct dma_info *get_dma_info(unsigned int chan)
58{ 25{
59 struct dma_info *info; 26 struct dma_info *info;
60 unsigned int total = 0;
61 27
62 /* 28 /*
63 * Look for each DMAC's range to determine who the owner of 29 * Look for each DMAC's range to determine who the owner of
64 * the channel is. 30 * the channel is.
65 */ 31 */
66 list_for_each_entry(info, &registered_dmac_list, list) { 32 list_for_each_entry(info, &registered_dmac_list, list) {
67 total += info->nr_channels; 33 if ((chan < info->first_channel_nr) ||
68 if (chan > total) 34 (chan >= info->first_channel_nr + info->nr_channels))
69 continue; 35 continue;
70 36
71 return info; 37 return info;
@@ -73,6 +39,22 @@ struct dma_info *get_dma_info(unsigned int chan)
73 39
74 return NULL; 40 return NULL;
75} 41}
42EXPORT_SYMBOL(get_dma_info);
43
44struct dma_info *get_dma_info_by_name(const char *dmac_name)
45{
46 struct dma_info *info;
47
48 list_for_each_entry(info, &registered_dmac_list, list) {
49 if (dmac_name && (strcmp(dmac_name, info->name) != 0))
50 continue;
51 else
52 return info;
53 }
54
55 return NULL;
56}
57EXPORT_SYMBOL(get_dma_info_by_name);
76 58
77static unsigned int get_nr_channels(void) 59static unsigned int get_nr_channels(void)
78{ 60{
@@ -91,63 +73,161 @@ static unsigned int get_nr_channels(void)
91struct dma_channel *get_dma_channel(unsigned int chan) 73struct dma_channel *get_dma_channel(unsigned int chan)
92{ 74{
93 struct dma_info *info = get_dma_info(chan); 75 struct dma_info *info = get_dma_info(chan);
76 struct dma_channel *channel;
77 int i;
94 78
95 if (!info) 79 if (unlikely(!info))
96 return ERR_PTR(-EINVAL); 80 return ERR_PTR(-EINVAL);
97 81
98 return info->channels + chan; 82 for (i = 0; i < info->nr_channels; i++) {
83 channel = &info->channels[i];
84 if (channel->chan == chan)
85 return channel;
86 }
87
88 return NULL;
99} 89}
90EXPORT_SYMBOL(get_dma_channel);
100 91
101int get_dma_residue(unsigned int chan) 92int get_dma_residue(unsigned int chan)
102{ 93{
103 struct dma_info *info = get_dma_info(chan); 94 struct dma_info *info = get_dma_info(chan);
104 struct dma_channel *channel = &info->channels[chan]; 95 struct dma_channel *channel = get_dma_channel(chan);
105 96
106 if (info->ops->get_residue) 97 if (info->ops->get_residue)
107 return info->ops->get_residue(channel); 98 return info->ops->get_residue(channel);
108 99
109 return 0; 100 return 0;
110} 101}
102EXPORT_SYMBOL(get_dma_residue);
111 103
112int request_dma(unsigned int chan, const char *dev_id) 104static int search_cap(const char **haystack, const char *needle)
113{ 105{
114 struct dma_info *info = get_dma_info(chan); 106 const char **p;
115 struct dma_channel *channel = &info->channels[chan]; 107
108 for (p = haystack; *p; p++)
109 if (strcmp(*p, needle) == 0)
110 return 1;
111
112 return 0;
113}
114
115/**
116 * request_dma_bycap - Allocate a DMA channel based on its capabilities
117 * @dmac: List of DMA controllers to search
118 * @caps: List of capabilites
119 *
120 * Search all channels of all DMA controllers to find a channel which
121 * matches the requested capabilities. The result is the channel
122 * number if a match is found, or %-ENODEV if no match is found.
123 *
124 * Note that not all DMA controllers export capabilities, in which
125 * case they can never be allocated using this API, and so
126 * request_dma() must be used specifying the channel number.
127 */
128int request_dma_bycap(const char **dmac, const char **caps, const char *dev_id)
129{
130 unsigned int found = 0;
131 struct dma_info *info;
132 const char **p;
133 int i;
134
135 BUG_ON(!dmac || !caps);
136
137 list_for_each_entry(info, &registered_dmac_list, list)
138 if (strcmp(*dmac, info->name) == 0) {
139 found = 1;
140 break;
141 }
142
143 if (!found)
144 return -ENODEV;
145
146 for (i = 0; i < info->nr_channels; i++) {
147 struct dma_channel *channel = &info->channels[i];
148
149 if (unlikely(!channel->caps))
150 continue;
151
152 for (p = caps; *p; p++) {
153 if (!search_cap(channel->caps, *p))
154 break;
155 if (request_dma(channel->chan, dev_id) == 0)
156 return channel->chan;
157 }
158 }
159
160 return -EINVAL;
161}
162EXPORT_SYMBOL(request_dma_bycap);
163
164int dmac_search_free_channel(const char *dev_id)
165{
166 struct dma_channel *channel = { 0 };
167 struct dma_info *info = get_dma_info(0);
168 int i;
169
170 for (i = 0; i < info->nr_channels; i++) {
171 channel = &info->channels[i];
172 if (unlikely(!channel))
173 return -ENODEV;
174
175 if (atomic_read(&channel->busy) == 0)
176 break;
177 }
116 178
117 down(&channel->sem); 179 if (info->ops->request) {
180 int result = info->ops->request(channel);
181 if (result)
182 return result;
118 183
119 if (!info->ops || chan >= MAX_DMA_CHANNELS) { 184 atomic_set(&channel->busy, 1);
120 up(&channel->sem); 185 return channel->chan;
121 return -EINVAL;
122 } 186 }
123 187
124 atomic_set(&channel->busy, 1); 188 return -ENOSYS;
189}
190
191int request_dma(unsigned int chan, const char *dev_id)
192{
193 struct dma_channel *channel = { 0 };
194 struct dma_info *info = get_dma_info(chan);
195 int result;
196
197 channel = get_dma_channel(chan);
198 if (atomic_xchg(&channel->busy, 1))
199 return -EBUSY;
125 200
126 strlcpy(channel->dev_id, dev_id, sizeof(channel->dev_id)); 201 strlcpy(channel->dev_id, dev_id, sizeof(channel->dev_id));
127 202
128 up(&channel->sem); 203 if (info->ops->request) {
204 result = info->ops->request(channel);
205 if (result)
206 atomic_set(&channel->busy, 0);
129 207
130 if (info->ops->request) 208 return result;
131 return info->ops->request(channel); 209 }
132 210
133 return 0; 211 return 0;
134} 212}
213EXPORT_SYMBOL(request_dma);
135 214
136void free_dma(unsigned int chan) 215void free_dma(unsigned int chan)
137{ 216{
138 struct dma_info *info = get_dma_info(chan); 217 struct dma_info *info = get_dma_info(chan);
139 struct dma_channel *channel = &info->channels[chan]; 218 struct dma_channel *channel = get_dma_channel(chan);
140 219
141 if (info->ops->free) 220 if (info->ops->free)
142 info->ops->free(channel); 221 info->ops->free(channel);
143 222
144 atomic_set(&channel->busy, 0); 223 atomic_set(&channel->busy, 0);
145} 224}
225EXPORT_SYMBOL(free_dma);
146 226
147void dma_wait_for_completion(unsigned int chan) 227void dma_wait_for_completion(unsigned int chan)
148{ 228{
149 struct dma_info *info = get_dma_info(chan); 229 struct dma_info *info = get_dma_info(chan);
150 struct dma_channel *channel = &info->channels[chan]; 230 struct dma_channel *channel = get_dma_channel(chan);
151 231
152 if (channel->flags & DMA_TEI_CAPABLE) { 232 if (channel->flags & DMA_TEI_CAPABLE) {
153 wait_event(channel->wait_queue, 233 wait_event(channel->wait_queue,
@@ -158,21 +238,52 @@ void dma_wait_for_completion(unsigned int chan)
158 while (info->ops->get_residue(channel)) 238 while (info->ops->get_residue(channel))
159 cpu_relax(); 239 cpu_relax();
160} 240}
241EXPORT_SYMBOL(dma_wait_for_completion);
242
243int register_chan_caps(const char *dmac, struct dma_chan_caps *caps)
244{
245 struct dma_info *info;
246 unsigned int found = 0;
247 int i;
248
249 list_for_each_entry(info, &registered_dmac_list, list)
250 if (strcmp(dmac, info->name) == 0) {
251 found = 1;
252 break;
253 }
254
255 if (unlikely(!found))
256 return -ENODEV;
257
258 for (i = 0; i < info->nr_channels; i++, caps++) {
259 struct dma_channel *channel;
260
261 if ((info->first_channel_nr + i) != caps->ch_num)
262 return -EINVAL;
263
264 channel = &info->channels[i];
265 channel->caps = caps->caplist;
266 }
267
268 return 0;
269}
270EXPORT_SYMBOL(register_chan_caps);
161 271
162void dma_configure_channel(unsigned int chan, unsigned long flags) 272void dma_configure_channel(unsigned int chan, unsigned long flags)
163{ 273{
164 struct dma_info *info = get_dma_info(chan); 274 struct dma_info *info = get_dma_info(chan);
165 struct dma_channel *channel = &info->channels[chan]; 275 struct dma_channel *channel = get_dma_channel(chan);
166 276
167 if (info->ops->configure) 277 if (info->ops->configure)
168 info->ops->configure(channel, flags); 278 info->ops->configure(channel, flags);
169} 279}
280EXPORT_SYMBOL(dma_configure_channel);
170 281
171int dma_xfer(unsigned int chan, unsigned long from, 282int dma_xfer(unsigned int chan, unsigned long from,
172 unsigned long to, size_t size, unsigned int mode) 283 unsigned long to, size_t size, unsigned int mode)
173{ 284{
174 struct dma_info *info = get_dma_info(chan); 285 struct dma_info *info = get_dma_info(chan);
175 struct dma_channel *channel = &info->channels[chan]; 286 struct dma_channel *channel = get_dma_channel(chan);
176 287
177 channel->sar = from; 288 channel->sar = from;
178 channel->dar = to; 289 channel->dar = to;
@@ -181,8 +292,20 @@ int dma_xfer(unsigned int chan, unsigned long from,
181 292
182 return info->ops->xfer(channel); 293 return info->ops->xfer(channel);
183} 294}
295EXPORT_SYMBOL(dma_xfer);
296
297int dma_extend(unsigned int chan, unsigned long op, void *param)
298{
299 struct dma_info *info = get_dma_info(chan);
300 struct dma_channel *channel = get_dma_channel(chan);
301
302 if (info->ops->extend)
303 return info->ops->extend(channel, op, param);
304
305 return -ENOSYS;
306}
307EXPORT_SYMBOL(dma_extend);
184 308
185#ifdef CONFIG_PROC_FS
186static int dma_read_proc(char *buf, char **start, off_t off, 309static int dma_read_proc(char *buf, char **start, off_t off,
187 int len, int *eof, void *data) 310 int len, int *eof, void *data)
188{ 311{
@@ -214,8 +337,6 @@ static int dma_read_proc(char *buf, char **start, off_t off,
214 337
215 return p - buf; 338 return p - buf;
216} 339}
217#endif
218
219 340
220int register_dmac(struct dma_info *info) 341int register_dmac(struct dma_info *info)
221{ 342{
@@ -224,8 +345,7 @@ int register_dmac(struct dma_info *info)
224 INIT_LIST_HEAD(&info->list); 345 INIT_LIST_HEAD(&info->list);
225 346
226 printk(KERN_INFO "DMA: Registering %s handler (%d channel%s).\n", 347 printk(KERN_INFO "DMA: Registering %s handler (%d channel%s).\n",
227 info->name, info->nr_channels, 348 info->name, info->nr_channels, info->nr_channels > 1 ? "s" : "");
228 info->nr_channels > 1 ? "s" : "");
229 349
230 BUG_ON((info->flags & DMAC_CHANNELS_CONFIGURED) && !info->channels); 350 BUG_ON((info->flags & DMAC_CHANNELS_CONFIGURED) && !info->channels);
231 351
@@ -242,28 +362,26 @@ int register_dmac(struct dma_info *info)
242 362
243 size = sizeof(struct dma_channel) * info->nr_channels; 363 size = sizeof(struct dma_channel) * info->nr_channels;
244 364
245 info->channels = kmalloc(size, GFP_KERNEL); 365 info->channels = kzalloc(size, GFP_KERNEL);
246 if (!info->channels) 366 if (!info->channels)
247 return -ENOMEM; 367 return -ENOMEM;
248
249 memset(info->channels, 0, size);
250 } 368 }
251 369
252 total_channels = get_nr_channels(); 370 total_channels = get_nr_channels();
253 for (i = 0; i < info->nr_channels; i++) { 371 for (i = 0; i < info->nr_channels; i++) {
254 struct dma_channel *chan = info->channels + i; 372 struct dma_channel *chan = &info->channels[i];
373
374 atomic_set(&chan->busy, 0);
255 375
256 chan->chan = i; 376 chan->chan = info->first_channel_nr + i;
257 chan->vchan = i + total_channels; 377 chan->vchan = info->first_channel_nr + i + total_channels;
258 378
259 memcpy(chan->dev_id, "Unused", 7); 379 memcpy(chan->dev_id, "Unused", 7);
260 380
261 if (info->flags & DMAC_CHANNELS_TEI_CAPABLE) 381 if (info->flags & DMAC_CHANNELS_TEI_CAPABLE)
262 chan->flags |= DMA_TEI_CAPABLE; 382 chan->flags |= DMA_TEI_CAPABLE;
263 383
264 init_MUTEX(&chan->sem);
265 init_waitqueue_head(&chan->wait_queue); 384 init_waitqueue_head(&chan->wait_queue);
266
267 dma_create_sysfs_files(chan, info); 385 dma_create_sysfs_files(chan, info);
268 } 386 }
269 387
@@ -271,6 +389,7 @@ int register_dmac(struct dma_info *info)
271 389
272 return 0; 390 return 0;
273} 391}
392EXPORT_SYMBOL(register_dmac);
274 393
275void unregister_dmac(struct dma_info *info) 394void unregister_dmac(struct dma_info *info)
276{ 395{
@@ -285,31 +404,16 @@ void unregister_dmac(struct dma_info *info)
285 list_del(&info->list); 404 list_del(&info->list);
286 platform_device_unregister(info->pdev); 405 platform_device_unregister(info->pdev);
287} 406}
407EXPORT_SYMBOL(unregister_dmac);
288 408
289static int __init dma_api_init(void) 409static int __init dma_api_init(void)
290{ 410{
291 printk("DMA: Registering DMA API.\n"); 411 printk(KERN_NOTICE "DMA: Registering DMA API.\n");
292
293#ifdef CONFIG_PROC_FS
294 create_proc_read_entry("dma", 0, 0, dma_read_proc, 0); 412 create_proc_read_entry("dma", 0, 0, dma_read_proc, 0);
295#endif
296
297 return 0; 413 return 0;
298} 414}
299
300subsys_initcall(dma_api_init); 415subsys_initcall(dma_api_init);
301 416
302MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>"); 417MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>");
303MODULE_DESCRIPTION("DMA API for SuperH"); 418MODULE_DESCRIPTION("DMA API for SuperH");
304MODULE_LICENSE("GPL"); 419MODULE_LICENSE("GPL");
305
306EXPORT_SYMBOL(request_dma);
307EXPORT_SYMBOL(free_dma);
308EXPORT_SYMBOL(register_dmac);
309EXPORT_SYMBOL(get_dma_residue);
310EXPORT_SYMBOL(get_dma_info);
311EXPORT_SYMBOL(get_dma_channel);
312EXPORT_SYMBOL(dma_xfer);
313EXPORT_SYMBOL(dma_wait_for_completion);
314EXPORT_SYMBOL(dma_configure_channel);
315
diff --git a/include/asm-sh/dma.h b/include/asm-sh/dma.h
index d9daa028689..faf3051cd42 100644
--- a/include/asm-sh/dma.h
+++ b/include/asm-sh/dma.h
@@ -14,9 +14,7 @@
14#include <linux/spinlock.h> 14#include <linux/spinlock.h>
15#include <linux/wait.h> 15#include <linux/wait.h>
16#include <linux/sysdev.h> 16#include <linux/sysdev.h>
17#include <linux/device.h>
18#include <asm/cpu/dma.h> 17#include <asm/cpu/dma.h>
19#include <asm/semaphore.h>
20 18
21/* The maximum address that we can perform a DMA transfer to on this platform */ 19/* The maximum address that we can perform a DMA transfer to on this platform */
22/* Don't define MAX_DMA_ADDRESS; it's useless on the SuperH and any 20/* Don't define MAX_DMA_ADDRESS; it's useless on the SuperH and any
@@ -46,16 +44,21 @@
46 * DMAC (dma_info) flags 44 * DMAC (dma_info) flags
47 */ 45 */
48enum { 46enum {
49 DMAC_CHANNELS_CONFIGURED = 0x00, 47 DMAC_CHANNELS_CONFIGURED = 0x01,
50 DMAC_CHANNELS_TEI_CAPABLE = 0x01, 48 DMAC_CHANNELS_TEI_CAPABLE = 0x02, /* Transfer end interrupt */
51}; 49};
52 50
53/* 51/*
54 * DMA channel capabilities / flags 52 * DMA channel capabilities / flags
55 */ 53 */
56enum { 54enum {
57 DMA_TEI_CAPABLE = 0x01, 55 DMA_CONFIGURED = 0x01,
58 DMA_CONFIGURED = 0x02, 56
57 /*
58 * Transfer end interrupt, inherited from DMAC.
59 * wait_queue used in dma_wait_for_completion.
60 */
61 DMA_TEI_CAPABLE = 0x02,
59}; 62};
60 63
61extern spinlock_t dma_spin_lock; 64extern spinlock_t dma_spin_lock;
@@ -68,28 +71,31 @@ struct dma_ops {
68 71
69 int (*get_residue)(struct dma_channel *chan); 72 int (*get_residue)(struct dma_channel *chan);
70 int (*xfer)(struct dma_channel *chan); 73 int (*xfer)(struct dma_channel *chan);
71 void (*configure)(struct dma_channel *chan, unsigned long flags); 74 int (*configure)(struct dma_channel *chan, unsigned long flags);
75 int (*extend)(struct dma_channel *chan, unsigned long op, void *param);
72}; 76};
73 77
74struct dma_channel { 78struct dma_channel {
75 char dev_id[16]; 79 char dev_id[16]; /* unique name per DMAC of channel */
76 80
77 unsigned int chan; /* Physical channel number */ 81 unsigned int chan; /* DMAC channel number */
78 unsigned int vchan; /* Virtual channel number */ 82 unsigned int vchan; /* Virtual channel number */
83
79 unsigned int mode; 84 unsigned int mode;
80 unsigned int count; 85 unsigned int count;
81 86
82 unsigned long sar; 87 unsigned long sar;
83 unsigned long dar; 88 unsigned long dar;
84 89
90 const char **caps;
91
85 unsigned long flags; 92 unsigned long flags;
86 atomic_t busy; 93 atomic_t busy;
87 94
88 struct semaphore sem;
89 wait_queue_head_t wait_queue; 95 wait_queue_head_t wait_queue;
90 96
91 struct sys_device dev; 97 struct sys_device dev;
92 char *name; 98 void *priv_data;
93}; 99};
94 100
95struct dma_info { 101struct dma_info {
@@ -103,6 +109,12 @@ struct dma_info {
103 struct dma_channel *channels; 109 struct dma_channel *channels;
104 110
105 struct list_head list; 111 struct list_head list;
112 int first_channel_nr;
113};
114
115struct dma_chan_caps {
116 int ch_num;
117 const char **caplist;
106}; 118};
107 119
108#define to_dma_channel(channel) container_of(channel, struct dma_channel, dev) 120#define to_dma_channel(channel) container_of(channel, struct dma_channel, dev)
@@ -121,6 +133,8 @@ extern int dma_xfer(unsigned int chan, unsigned long from,
121#define dma_read_page(chan, from, to) \ 133#define dma_read_page(chan, from, to) \
122 dma_read(chan, from, to, PAGE_SIZE) 134 dma_read(chan, from, to, PAGE_SIZE)
123 135
136extern int request_dma_bycap(const char **dmac, const char **caps,
137 const char *dev_id);
124extern int request_dma(unsigned int chan, const char *dev_id); 138extern int request_dma(unsigned int chan, const char *dev_id);
125extern void free_dma(unsigned int chan); 139extern void free_dma(unsigned int chan);
126extern int get_dma_residue(unsigned int chan); 140extern int get_dma_residue(unsigned int chan);
@@ -131,6 +145,10 @@ extern void dma_configure_channel(unsigned int chan, unsigned long flags);
131 145
132extern int register_dmac(struct dma_info *info); 146extern int register_dmac(struct dma_info *info);
133extern void unregister_dmac(struct dma_info *info); 147extern void unregister_dmac(struct dma_info *info);
148extern struct dma_info *get_dma_info_by_name(const char *dmac_name);
149
150extern int dma_extend(unsigned int chan, unsigned long op, void *param);
151extern int register_chan_caps(const char *dmac, struct dma_chan_caps *capslist);
134 152
135#ifdef CONFIG_SYSFS 153#ifdef CONFIG_SYSFS
136/* arch/sh/drivers/dma/dma-sysfs.c */ 154/* arch/sh/drivers/dma/dma-sysfs.c */