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authorThomas Gleixner <tglx@linutronix.de>2011-03-23 17:09:16 -0400
committerRalf Baechle <ralf@linux-mips.org>2011-03-25 13:45:20 -0400
commitd7ae7c7137868fca5a18954f4d70d525f38867c9 (patch)
treef9d70131227742b1fb0642aaa67ddb2f748fa08e
parent0b888c7f3a0396cfe59116575a35cdcd166fd515 (diff)
MIPS: TXx9: Convert to new irq_chip functions
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2207/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/txx9/generic/irq_tx4939.c28
-rw-r--r--arch/mips/txx9/jmr3927/irq.c14
-rw-r--r--arch/mips/txx9/rbtx4927/irq.c58
-rw-r--r--arch/mips/txx9/rbtx4938/irq.c54
-rw-r--r--arch/mips/txx9/rbtx4939/irq.c14
5 files changed, 75 insertions, 93 deletions
diff --git a/arch/mips/txx9/generic/irq_tx4939.c b/arch/mips/txx9/generic/irq_tx4939.c
index 3886ad77cba..93b6edbedd6 100644
--- a/arch/mips/txx9/generic/irq_tx4939.c
+++ b/arch/mips/txx9/generic/irq_tx4939.c
@@ -50,9 +50,9 @@ static struct {
50 unsigned char mode; 50 unsigned char mode;
51} tx4939irq[TX4939_NUM_IR] __read_mostly; 51} tx4939irq[TX4939_NUM_IR] __read_mostly;
52 52
53static void tx4939_irq_unmask(unsigned int irq) 53static void tx4939_irq_unmask(struct irq_data *d)
54{ 54{
55 unsigned int irq_nr = irq - TXX9_IRQ_BASE; 55 unsigned int irq_nr = d->irq - TXX9_IRQ_BASE;
56 u32 __iomem *lvlp; 56 u32 __iomem *lvlp;
57 int ofs; 57 int ofs;
58 if (irq_nr < 32) { 58 if (irq_nr < 32) {
@@ -68,9 +68,9 @@ static void tx4939_irq_unmask(unsigned int irq)
68 lvlp); 68 lvlp);
69} 69}
70 70
71static inline void tx4939_irq_mask(unsigned int irq) 71static inline void tx4939_irq_mask(struct irq_data *d)
72{ 72{
73 unsigned int irq_nr = irq - TXX9_IRQ_BASE; 73 unsigned int irq_nr = d->irq - TXX9_IRQ_BASE;
74 u32 __iomem *lvlp; 74 u32 __iomem *lvlp;
75 int ofs; 75 int ofs;
76 if (irq_nr < 32) { 76 if (irq_nr < 32) {
@@ -87,11 +87,11 @@ static inline void tx4939_irq_mask(unsigned int irq)
87 mmiowb(); 87 mmiowb();
88} 88}
89 89
90static void tx4939_irq_mask_ack(unsigned int irq) 90static void tx4939_irq_mask_ack(struct irq_data *d)
91{ 91{
92 unsigned int irq_nr = irq - TXX9_IRQ_BASE; 92 unsigned int irq_nr = d->irq - TXX9_IRQ_BASE;
93 93
94 tx4939_irq_mask(irq); 94 tx4939_irq_mask(d);
95 if (TXx9_IRCR_EDGE(tx4939irq[irq_nr].mode)) { 95 if (TXx9_IRCR_EDGE(tx4939irq[irq_nr].mode)) {
96 irq_nr--; 96 irq_nr--;
97 /* clear edge detection */ 97 /* clear edge detection */
@@ -101,9 +101,9 @@ static void tx4939_irq_mask_ack(unsigned int irq)
101 } 101 }
102} 102}
103 103
104static int tx4939_irq_set_type(unsigned int irq, unsigned int flow_type) 104static int tx4939_irq_set_type(struct irq_data *d, unsigned int flow_type)
105{ 105{
106 unsigned int irq_nr = irq - TXX9_IRQ_BASE; 106 unsigned int irq_nr = d->irq - TXX9_IRQ_BASE;
107 u32 cr; 107 u32 cr;
108 u32 __iomem *crp; 108 u32 __iomem *crp;
109 int ofs; 109 int ofs;
@@ -145,11 +145,11 @@ static int tx4939_irq_set_type(unsigned int irq, unsigned int flow_type)
145 145
146static struct irq_chip tx4939_irq_chip = { 146static struct irq_chip tx4939_irq_chip = {
147 .name = "TX4939", 147 .name = "TX4939",
148 .ack = tx4939_irq_mask_ack, 148 .irq_ack = tx4939_irq_mask_ack,
149 .mask = tx4939_irq_mask, 149 .irq_mask = tx4939_irq_mask,
150 .mask_ack = tx4939_irq_mask_ack, 150 .irq_mask_ack = tx4939_irq_mask_ack,
151 .unmask = tx4939_irq_unmask, 151 .irq_unmask = tx4939_irq_unmask,
152 .set_type = tx4939_irq_set_type, 152 .irq_set_type = tx4939_irq_set_type,
153}; 153};
154 154
155static int tx4939_irq_set_pri(int irc_irq, int new_pri) 155static int tx4939_irq_set_pri(int irc_irq, int new_pri)
diff --git a/arch/mips/txx9/jmr3927/irq.c b/arch/mips/txx9/jmr3927/irq.c
index 0a7f8e3b9fd..92a5c1b400f 100644
--- a/arch/mips/txx9/jmr3927/irq.c
+++ b/arch/mips/txx9/jmr3927/irq.c
@@ -47,20 +47,20 @@
47 * CP0_STATUS is a thread's resource (saved/restored on context switch). 47 * CP0_STATUS is a thread's resource (saved/restored on context switch).
48 * So disable_irq/enable_irq MUST handle IOC/IRC registers. 48 * So disable_irq/enable_irq MUST handle IOC/IRC registers.
49 */ 49 */
50static void mask_irq_ioc(unsigned int irq) 50static void mask_irq_ioc(struct irq_data *d)
51{ 51{
52 /* 0: mask */ 52 /* 0: mask */
53 unsigned int irq_nr = irq - JMR3927_IRQ_IOC; 53 unsigned int irq_nr = d->irq - JMR3927_IRQ_IOC;
54 unsigned char imask = jmr3927_ioc_reg_in(JMR3927_IOC_INTM_ADDR); 54 unsigned char imask = jmr3927_ioc_reg_in(JMR3927_IOC_INTM_ADDR);
55 unsigned int bit = 1 << irq_nr; 55 unsigned int bit = 1 << irq_nr;
56 jmr3927_ioc_reg_out(imask & ~bit, JMR3927_IOC_INTM_ADDR); 56 jmr3927_ioc_reg_out(imask & ~bit, JMR3927_IOC_INTM_ADDR);
57 /* flush write buffer */ 57 /* flush write buffer */
58 (void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR); 58 (void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR);
59} 59}
60static void unmask_irq_ioc(unsigned int irq) 60static void unmask_irq_ioc(struct irq_data *d)
61{ 61{
62 /* 0: mask */ 62 /* 0: mask */
63 unsigned int irq_nr = irq - JMR3927_IRQ_IOC; 63 unsigned int irq_nr = d->irq - JMR3927_IRQ_IOC;
64 unsigned char imask = jmr3927_ioc_reg_in(JMR3927_IOC_INTM_ADDR); 64 unsigned char imask = jmr3927_ioc_reg_in(JMR3927_IOC_INTM_ADDR);
65 unsigned int bit = 1 << irq_nr; 65 unsigned int bit = 1 << irq_nr;
66 jmr3927_ioc_reg_out(imask | bit, JMR3927_IOC_INTM_ADDR); 66 jmr3927_ioc_reg_out(imask | bit, JMR3927_IOC_INTM_ADDR);
@@ -95,10 +95,8 @@ static int jmr3927_irq_dispatch(int pending)
95 95
96static struct irq_chip jmr3927_irq_ioc = { 96static struct irq_chip jmr3927_irq_ioc = {
97 .name = "jmr3927_ioc", 97 .name = "jmr3927_ioc",
98 .ack = mask_irq_ioc, 98 .irq_mask = mask_irq_ioc,
99 .mask = mask_irq_ioc, 99 .irq_unmask = unmask_irq_ioc,
100 .mask_ack = mask_irq_ioc,
101 .unmask = unmask_irq_ioc,
102}; 100};
103 101
104void __init jmr3927_irq_setup(void) 102void __init jmr3927_irq_setup(void)
diff --git a/arch/mips/txx9/rbtx4927/irq.c b/arch/mips/txx9/rbtx4927/irq.c
index c4b54d20efd..7c0a048b307 100644
--- a/arch/mips/txx9/rbtx4927/irq.c
+++ b/arch/mips/txx9/rbtx4927/irq.c
@@ -117,18 +117,6 @@
117#include <asm/txx9/generic.h> 117#include <asm/txx9/generic.h>
118#include <asm/txx9/rbtx4927.h> 118#include <asm/txx9/rbtx4927.h>
119 119
120static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq);
121static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq);
122
123#define TOSHIBA_RBTX4927_IOC_NAME "RBTX4927-IOC"
124static struct irq_chip toshiba_rbtx4927_irq_ioc_type = {
125 .name = TOSHIBA_RBTX4927_IOC_NAME,
126 .ack = toshiba_rbtx4927_irq_ioc_disable,
127 .mask = toshiba_rbtx4927_irq_ioc_disable,
128 .mask_ack = toshiba_rbtx4927_irq_ioc_disable,
129 .unmask = toshiba_rbtx4927_irq_ioc_enable,
130};
131
132static int toshiba_rbtx4927_irq_nested(int sw_irq) 120static int toshiba_rbtx4927_irq_nested(int sw_irq)
133{ 121{
134 u8 level3; 122 u8 level3;
@@ -139,41 +127,47 @@ static int toshiba_rbtx4927_irq_nested(int sw_irq)
139 return RBTX4927_IRQ_IOC + __fls8(level3); 127 return RBTX4927_IRQ_IOC + __fls8(level3);
140} 128}
141 129
142static void __init toshiba_rbtx4927_irq_ioc_init(void) 130static void toshiba_rbtx4927_irq_ioc_enable(struct irq_data *d)
143{
144 int i;
145
146 /* mask all IOC interrupts */
147 writeb(0, rbtx4927_imask_addr);
148 /* clear SoftInt interrupts */
149 writeb(0, rbtx4927_softint_addr);
150
151 for (i = RBTX4927_IRQ_IOC;
152 i < RBTX4927_IRQ_IOC + RBTX4927_NR_IRQ_IOC; i++)
153 set_irq_chip_and_handler(i, &toshiba_rbtx4927_irq_ioc_type,
154 handle_level_irq);
155 set_irq_chained_handler(RBTX4927_IRQ_IOCINT, handle_simple_irq);
156}
157
158static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq)
159{ 131{
160 unsigned char v; 132 unsigned char v;
161 133
162 v = readb(rbtx4927_imask_addr); 134 v = readb(rbtx4927_imask_addr);
163 v |= (1 << (irq - RBTX4927_IRQ_IOC)); 135 v |= (1 << (d->irq - RBTX4927_IRQ_IOC));
164 writeb(v, rbtx4927_imask_addr); 136 writeb(v, rbtx4927_imask_addr);
165} 137}
166 138
167static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq) 139static void toshiba_rbtx4927_irq_ioc_disable(struct irq_data *d)
168{ 140{
169 unsigned char v; 141 unsigned char v;
170 142
171 v = readb(rbtx4927_imask_addr); 143 v = readb(rbtx4927_imask_addr);
172 v &= ~(1 << (irq - RBTX4927_IRQ_IOC)); 144 v &= ~(1 << (d->irq - RBTX4927_IRQ_IOC));
173 writeb(v, rbtx4927_imask_addr); 145 writeb(v, rbtx4927_imask_addr);
174 mmiowb(); 146 mmiowb();
175} 147}
176 148
149#define TOSHIBA_RBTX4927_IOC_NAME "RBTX4927-IOC"
150static struct irq_chip toshiba_rbtx4927_irq_ioc_type = {
151 .name = TOSHIBA_RBTX4927_IOC_NAME,
152 .irq_mask = toshiba_rbtx4927_irq_ioc_disable,
153 .irq_unmask = toshiba_rbtx4927_irq_ioc_enable,
154};
155
156static void __init toshiba_rbtx4927_irq_ioc_init(void)
157{
158 int i;
159
160 /* mask all IOC interrupts */
161 writeb(0, rbtx4927_imask_addr);
162 /* clear SoftInt interrupts */
163 writeb(0, rbtx4927_softint_addr);
164
165 for (i = RBTX4927_IRQ_IOC;
166 i < RBTX4927_IRQ_IOC + RBTX4927_NR_IRQ_IOC; i++)
167 set_irq_chip_and_handler(i, &toshiba_rbtx4927_irq_ioc_type,
168 handle_level_irq);
169 set_irq_chained_handler(RBTX4927_IRQ_IOCINT, handle_simple_irq);
170}
177 171
178static int rbtx4927_irq_dispatch(int pending) 172static int rbtx4927_irq_dispatch(int pending)
179{ 173{
diff --git a/arch/mips/txx9/rbtx4938/irq.c b/arch/mips/txx9/rbtx4938/irq.c
index 67a73a8065e..2ec4fe1b167 100644
--- a/arch/mips/txx9/rbtx4938/irq.c
+++ b/arch/mips/txx9/rbtx4938/irq.c
@@ -69,18 +69,6 @@
69#include <asm/txx9/generic.h> 69#include <asm/txx9/generic.h>
70#include <asm/txx9/rbtx4938.h> 70#include <asm/txx9/rbtx4938.h>
71 71
72static void toshiba_rbtx4938_irq_ioc_enable(unsigned int irq);
73static void toshiba_rbtx4938_irq_ioc_disable(unsigned int irq);
74
75#define TOSHIBA_RBTX4938_IOC_NAME "RBTX4938-IOC"
76static struct irq_chip toshiba_rbtx4938_irq_ioc_type = {
77 .name = TOSHIBA_RBTX4938_IOC_NAME,
78 .ack = toshiba_rbtx4938_irq_ioc_disable,
79 .mask = toshiba_rbtx4938_irq_ioc_disable,
80 .mask_ack = toshiba_rbtx4938_irq_ioc_disable,
81 .unmask = toshiba_rbtx4938_irq_ioc_enable,
82};
83
84static int toshiba_rbtx4938_irq_nested(int sw_irq) 72static int toshiba_rbtx4938_irq_nested(int sw_irq)
85{ 73{
86 u8 level3; 74 u8 level3;
@@ -92,41 +80,33 @@ static int toshiba_rbtx4938_irq_nested(int sw_irq)
92 return RBTX4938_IRQ_IOC + __fls8(level3); 80 return RBTX4938_IRQ_IOC + __fls8(level3);
93} 81}
94 82
95static void __init 83static void toshiba_rbtx4938_irq_ioc_enable(struct irq_data *d)
96toshiba_rbtx4938_irq_ioc_init(void)
97{
98 int i;
99
100 for (i = RBTX4938_IRQ_IOC;
101 i < RBTX4938_IRQ_IOC + RBTX4938_NR_IRQ_IOC; i++)
102 set_irq_chip_and_handler(i, &toshiba_rbtx4938_irq_ioc_type,
103 handle_level_irq);
104
105 set_irq_chained_handler(RBTX4938_IRQ_IOCINT, handle_simple_irq);
106}
107
108static void
109toshiba_rbtx4938_irq_ioc_enable(unsigned int irq)
110{ 84{
111 unsigned char v; 85 unsigned char v;
112 86
113 v = readb(rbtx4938_imask_addr); 87 v = readb(rbtx4938_imask_addr);
114 v |= (1 << (irq - RBTX4938_IRQ_IOC)); 88 v |= (1 << (d->irq - RBTX4938_IRQ_IOC));
115 writeb(v, rbtx4938_imask_addr); 89 writeb(v, rbtx4938_imask_addr);
116 mmiowb(); 90 mmiowb();
117} 91}
118 92
119static void 93static void toshiba_rbtx4938_irq_ioc_disable(struct irq_data *d)
120toshiba_rbtx4938_irq_ioc_disable(unsigned int irq)
121{ 94{
122 unsigned char v; 95 unsigned char v;
123 96
124 v = readb(rbtx4938_imask_addr); 97 v = readb(rbtx4938_imask_addr);
125 v &= ~(1 << (irq - RBTX4938_IRQ_IOC)); 98 v &= ~(1 << (d->irq - RBTX4938_IRQ_IOC));
126 writeb(v, rbtx4938_imask_addr); 99 writeb(v, rbtx4938_imask_addr);
127 mmiowb(); 100 mmiowb();
128} 101}
129 102
103#define TOSHIBA_RBTX4938_IOC_NAME "RBTX4938-IOC"
104static struct irq_chip toshiba_rbtx4938_irq_ioc_type = {
105 .name = TOSHIBA_RBTX4938_IOC_NAME,
106 .irq_mask = toshiba_rbtx4938_irq_ioc_disable,
107 .irq_unmask = toshiba_rbtx4938_irq_ioc_enable,
108};
109
130static int rbtx4938_irq_dispatch(int pending) 110static int rbtx4938_irq_dispatch(int pending)
131{ 111{
132 int irq; 112 int irq;
@@ -146,6 +126,18 @@ static int rbtx4938_irq_dispatch(int pending)
146 return irq; 126 return irq;
147} 127}
148 128
129static void __init toshiba_rbtx4938_irq_ioc_init(void)
130{
131 int i;
132
133 for (i = RBTX4938_IRQ_IOC;
134 i < RBTX4938_IRQ_IOC + RBTX4938_NR_IRQ_IOC; i++)
135 set_irq_chip_and_handler(i, &toshiba_rbtx4938_irq_ioc_type,
136 handle_level_irq);
137
138 set_irq_chained_handler(RBTX4938_IRQ_IOCINT, handle_simple_irq);
139}
140
149void __init rbtx4938_irq_setup(void) 141void __init rbtx4938_irq_setup(void)
150{ 142{
151 txx9_irq_dispatch = rbtx4938_irq_dispatch; 143 txx9_irq_dispatch = rbtx4938_irq_dispatch;
diff --git a/arch/mips/txx9/rbtx4939/irq.c b/arch/mips/txx9/rbtx4939/irq.c
index 57fa740a720..70074632fb9 100644
--- a/arch/mips/txx9/rbtx4939/irq.c
+++ b/arch/mips/txx9/rbtx4939/irq.c
@@ -19,16 +19,16 @@
19 * RBTX4939 IOC controller definition 19 * RBTX4939 IOC controller definition
20 */ 20 */
21 21
22static void rbtx4939_ioc_irq_unmask(unsigned int irq) 22static void rbtx4939_ioc_irq_unmask(struct irq_data *d)
23{ 23{
24 int ioc_nr = irq - RBTX4939_IRQ_IOC; 24 int ioc_nr = d->irq - RBTX4939_IRQ_IOC;
25 25
26 writeb(readb(rbtx4939_ien_addr) | (1 << ioc_nr), rbtx4939_ien_addr); 26 writeb(readb(rbtx4939_ien_addr) | (1 << ioc_nr), rbtx4939_ien_addr);
27} 27}
28 28
29static void rbtx4939_ioc_irq_mask(unsigned int irq) 29static void rbtx4939_ioc_irq_mask(struct irq_data *d)
30{ 30{
31 int ioc_nr = irq - RBTX4939_IRQ_IOC; 31 int ioc_nr = d->irq - RBTX4939_IRQ_IOC;
32 32
33 writeb(readb(rbtx4939_ien_addr) & ~(1 << ioc_nr), rbtx4939_ien_addr); 33 writeb(readb(rbtx4939_ien_addr) & ~(1 << ioc_nr), rbtx4939_ien_addr);
34 mmiowb(); 34 mmiowb();
@@ -36,10 +36,8 @@ static void rbtx4939_ioc_irq_mask(unsigned int irq)
36 36
37static struct irq_chip rbtx4939_ioc_irq_chip = { 37static struct irq_chip rbtx4939_ioc_irq_chip = {
38 .name = "IOC", 38 .name = "IOC",
39 .ack = rbtx4939_ioc_irq_mask, 39 .irq_mask = rbtx4939_ioc_irq_mask,
40 .mask = rbtx4939_ioc_irq_mask, 40 .irq_unmask = rbtx4939_ioc_irq_unmask,
41 .mask_ack = rbtx4939_ioc_irq_mask,
42 .unmask = rbtx4939_ioc_irq_unmask,
43}; 41};
44 42
45 43