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authorJohn W. Linville <linville@tuxdriver.com>2010-03-31 15:39:35 -0400
committerJohn W. Linville <linville@tuxdriver.com>2010-04-26 13:50:54 -0400
commitd53cdbb94a52a920d5420ed64d986c3523a56743 (patch)
tree39b1026c953de14ce6b14417cf9bcb66992909f0
parent672724403b42da1d276c6cf811e8e34d15efd964 (diff)
ssb: do not read SPROM if it does not exist
Attempting to read registers that don't exist on the SSB bus can cause hangs on some boxes. At least some b43 devices are 'in the wild' that don't have SPROMs at all. When the SSB bus support loads, it attempts to read these (non-existant) SPROMs and causes hard hangs on the box -- no console output, etc. This patch adds some intelligence to determine whether or not the SPROM is present before attempting to read it. This avoids those hard hangs on those devices with no SPROM attached to their SSB bus. The SSB-attached devices (e.g. b43, et al.) won't work, but at least the box will survive to test further patches. :-) Signed-off-by: John W. Linville <linville@tuxdriver.com> Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Cc: Larry Finger <Larry.Finger@lwfinger.net> Cc: Michael Buesch <mb@bu3sch.de>
-rw-r--r--drivers/ssb/driver_chipcommon.c2
-rw-r--r--drivers/ssb/pci.c5
-rw-r--r--drivers/ssb/sprom.c14
-rw-r--r--include/linux/ssb/ssb.h3
-rw-r--r--include/linux/ssb/ssb_driver_chipcommon.h15
5 files changed, 39 insertions, 0 deletions
diff --git a/drivers/ssb/driver_chipcommon.c b/drivers/ssb/driver_chipcommon.c
index 59c3c0fdbec..59ae76bace1 100644
--- a/drivers/ssb/driver_chipcommon.c
+++ b/drivers/ssb/driver_chipcommon.c
@@ -233,6 +233,8 @@ void ssb_chipcommon_init(struct ssb_chipcommon *cc)
233{ 233{
234 if (!cc->dev) 234 if (!cc->dev)
235 return; /* We don't have a ChipCommon */ 235 return; /* We don't have a ChipCommon */
236 if (cc->dev->id.revision >= 11)
237 cc->status = chipco_read32(cc, SSB_CHIPCO_CHIPSTAT);
236 ssb_pmu_init(cc); 238 ssb_pmu_init(cc);
237 chipco_powercontrol_init(cc); 239 chipco_powercontrol_init(cc);
238 ssb_chipco_set_clockmode(cc, SSB_CLKMODE_FAST); 240 ssb_chipco_set_clockmode(cc, SSB_CLKMODE_FAST);
diff --git a/drivers/ssb/pci.c b/drivers/ssb/pci.c
index 9e50896233a..a4b2b99f2c8 100644
--- a/drivers/ssb/pci.c
+++ b/drivers/ssb/pci.c
@@ -620,6 +620,11 @@ static int ssb_pci_sprom_get(struct ssb_bus *bus,
620 int err = -ENOMEM; 620 int err = -ENOMEM;
621 u16 *buf; 621 u16 *buf;
622 622
623 if (!ssb_is_sprom_available(bus)) {
624 ssb_printk(KERN_ERR PFX "No SPROM available!\n");
625 return -ENODEV;
626 }
627
623 buf = kcalloc(SSB_SPROMSIZE_WORDS_R123, sizeof(u16), GFP_KERNEL); 628 buf = kcalloc(SSB_SPROMSIZE_WORDS_R123, sizeof(u16), GFP_KERNEL);
624 if (!buf) 629 if (!buf)
625 goto out; 630 goto out;
diff --git a/drivers/ssb/sprom.c b/drivers/ssb/sprom.c
index d0e6762fec5..83bc088b941 100644
--- a/drivers/ssb/sprom.c
+++ b/drivers/ssb/sprom.c
@@ -175,3 +175,17 @@ const struct ssb_sprom *ssb_get_fallback_sprom(void)
175{ 175{
176 return fallback_sprom; 176 return fallback_sprom;
177} 177}
178
179/* http://bcm-v4.sipsolutions.net/802.11/IsSpromAvailable */
180bool ssb_is_sprom_available(struct ssb_bus *bus)
181{
182 /* status register only exists on chipcomon rev >= 11 and we need check
183 for >= 31 only */
184 /* this routine differs from specs as we do not access SPROM directly
185 on PCMCIA */
186 if (bus->bustype == SSB_BUSTYPE_PCI &&
187 bus->chipco.dev->id.revision >= 31)
188 return bus->chipco.capabilities & SSB_CHIPCO_CAP_SPROM;
189
190 return true;
191}
diff --git a/include/linux/ssb/ssb.h b/include/linux/ssb/ssb.h
index 24f98854736..3b4da233e31 100644
--- a/include/linux/ssb/ssb.h
+++ b/include/linux/ssb/ssb.h
@@ -394,6 +394,9 @@ extern int ssb_bus_sdiobus_register(struct ssb_bus *bus,
394 394
395extern void ssb_bus_unregister(struct ssb_bus *bus); 395extern void ssb_bus_unregister(struct ssb_bus *bus);
396 396
397/* Does the device have an SPROM? */
398extern bool ssb_is_sprom_available(struct ssb_bus *bus);
399
397/* Set a fallback SPROM. 400/* Set a fallback SPROM.
398 * See kdoc at the function definition for complete documentation. */ 401 * See kdoc at the function definition for complete documentation. */
399extern int ssb_arch_set_fallback_sprom(const struct ssb_sprom *sprom); 402extern int ssb_arch_set_fallback_sprom(const struct ssb_sprom *sprom);
diff --git a/include/linux/ssb/ssb_driver_chipcommon.h b/include/linux/ssb/ssb_driver_chipcommon.h
index 4e27acf0a92..2cdf249b4e5 100644
--- a/include/linux/ssb/ssb_driver_chipcommon.h
+++ b/include/linux/ssb/ssb_driver_chipcommon.h
@@ -53,6 +53,7 @@
53#define SSB_CHIPCO_CAP_64BIT 0x08000000 /* 64-bit Backplane */ 53#define SSB_CHIPCO_CAP_64BIT 0x08000000 /* 64-bit Backplane */
54#define SSB_CHIPCO_CAP_PMU 0x10000000 /* PMU available (rev >= 20) */ 54#define SSB_CHIPCO_CAP_PMU 0x10000000 /* PMU available (rev >= 20) */
55#define SSB_CHIPCO_CAP_ECI 0x20000000 /* ECI available (rev >= 20) */ 55#define SSB_CHIPCO_CAP_ECI 0x20000000 /* ECI available (rev >= 20) */
56#define SSB_CHIPCO_CAP_SPROM 0x40000000 /* SPROM present */
56#define SSB_CHIPCO_CORECTL 0x0008 57#define SSB_CHIPCO_CORECTL 0x0008
57#define SSB_CHIPCO_CORECTL_UARTCLK0 0x00000001 /* Drive UART with internal clock */ 58#define SSB_CHIPCO_CORECTL_UARTCLK0 0x00000001 /* Drive UART with internal clock */
58#define SSB_CHIPCO_CORECTL_SE 0x00000002 /* sync clk out enable (corerev >= 3) */ 59#define SSB_CHIPCO_CORECTL_SE 0x00000002 /* sync clk out enable (corerev >= 3) */
@@ -385,6 +386,7 @@
385 386
386 387
387/** Chip specific Chip-Status register contents. */ 388/** Chip specific Chip-Status register contents. */
389#define SSB_CHIPCO_CHST_4322_SPROM_EXISTS 0x00000040 /* SPROM present */
388#define SSB_CHIPCO_CHST_4325_SPROM_OTP_SEL 0x00000003 390#define SSB_CHIPCO_CHST_4325_SPROM_OTP_SEL 0x00000003
389#define SSB_CHIPCO_CHST_4325_DEFCIS_SEL 0 /* OTP is powered up, use def. CIS, no SPROM */ 391#define SSB_CHIPCO_CHST_4325_DEFCIS_SEL 0 /* OTP is powered up, use def. CIS, no SPROM */
390#define SSB_CHIPCO_CHST_4325_SPROM_SEL 1 /* OTP is powered up, SPROM is present */ 392#define SSB_CHIPCO_CHST_4325_SPROM_SEL 1 /* OTP is powered up, SPROM is present */
@@ -398,6 +400,18 @@
398#define SSB_CHIPCO_CHST_4325_RCAL_VALUE_SHIFT 4 400#define SSB_CHIPCO_CHST_4325_RCAL_VALUE_SHIFT 4
399#define SSB_CHIPCO_CHST_4325_PMUTOP_2B 0x00000200 /* 1 for 2b, 0 for to 2a */ 401#define SSB_CHIPCO_CHST_4325_PMUTOP_2B 0x00000200 /* 1 for 2b, 0 for to 2a */
400 402
403/** Macros to determine SPROM presence based on Chip-Status register. */
404#define SSB_CHIPCO_CHST_4312_SPROM_PRESENT(status) \
405 ((status & SSB_CHIPCO_CHST_4325_SPROM_OTP_SEL) != \
406 SSB_CHIPCO_CHST_4325_OTP_SEL)
407#define SSB_CHIPCO_CHST_4322_SPROM_PRESENT(status) \
408 (status & SSB_CHIPCO_CHST_4322_SPROM_EXISTS)
409#define SSB_CHIPCO_CHST_4325_SPROM_PRESENT(status) \
410 (((status & SSB_CHIPCO_CHST_4325_SPROM_OTP_SEL) != \
411 SSB_CHIPCO_CHST_4325_DEFCIS_SEL) && \
412 ((status & SSB_CHIPCO_CHST_4325_SPROM_OTP_SEL) != \
413 SSB_CHIPCO_CHST_4325_OTP_SEL))
414
401 415
402 416
403/** Clockcontrol masks and values **/ 417/** Clockcontrol masks and values **/
@@ -564,6 +578,7 @@ struct ssb_chipcommon_pmu {
564struct ssb_chipcommon { 578struct ssb_chipcommon {
565 struct ssb_device *dev; 579 struct ssb_device *dev;
566 u32 capabilities; 580 u32 capabilities;
581 u32 status;
567 /* Fast Powerup Delay constant */ 582 /* Fast Powerup Delay constant */
568 u16 fast_pwrup_delay; 583 u16 fast_pwrup_delay;
569 struct ssb_chipcommon_pmu pmu; 584 struct ssb_chipcommon_pmu pmu;