diff options
author | Takashi Iwai <tiwai@suse.de> | 2011-04-26 09:25:02 -0400 |
---|---|---|
committer | Takashi Iwai <tiwai@suse.de> | 2011-04-26 09:33:43 -0400 |
commit | d507cd668a3f6d07b31e914722b453c454b03204 (patch) | |
tree | 9fd9abef757ac53c5223c4565825b3f5b13982ce | |
parent | 0da2692256ed65bec588f7797c77f9c84ef4274e (diff) |
ALSA: hda - Enable sync_write workaround for AMD generically
The workaround for AMD chipset via sync_write flag seems needed for
machines with Realtek codecs. So, it's better to activate it
generically in hda_intel.c from the beginning.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
-rw-r--r-- | sound/pci/hda/hda_intel.c | 11 | ||||
-rw-r--r-- | sound/pci/hda/patch_sigmatel.c | 16 |
2 files changed, 11 insertions, 16 deletions
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index 6f891ee82a7..f95ff6e029a 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c | |||
@@ -1447,6 +1447,17 @@ static int __devinit azx_codec_create(struct azx *chip, const char *model) | |||
1447 | } | 1447 | } |
1448 | } | 1448 | } |
1449 | 1449 | ||
1450 | /* AMD chipsets often cause the communication stalls upon certain | ||
1451 | * sequence like the pin-detection. It seems that forcing the synced | ||
1452 | * access works around the stall. Grrr... | ||
1453 | */ | ||
1454 | if (chip->pci->vendor == PCI_VENDOR_ID_AMD || | ||
1455 | chip->pci->vendor == PCI_VENDOR_ID_ATI) { | ||
1456 | snd_printk(KERN_INFO SFX "Enable sync_write for AMD chipset\n"); | ||
1457 | chip->bus->sync_write = 1; | ||
1458 | chip->bus->allow_bus_reset = 1; | ||
1459 | } | ||
1460 | |||
1450 | /* Then create codec instances */ | 1461 | /* Then create codec instances */ |
1451 | for (c = 0; c < max_slots; c++) { | 1462 | for (c = 0; c < max_slots; c++) { |
1452 | if ((chip->codec_mask & (1 << c)) & chip->codec_probe_mask) { | 1463 | if ((chip->codec_mask & (1 << c)) & chip->codec_probe_mask) { |
diff --git a/sound/pci/hda/patch_sigmatel.c b/sound/pci/hda/patch_sigmatel.c index 75b7155b164..6c5af3e77d8 100644 --- a/sound/pci/hda/patch_sigmatel.c +++ b/sound/pci/hda/patch_sigmatel.c | |||
@@ -5449,13 +5449,6 @@ static int patch_stac92hd83xxx(struct hda_codec *codec) | |||
5449 | spec->multiout.dac_nids = spec->dac_nids; | 5449 | spec->multiout.dac_nids = spec->dac_nids; |
5450 | spec->init = stac92hd83xxx_core_init; | 5450 | spec->init = stac92hd83xxx_core_init; |
5451 | 5451 | ||
5452 | if (codec->bus->pci && codec->bus->pci->vendor == PCI_VENDOR_ID_AMD) { | ||
5453 | snd_printk(KERN_INFO "idt92hd83xxx: " | ||
5454 | "Enable sync_write for AMD chipset\n"); | ||
5455 | codec->bus->sync_write = 1; | ||
5456 | codec->bus->allow_bus_reset = 1; | ||
5457 | } | ||
5458 | |||
5459 | spec->board_config = snd_hda_check_board_config(codec, | 5452 | spec->board_config = snd_hda_check_board_config(codec, |
5460 | STAC_92HD83XXX_MODELS, | 5453 | STAC_92HD83XXX_MODELS, |
5461 | stac92hd83xxx_models, | 5454 | stac92hd83xxx_models, |
@@ -5736,15 +5729,6 @@ again: | |||
5736 | if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP) | 5729 | if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP) |
5737 | snd_hda_sequence_write_cache(codec, unmute_init); | 5730 | snd_hda_sequence_write_cache(codec, unmute_init); |
5738 | 5731 | ||
5739 | /* Some HP machines seem to have unstable codec communications | ||
5740 | * especially with ATI fglrx driver. For recovering from the | ||
5741 | * CORB/RIRB stall, allow the BUS reset and keep always sync | ||
5742 | */ | ||
5743 | if (spec->board_config == STAC_HP_DV5) { | ||
5744 | codec->bus->sync_write = 1; | ||
5745 | codec->bus->allow_bus_reset = 1; | ||
5746 | } | ||
5747 | |||
5748 | spec->aloopback_ctl = stac92hd71bxx_loopback; | 5732 | spec->aloopback_ctl = stac92hd71bxx_loopback; |
5749 | spec->aloopback_mask = 0x50; | 5733 | spec->aloopback_mask = 0x50; |
5750 | spec->aloopback_shift = 0; | 5734 | spec->aloopback_shift = 0; |