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authorAlek Du <alek.du@intel.com>2009-09-07 04:25:45 -0400
committerH. Peter Anvin <hpa@zytor.com>2010-02-19 19:25:17 -0500
commitd39f6495f66616b637260405d0b5dc2656bc490e (patch)
tree2db2d962d336a47e54fb5cc0e069af4b63dfb73e
parent9325a28ce2fa7c597e5ed41455a06c30b82b5710 (diff)
x86, ioapic: Improve handling of i8259A irq init
Since we already track the number of legacy vectors by nr_legacy_irqs, we can avoid use static vector allocations -- we can use dynamic one. Signed-off-by: Alek Du <alek.du@intel.com> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80D01@orsmsx508.amr.corp.intel.com> Signed-off-by: Jacob Pan <jacob.jun.pan@intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
-rw-r--r--arch/x86/kernel/apic/io_apic.c23
1 files changed, 4 insertions, 19 deletions
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 53243ca7816..75265ab83b1 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -140,27 +140,10 @@ static struct irq_pin_list *get_one_free_irq_2_pin(int node)
140 140
141/* irq_cfg is indexed by the sum of all RTEs in all I/O APICs. */ 141/* irq_cfg is indexed by the sum of all RTEs in all I/O APICs. */
142#ifdef CONFIG_SPARSE_IRQ 142#ifdef CONFIG_SPARSE_IRQ
143static struct irq_cfg irq_cfgx[] = { 143static struct irq_cfg irq_cfgx[NR_IRQS_LEGACY];
144#else 144#else
145static struct irq_cfg irq_cfgx[NR_IRQS] = { 145static struct irq_cfg irq_cfgx[NR_IRQS];
146#endif 146#endif
147 [0] = { .vector = IRQ0_VECTOR, },
148 [1] = { .vector = IRQ1_VECTOR, },
149 [2] = { .vector = IRQ2_VECTOR, },
150 [3] = { .vector = IRQ3_VECTOR, },
151 [4] = { .vector = IRQ4_VECTOR, },
152 [5] = { .vector = IRQ5_VECTOR, },
153 [6] = { .vector = IRQ6_VECTOR, },
154 [7] = { .vector = IRQ7_VECTOR, },
155 [8] = { .vector = IRQ8_VECTOR, },
156 [9] = { .vector = IRQ9_VECTOR, },
157 [10] = { .vector = IRQ10_VECTOR, },
158 [11] = { .vector = IRQ11_VECTOR, },
159 [12] = { .vector = IRQ12_VECTOR, },
160 [13] = { .vector = IRQ13_VECTOR, },
161 [14] = { .vector = IRQ14_VECTOR, },
162 [15] = { .vector = IRQ15_VECTOR, },
163};
164 147
165void __init io_apic_disable_legacy(void) 148void __init io_apic_disable_legacy(void)
166{ 149{
@@ -181,6 +164,8 @@ int __init arch_early_irq_init(void)
181 node= cpu_to_node(boot_cpu_id); 164 node= cpu_to_node(boot_cpu_id);
182 165
183 for (i = 0; i < count; i++) { 166 for (i = 0; i < count; i++) {
167 if (i < nr_legacy_irqs)
168 cfg[i].vector = IRQ0_VECTOR + i;
184 desc = irq_to_desc(i); 169 desc = irq_to_desc(i);
185 desc->chip_data = &cfg[i]; 170 desc->chip_data = &cfg[i];
186 zalloc_cpumask_var_node(&cfg[i].domain, GFP_NOWAIT, node); 171 zalloc_cpumask_var_node(&cfg[i].domain, GFP_NOWAIT, node);