diff options
author | Vasanthakumar Thiagarajan <vasanth@atheros.com> | 2010-12-06 07:27:44 -0500 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2010-12-07 16:34:54 -0500 |
commit | d09b17f73fd8f475f33d0b8311d7b5a0bed67c67 (patch) | |
tree | 8ab7eb6202be4f1dd176abce164e40e6ea1cd559 | |
parent | 47c80de62e9d6d262a829502d689a8b56add8d3d (diff) |
ath9k: Configure pll control for AR9485
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r-- | drivers/net/wireless/ath/ath9k/hw.c | 7 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/reg.h | 2 |
2 files changed, 8 insertions, 1 deletions
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c index a2f85b75b7f..9f4398c88c8 100644 --- a/drivers/net/wireless/ath/ath9k/hw.c +++ b/drivers/net/wireless/ath/ath9k/hw.c | |||
@@ -667,7 +667,12 @@ static void ath9k_hw_init_qos(struct ath_hw *ah) | |||
667 | static void ath9k_hw_init_pll(struct ath_hw *ah, | 667 | static void ath9k_hw_init_pll(struct ath_hw *ah, |
668 | struct ath9k_channel *chan) | 668 | struct ath9k_channel *chan) |
669 | { | 669 | { |
670 | u32 pll = ath9k_hw_compute_pll_control(ah, chan); | 670 | u32 pll; |
671 | |||
672 | if (AR_SREV_9485(ah)) | ||
673 | REG_WRITE(ah, AR_RTC_PLL_CONTROL2, 0x886666); | ||
674 | |||
675 | pll = ath9k_hw_compute_pll_control(ah, chan); | ||
671 | 676 | ||
672 | REG_WRITE(ah, AR_RTC_PLL_CONTROL, pll); | 677 | REG_WRITE(ah, AR_RTC_PLL_CONTROL, pll); |
673 | 678 | ||
diff --git a/drivers/net/wireless/ath/ath9k/reg.h b/drivers/net/wireless/ath/ath9k/reg.h index 0153ba14a2f..d3257f783a6 100644 --- a/drivers/net/wireless/ath/ath9k/reg.h +++ b/drivers/net/wireless/ath/ath9k/reg.h | |||
@@ -1114,6 +1114,8 @@ enum { | |||
1114 | #define AR_RTC_PLL_CONTROL \ | 1114 | #define AR_RTC_PLL_CONTROL \ |
1115 | ((AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0014) : 0x7014) | 1115 | ((AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0014) : 0x7014) |
1116 | 1116 | ||
1117 | #define AR_RTC_PLL_CONTROL2 0x703c | ||
1118 | |||
1117 | #define AR_RTC_PLL_DIV 0x0000001f | 1119 | #define AR_RTC_PLL_DIV 0x0000001f |
1118 | #define AR_RTC_PLL_DIV_S 0 | 1120 | #define AR_RTC_PLL_DIV_S 0 |
1119 | #define AR_RTC_PLL_DIV2 0x00000020 | 1121 | #define AR_RTC_PLL_DIV2 0x00000020 |