diff options
author | Florian Tobias Schandinat <FlorianSchandinat@gmx.de> | 2011-03-24 10:25:51 -0400 |
---|---|---|
committer | Florian Tobias Schandinat <FlorianSchandinat@gmx.de> | 2011-03-24 17:17:52 -0400 |
commit | b692a63af8b63a7a7e84702a713d0072e336b326 (patch) | |
tree | ca4edaf57a416a33c8129f682880b10850e32d32 | |
parent | 2c536f84c19c73ab1e3411bf1596ff85c4a23783 (diff) |
viafb: add VIA slapping capability
This patch introduces dummy functions to execute when we don't know
what we should do (due to missing documentation). They do nothing
but print a nice message in the log explaining the situation.
To trigger this message initial power management support is
activated which might save a bit energy by disabling PLL and clock
if no device is configured to use them.
Note: The message is only shown for the oldest IGPs CLE266 and K400
as for the other platforms there are reasonable assumptions
how it does (hopefully) work.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
-rw-r--r-- | drivers/video/via/hw.c | 19 | ||||
-rw-r--r-- | drivers/video/via/via_clock.c | 30 |
2 files changed, 43 insertions, 6 deletions
diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c index f1eff0b4831..df84251b8f9 100644 --- a/drivers/video/via/hw.c +++ b/drivers/video/via/hw.c | |||
@@ -2289,6 +2289,25 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp, | |||
2289 | get_sync(viafbinfo1)); | 2289 | get_sync(viafbinfo1)); |
2290 | } | 2290 | } |
2291 | 2291 | ||
2292 | clock.set_primary_clock_source(VIA_CLKSRC_X1, true); | ||
2293 | clock.set_secondary_clock_source(VIA_CLKSRC_X1, true); | ||
2294 | |||
2295 | if (viaparinfo->shared->iga1_devices) { | ||
2296 | clock.set_primary_pll_state(VIA_STATE_ON); | ||
2297 | clock.set_primary_clock_state(VIA_STATE_ON); | ||
2298 | } else { | ||
2299 | clock.set_primary_pll_state(VIA_STATE_OFF); | ||
2300 | clock.set_primary_clock_state(VIA_STATE_OFF); | ||
2301 | } | ||
2302 | |||
2303 | if (viaparinfo->shared->iga2_devices) { | ||
2304 | clock.set_secondary_pll_state(VIA_STATE_ON); | ||
2305 | clock.set_secondary_clock_state(VIA_STATE_ON); | ||
2306 | } else { | ||
2307 | clock.set_secondary_pll_state(VIA_STATE_OFF); | ||
2308 | clock.set_secondary_clock_state(VIA_STATE_OFF); | ||
2309 | } | ||
2310 | |||
2292 | via_set_state(devices, VIA_STATE_ON); | 2311 | via_set_state(devices, VIA_STATE_ON); |
2293 | device_screen_on(); | 2312 | device_screen_on(); |
2294 | return 1; | 2313 | return 1; |
diff --git a/drivers/video/via/via_clock.c b/drivers/video/via/via_clock.c index 29afe4ce349..a829a246881 100644 --- a/drivers/video/via/via_clock.c +++ b/drivers/video/via/via_clock.c | |||
@@ -29,6 +29,9 @@ | |||
29 | #include "global.h" | 29 | #include "global.h" |
30 | #include "debug.h" | 30 | #include "debug.h" |
31 | 31 | ||
32 | const char *via_slap = "Please slap VIA Technologies to motivate them " | ||
33 | "releasing full documentation for your platform!\n"; | ||
34 | |||
32 | static inline u32 cle266_encode_pll(struct via_pll_config pll) | 35 | static inline u32 cle266_encode_pll(struct via_pll_config pll) |
33 | { | 36 | { |
34 | return (pll.multiplier << 8) | 37 | return (pll.multiplier << 8) |
@@ -229,19 +232,34 @@ static void set_secondary_clock_source(enum via_clksrc source, bool use_pll) | |||
229 | via_write_reg_mask(VIACR, 0x6C, data, 0x0F); | 232 | via_write_reg_mask(VIACR, 0x6C, data, 0x0F); |
230 | } | 233 | } |
231 | 234 | ||
235 | static void dummy_set_clock_state(u8 state) | ||
236 | { | ||
237 | printk(KERN_INFO "Using undocumented set clock state.\n%s", via_slap); | ||
238 | } | ||
239 | |||
240 | static void dummy_set_clock_source(enum via_clksrc source, bool use_pll) | ||
241 | { | ||
242 | printk(KERN_INFO "Using undocumented set clock source.\n%s", via_slap); | ||
243 | } | ||
244 | |||
245 | static void dummy_set_pll_state(u8 state) | ||
246 | { | ||
247 | printk(KERN_INFO "Using undocumented set PLL state.\n%s", via_slap); | ||
248 | } | ||
249 | |||
232 | void via_clock_init(struct via_clock *clock, int gfx_chip) | 250 | void via_clock_init(struct via_clock *clock, int gfx_chip) |
233 | { | 251 | { |
234 | switch (gfx_chip) { | 252 | switch (gfx_chip) { |
235 | case UNICHROME_CLE266: | 253 | case UNICHROME_CLE266: |
236 | case UNICHROME_K400: | 254 | case UNICHROME_K400: |
237 | clock->set_primary_clock_state = NULL; | 255 | clock->set_primary_clock_state = dummy_set_clock_state; |
238 | clock->set_primary_clock_source = NULL; | 256 | clock->set_primary_clock_source = dummy_set_clock_source; |
239 | clock->set_primary_pll_state = NULL; | 257 | clock->set_primary_pll_state = dummy_set_pll_state; |
240 | clock->set_primary_pll = cle266_set_primary_pll; | 258 | clock->set_primary_pll = cle266_set_primary_pll; |
241 | 259 | ||
242 | clock->set_secondary_clock_state = NULL; | 260 | clock->set_secondary_clock_state = dummy_set_clock_state; |
243 | clock->set_secondary_clock_source = NULL; | 261 | clock->set_secondary_clock_source = dummy_set_clock_source; |
244 | clock->set_secondary_pll_state = NULL; | 262 | clock->set_secondary_pll_state = dummy_set_pll_state; |
245 | clock->set_secondary_pll = cle266_set_secondary_pll; | 263 | clock->set_secondary_pll = cle266_set_secondary_pll; |
246 | break; | 264 | break; |
247 | case UNICHROME_K800: | 265 | case UNICHROME_K800: |