aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorThomas Gleixner <tglx@linutronix.de>2008-05-02 14:10:09 -0400
committerIngo Molnar <mingo@elte.hu>2008-05-12 15:28:05 -0400
commit9b7dc567d03d74a1fbae84e88949b6a60d922d82 (patch)
tree7b59581c40ea13373574daeb53a01e90729ddc7f
parent2e0884362d1fe36ef2d673d763d6ce35e2044e66 (diff)
x86: unify interrupt vector defines
The interrupt vector defines are copied 4 times around with minimal differences. Move them all into asm-x86/irq_vectors.h Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat
-rw-r--r--arch/x86/kernel/entry_32.S2
-rw-r--r--arch/x86/kernel/vmiclock_32.c3
-rw-r--r--arch/x86/mach-visws/visws_apic.c3
-rw-r--r--include/asm-x86/hw_irq.h12
-rw-r--r--include/asm-x86/hw_irq_64.h71
-rw-r--r--include/asm-x86/irq_32.h2
-rw-r--r--include/asm-x86/irq_64.h29
-rw-r--r--include/asm-x86/irq_vectors.h168
-rw-r--r--include/asm-x86/mach-default/irq_vectors.h96
-rw-r--r--include/asm-x86/mach-default/irq_vectors_limits.h16
-rw-r--r--include/asm-x86/mach-visws/irq_vectors.h62
-rw-r--r--include/asm-x86/mach-voyager/irq_vectors.h79
12 files changed, 184 insertions, 359 deletions
diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S
index 2a609dc3271..0c7f64b99e1 100644
--- a/arch/x86/kernel/entry_32.S
+++ b/arch/x86/kernel/entry_32.S
@@ -51,7 +51,7 @@
51#include <asm/percpu.h> 51#include <asm/percpu.h>
52#include <asm/dwarf2.h> 52#include <asm/dwarf2.h>
53#include <asm/processor-flags.h> 53#include <asm/processor-flags.h>
54#include "irq_vectors.h" 54#include <asm/irq_vectors.h>
55 55
56/* 56/*
57 * We use macros for low-level operations which need to be overridden 57 * We use macros for low-level operations which need to be overridden
diff --git a/arch/x86/kernel/vmiclock_32.c b/arch/x86/kernel/vmiclock_32.c
index a2b030780aa..ba7d19e102b 100644
--- a/arch/x86/kernel/vmiclock_32.c
+++ b/arch/x86/kernel/vmiclock_32.c
@@ -33,8 +33,7 @@
33#include <asm/apic.h> 33#include <asm/apic.h>
34#include <asm/timer.h> 34#include <asm/timer.h>
35#include <asm/i8253.h> 35#include <asm/i8253.h>
36 36#include <asm/irq_vectors.h>
37#include <irq_vectors.h>
38 37
39#define VMI_ONESHOT (VMI_ALARM_IS_ONESHOT | VMI_CYCLES_REAL | vmi_get_alarm_wiring()) 38#define VMI_ONESHOT (VMI_ALARM_IS_ONESHOT | VMI_CYCLES_REAL | vmi_get_alarm_wiring())
40#define VMI_PERIODIC (VMI_ALARM_IS_PERIODIC | VMI_CYCLES_REAL | vmi_get_alarm_wiring()) 39#define VMI_PERIODIC (VMI_ALARM_IS_PERIODIC | VMI_CYCLES_REAL | vmi_get_alarm_wiring())
diff --git a/arch/x86/mach-visws/visws_apic.c b/arch/x86/mach-visws/visws_apic.c
index cef9cb1d15a..d8b2cfd85d9 100644
--- a/arch/x86/mach-visws/visws_apic.c
+++ b/arch/x86/mach-visws/visws_apic.c
@@ -21,10 +21,9 @@
21#include <asm/io.h> 21#include <asm/io.h>
22#include <asm/apic.h> 22#include <asm/apic.h>
23#include <asm/i8259.h> 23#include <asm/i8259.h>
24#include <asm/irq_vectors.h>
24 25
25#include "cobalt.h" 26#include "cobalt.h"
26#include "irq_vectors.h"
27
28 27
29static DEFINE_SPINLOCK(cobalt_lock); 28static DEFINE_SPINLOCK(cobalt_lock);
30 29
diff --git a/include/asm-x86/hw_irq.h b/include/asm-x86/hw_irq.h
index 38af08ed43c..a8c5e8bdaa4 100644
--- a/include/asm-x86/hw_irq.h
+++ b/include/asm-x86/hw_irq.h
@@ -13,7 +13,7 @@
13 * unified by tglx 13 * unified by tglx
14 */ 14 */
15 15
16#define NMI_VECTOR 0x02 16#include <asm/irq_vectors.h>
17 17
18#ifndef __ASSEMBLY__ 18#ifndef __ASSEMBLY__
19 19
@@ -75,6 +75,16 @@ extern void send_IPI(int dest, int vector);
75extern atomic_t irq_err_count; 75extern atomic_t irq_err_count;
76extern atomic_t irq_mis_count; 76extern atomic_t irq_mis_count;
77 77
78/* Voyager functions */
79extern asmlinkage void vic_cpi_interrupt(void);
80extern asmlinkage void vic_sys_interrupt(void);
81extern asmlinkage void vic_cmn_interrupt(void);
82extern asmlinkage void qic_timer_interrupt(void);
83extern asmlinkage void qic_invalidate_interrupt(void);
84extern asmlinkage void qic_reschedule_interrupt(void);
85extern asmlinkage void qic_enable_irq_interrupt(void);
86extern asmlinkage void qic_call_function_interrupt(void);
87
78#endif /* !ASSEMBLY_ */ 88#endif /* !ASSEMBLY_ */
79 89
80#ifdef CONFIG_X86_32 90#ifdef CONFIG_X86_32
diff --git a/include/asm-x86/hw_irq_64.h b/include/asm-x86/hw_irq_64.h
index 28674576e9f..98c9d494a71 100644
--- a/include/asm-x86/hw_irq_64.h
+++ b/include/asm-x86/hw_irq_64.h
@@ -1,74 +1,3 @@
1/*
2 * IDT vectors usable for external interrupt sources start
3 * at 0x20:
4 */
5#define FIRST_EXTERNAL_VECTOR 0x20
6
7#define IA32_SYSCALL_VECTOR 0x80
8
9
10/* Reserve the lowest usable priority level 0x20 - 0x2f for triggering
11 * cleanup after irq migration.
12 */
13#define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR
14
15/*
16 * Vectors 0x30-0x3f are used for ISA interrupts.
17 */
18#define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR + 0x10)
19#define IRQ1_VECTOR (IRQ0_VECTOR + 1)
20#define IRQ2_VECTOR (IRQ0_VECTOR + 2)
21#define IRQ3_VECTOR (IRQ0_VECTOR + 3)
22#define IRQ4_VECTOR (IRQ0_VECTOR + 4)
23#define IRQ5_VECTOR (IRQ0_VECTOR + 5)
24#define IRQ6_VECTOR (IRQ0_VECTOR + 6)
25#define IRQ7_VECTOR (IRQ0_VECTOR + 7)
26#define IRQ8_VECTOR (IRQ0_VECTOR + 8)
27#define IRQ9_VECTOR (IRQ0_VECTOR + 9)
28#define IRQ10_VECTOR (IRQ0_VECTOR + 10)
29#define IRQ11_VECTOR (IRQ0_VECTOR + 11)
30#define IRQ12_VECTOR (IRQ0_VECTOR + 12)
31#define IRQ13_VECTOR (IRQ0_VECTOR + 13)
32#define IRQ14_VECTOR (IRQ0_VECTOR + 14)
33#define IRQ15_VECTOR (IRQ0_VECTOR + 15)
34
35/*
36 * Special IRQ vectors used by the SMP architecture, 0xf0-0xff
37 *
38 * some of the following vectors are 'rare', they are merged
39 * into a single vector (CALL_FUNCTION_VECTOR) to save vector space.
40 * TLB, reschedule and local APIC vectors are performance-critical.
41 */
42#define SPURIOUS_APIC_VECTOR 0xff
43#define ERROR_APIC_VECTOR 0xfe
44#define RESCHEDULE_VECTOR 0xfd
45#define CALL_FUNCTION_VECTOR 0xfc
46/* fb free - please don't readd KDB here because it's useless
47 (hint - think what a NMI bit does to a vector) */
48#define THERMAL_APIC_VECTOR 0xfa
49#define THRESHOLD_APIC_VECTOR 0xf9
50/* f8 free */
51#define INVALIDATE_TLB_VECTOR_END 0xf7
52#define INVALIDATE_TLB_VECTOR_START 0xf0 /* f0-f7 used for TLB flush */
53
54#define NUM_INVALIDATE_TLB_VECTORS 8
55
56/*
57 * Local APIC timer IRQ vector is on a different priority level,
58 * to work around the 'lost local interrupt if more than 2 IRQ
59 * sources per level' errata.
60 */
61#define LOCAL_TIMER_VECTOR 0xef
62
63/*
64 * First APIC vector available to drivers: (vectors 0x30-0xee)
65 * we start at 0x41 to spread out vectors evenly between priority
66 * levels. (0x80 is the syscall vector)
67 */
68#define FIRST_DEVICE_VECTOR (IRQ15_VECTOR + 2)
69#define FIRST_SYSTEM_VECTOR 0xef /* duplicated in irq.h */
70
71
72#ifndef __ASSEMBLY__ 1#ifndef __ASSEMBLY__
73 2
74typedef int vector_irq_t[NR_VECTORS]; 3typedef int vector_irq_t[NR_VECTORS];
diff --git a/include/asm-x86/irq_32.h b/include/asm-x86/irq_32.h
index 0b79f318524..c5c7542f79a 100644
--- a/include/asm-x86/irq_32.h
+++ b/include/asm-x86/irq_32.h
@@ -12,7 +12,7 @@
12 12
13#include <linux/sched.h> 13#include <linux/sched.h>
14/* include comes from machine specific directory */ 14/* include comes from machine specific directory */
15#include "irq_vectors.h" 15#include <asm/irq_vectors.h>
16#include <asm/thread_info.h> 16#include <asm/thread_info.h>
17 17
18static inline int irq_canonicalize(int irq) 18static inline int irq_canonicalize(int irq)
diff --git a/include/asm-x86/irq_64.h b/include/asm-x86/irq_64.h
index 7608176590b..3037ec667bf 100644
--- a/include/asm-x86/irq_64.h
+++ b/include/asm-x86/irq_64.h
@@ -11,34 +11,7 @@
11 */ 11 */
12 12
13#include <asm/apicdef.h> 13#include <asm/apicdef.h>
14 14#include <asm/irq_vectors.h>
15#define TIMER_IRQ 0
16
17/*
18 * 16 8259A IRQ's, 208 potential APIC interrupt sources.
19 * Right now the APIC is mostly only used for SMP.
20 * 256 vectors is an architectural limit. (we can have
21 * more than 256 devices theoretically, but they will
22 * have to use shared interrupts)
23 * Since vectors 0x00-0x1f are used/reserved for the CPU,
24 * the usable vector space is 0x20-0xff (224 vectors)
25 */
26
27/*
28 * The maximum number of vectors supported by x86_64 processors
29 * is limited to 256. For processors other than x86_64, NR_VECTORS
30 * should be changed accordingly.
31 */
32#define NR_VECTORS 256
33
34#define FIRST_SYSTEM_VECTOR 0xef /* duplicated in hw_irq.h */
35
36#if NR_CPUS < MAX_IO_APICS
37#define NR_IRQS (NR_VECTORS + (32 * NR_CPUS))
38#else
39#define NR_IRQS (NR_VECTORS + (32 * MAX_IO_APICS))
40#endif
41#define NR_IRQ_VECTORS NR_IRQS
42 15
43static inline int irq_canonicalize(int irq) 16static inline int irq_canonicalize(int irq)
44{ 17{
diff --git a/include/asm-x86/irq_vectors.h b/include/asm-x86/irq_vectors.h
new file mode 100644
index 00000000000..daceaaf0a3a
--- /dev/null
+++ b/include/asm-x86/irq_vectors.h
@@ -0,0 +1,168 @@
1#ifndef _ASM_IRQ_VECTORS_H
2#define _ASM_IRQ_VECTORS_H
3
4#include <linux/threads.h>
5
6#define NMI_VECTOR 0x02
7
8/*
9 * IDT vectors usable for external interrupt sources start
10 * at 0x20:
11 */
12#define FIRST_EXTERNAL_VECTOR 0x20
13
14#ifdef CONFIG_X86_32
15# define SYSCALL_VECTOR 0x80
16#else
17# define IA32_SYSCALL_VECTOR 0x80
18#endif
19
20/*
21 * Vectors 0x20-0x2f are used for ISA interrupts on 32 bit.
22 *
23 * Reserve the lowest usable priority level 0x20 - 0x2f for triggering
24 * cleanup after irq migration on 64 bit.
25 */
26#define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR
27
28/*
29 * Vectors 0x30-0x3f are used for ISA interrupts on 64 bit
30 */
31#define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR + 0x10)
32#define IRQ1_VECTOR (IRQ0_VECTOR + 1)
33#define IRQ2_VECTOR (IRQ0_VECTOR + 2)
34#define IRQ3_VECTOR (IRQ0_VECTOR + 3)
35#define IRQ4_VECTOR (IRQ0_VECTOR + 4)
36#define IRQ5_VECTOR (IRQ0_VECTOR + 5)
37#define IRQ6_VECTOR (IRQ0_VECTOR + 6)
38#define IRQ7_VECTOR (IRQ0_VECTOR + 7)
39#define IRQ8_VECTOR (IRQ0_VECTOR + 8)
40#define IRQ9_VECTOR (IRQ0_VECTOR + 9)
41#define IRQ10_VECTOR (IRQ0_VECTOR + 10)
42#define IRQ11_VECTOR (IRQ0_VECTOR + 11)
43#define IRQ12_VECTOR (IRQ0_VECTOR + 12)
44#define IRQ13_VECTOR (IRQ0_VECTOR + 13)
45#define IRQ14_VECTOR (IRQ0_VECTOR + 14)
46#define IRQ15_VECTOR (IRQ0_VECTOR + 15)
47
48/*
49 * Special IRQ vectors used by the SMP architecture, 0xf0-0xff
50 *
51 * some of the following vectors are 'rare', they are merged
52 * into a single vector (CALL_FUNCTION_VECTOR) to save vector space.
53 * TLB, reschedule and local APIC vectors are performance-critical.
54 *
55 * Vectors 0xf0-0xfa are free (reserved for future Linux use).
56 */
57#ifdef CONFIG_X86_32
58
59# define SPURIOUS_APIC_VECTOR 0xff
60# define ERROR_APIC_VECTOR 0xfe
61# define INVALIDATE_TLB_VECTOR 0xfd
62# define RESCHEDULE_VECTOR 0xfc
63# define CALL_FUNCTION_VECTOR 0xfb
64# define THERMAL_APIC_VECTOR 0xf0
65
66#else
67
68#define SPURIOUS_APIC_VECTOR 0xff
69#define ERROR_APIC_VECTOR 0xfe
70#define RESCHEDULE_VECTOR 0xfd
71#define CALL_FUNCTION_VECTOR 0xfc
72#define THERMAL_APIC_VECTOR 0xfa
73#define THRESHOLD_APIC_VECTOR 0xf9
74#define INVALIDATE_TLB_VECTOR_END 0xf7
75#define INVALIDATE_TLB_VECTOR_START 0xf0 /* f0-f7 used for TLB flush */
76
77#define NUM_INVALIDATE_TLB_VECTORS 8
78
79#endif
80
81/*
82 * Local APIC timer IRQ vector is on a different priority level,
83 * to work around the 'lost local interrupt if more than 2 IRQ
84 * sources per level' errata.
85 */
86#define LOCAL_TIMER_VECTOR 0xef
87
88/*
89 * First APIC vector available to drivers: (vectors 0x30-0xee) we
90 * start at 0x31(0x41) to spread out vectors evenly between priority
91 * levels. (0x80 is the syscall vector)
92 */
93#ifdef CONFIG_X86_32
94# define FIRST_DEVICE_VECTOR 0x31
95#else
96# define FIRST_DEVICE_VECTOR (IRQ15_VECTOR + 2)
97#endif
98
99#define FIRST_SYSTEM_VECTOR 0xef
100
101#define NR_VECTORS 256
102
103#define FPU_IRQ 13
104
105#define FIRST_VM86_IRQ 3
106#define LAST_VM86_IRQ 15
107#define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15)
108
109#if !defined(CONFIG_X86_VISWS) && !defined(CONFIG_X86_VOYAGER)
110
111# if defined(CONFIG_X86_IO_APIC) || defined(CONFIG_PARAVIRT)
112
113# define NR_IRQS 224
114
115# if (224 >= 32 * NR_CPUS)
116# define NR_IRQ_VECTORS NR_IRQS
117# else
118# define NR_IRQ_VECTORS (32 * NR_CPUS)
119# endif
120
121# else /* IO_APIC || PARAVIRT */
122
123# define NR_IRQS 16
124# define NR_IRQ_VECTORS NR_IRQS
125
126# endif
127
128#else /* !VISWS && !VOYAGER */
129
130# define NR_IRQS 224
131# define NR_IRQ_VECTORS NR_IRQS
132
133#endif /* VISWS */
134
135/* Voyager specific defines */
136/* These define the CPIs we use in linux */
137#define VIC_CPI_LEVEL0 0
138#define VIC_CPI_LEVEL1 1
139/* now the fake CPIs */
140#define VIC_TIMER_CPI 2
141#define VIC_INVALIDATE_CPI 3
142#define VIC_RESCHEDULE_CPI 4
143#define VIC_ENABLE_IRQ_CPI 5
144#define VIC_CALL_FUNCTION_CPI 6
145
146/* Now the QIC CPIs: Since we don't need the two initial levels,
147 * these are 2 less than the VIC CPIs */
148#define QIC_CPI_OFFSET 1
149#define QIC_TIMER_CPI (VIC_TIMER_CPI - QIC_CPI_OFFSET)
150#define QIC_INVALIDATE_CPI (VIC_INVALIDATE_CPI - QIC_CPI_OFFSET)
151#define QIC_RESCHEDULE_CPI (VIC_RESCHEDULE_CPI - QIC_CPI_OFFSET)
152#define QIC_ENABLE_IRQ_CPI (VIC_ENABLE_IRQ_CPI - QIC_CPI_OFFSET)
153#define QIC_CALL_FUNCTION_CPI (VIC_CALL_FUNCTION_CPI - QIC_CPI_OFFSET)
154
155#define VIC_START_FAKE_CPI VIC_TIMER_CPI
156#define VIC_END_FAKE_CPI VIC_CALL_FUNCTION_CPI
157
158/* this is the SYS_INT CPI. */
159#define VIC_SYS_INT 8
160#define VIC_CMN_INT 15
161
162/* This is the boot CPI for alternate processors. It gets overwritten
163 * by the above once the system has activated all available processors */
164#define VIC_CPU_BOOT_CPI VIC_CPI_LEVEL0
165#define VIC_CPU_BOOT_ERRATA_CPI (VIC_CPI_LEVEL0 + 8)
166
167
168#endif /* _ASM_IRQ_VECTORS_H */
diff --git a/include/asm-x86/mach-default/irq_vectors.h b/include/asm-x86/mach-default/irq_vectors.h
deleted file mode 100644
index 881c63ca61a..00000000000
--- a/include/asm-x86/mach-default/irq_vectors.h
+++ /dev/null
@@ -1,96 +0,0 @@
1/*
2 * This file should contain #defines for all of the interrupt vector
3 * numbers used by this architecture.
4 *
5 * In addition, there are some standard defines:
6 *
7 * FIRST_EXTERNAL_VECTOR:
8 * The first free place for external interrupts
9 *
10 * SYSCALL_VECTOR:
11 * The IRQ vector a syscall makes the user to kernel transition
12 * under.
13 *
14 * TIMER_IRQ:
15 * The IRQ number the timer interrupt comes in at.
16 *
17 * NR_IRQS:
18 * The total number of interrupt vectors (including all the
19 * architecture specific interrupts) needed.
20 *
21 */
22#ifndef _ASM_IRQ_VECTORS_H
23#define _ASM_IRQ_VECTORS_H
24
25/*
26 * IDT vectors usable for external interrupt sources start
27 * at 0x20:
28 */
29#define FIRST_EXTERNAL_VECTOR 0x20
30
31#define SYSCALL_VECTOR 0x80
32
33/*
34 * Vectors 0x20-0x2f are used for ISA interrupts.
35 */
36
37/*
38 * Special IRQ vectors used by the SMP architecture, 0xf0-0xff
39 *
40 * some of the following vectors are 'rare', they are merged
41 * into a single vector (CALL_FUNCTION_VECTOR) to save vector space.
42 * TLB, reschedule and local APIC vectors are performance-critical.
43 *
44 * Vectors 0xf0-0xfa are free (reserved for future Linux use).
45 */
46#define SPURIOUS_APIC_VECTOR 0xff
47#define ERROR_APIC_VECTOR 0xfe
48#define INVALIDATE_TLB_VECTOR 0xfd
49#define RESCHEDULE_VECTOR 0xfc
50#define CALL_FUNCTION_VECTOR 0xfb
51
52#define THERMAL_APIC_VECTOR 0xf0
53/*
54 * Local APIC timer IRQ vector is on a different priority level,
55 * to work around the 'lost local interrupt if more than 2 IRQ
56 * sources per level' errata.
57 */
58#define LOCAL_TIMER_VECTOR 0xef
59
60/*
61 * First APIC vector available to drivers: (vectors 0x30-0xee)
62 * we start at 0x31 to spread out vectors evenly between priority
63 * levels. (0x80 is the syscall vector)
64 */
65#define FIRST_DEVICE_VECTOR 0x31
66#define FIRST_SYSTEM_VECTOR 0xef
67
68#define TIMER_IRQ 0
69
70/*
71 * 16 8259A IRQ's, 208 potential APIC interrupt sources.
72 * Right now the APIC is mostly only used for SMP.
73 * 256 vectors is an architectural limit. (we can have
74 * more than 256 devices theoretically, but they will
75 * have to use shared interrupts)
76 * Since vectors 0x00-0x1f are used/reserved for the CPU,
77 * the usable vector space is 0x20-0xff (224 vectors)
78 */
79
80/*
81 * The maximum number of vectors supported by i386 processors
82 * is limited to 256. For processors other than i386, NR_VECTORS
83 * should be changed accordingly.
84 */
85#define NR_VECTORS 256
86
87#include "irq_vectors_limits.h"
88
89#define FPU_IRQ 13
90
91#define FIRST_VM86_IRQ 3
92#define LAST_VM86_IRQ 15
93#define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15)
94
95
96#endif /* _ASM_IRQ_VECTORS_H */
diff --git a/include/asm-x86/mach-default/irq_vectors_limits.h b/include/asm-x86/mach-default/irq_vectors_limits.h
deleted file mode 100644
index a90c7a60109..00000000000
--- a/include/asm-x86/mach-default/irq_vectors_limits.h
+++ /dev/null
@@ -1,16 +0,0 @@
1#ifndef _ASM_IRQ_VECTORS_LIMITS_H
2#define _ASM_IRQ_VECTORS_LIMITS_H
3
4#if defined(CONFIG_X86_IO_APIC) || defined(CONFIG_PARAVIRT)
5#define NR_IRQS 224
6# if (224 >= 32 * NR_CPUS)
7# define NR_IRQ_VECTORS NR_IRQS
8# else
9# define NR_IRQ_VECTORS (32 * NR_CPUS)
10# endif
11#else
12#define NR_IRQS 16
13#define NR_IRQ_VECTORS NR_IRQS
14#endif
15
16#endif /* _ASM_IRQ_VECTORS_LIMITS_H */
diff --git a/include/asm-x86/mach-visws/irq_vectors.h b/include/asm-x86/mach-visws/irq_vectors.h
deleted file mode 100644
index cb572d8db50..00000000000
--- a/include/asm-x86/mach-visws/irq_vectors.h
+++ /dev/null
@@ -1,62 +0,0 @@
1#ifndef _ASM_IRQ_VECTORS_H
2#define _ASM_IRQ_VECTORS_H
3
4/*
5 * IDT vectors usable for external interrupt sources start
6 * at 0x20:
7 */
8#define FIRST_EXTERNAL_VECTOR 0x20
9
10#define SYSCALL_VECTOR 0x80
11
12/*
13 * Vectors 0x20-0x2f are used for ISA interrupts.
14 */
15
16/*
17 * Special IRQ vectors used by the SMP architecture, 0xf0-0xff
18 *
19 * some of the following vectors are 'rare', they are merged
20 * into a single vector (CALL_FUNCTION_VECTOR) to save vector space.
21 * TLB, reschedule and local APIC vectors are performance-critical.
22 *
23 * Vectors 0xf0-0xfa are free (reserved for future Linux use).
24 */
25#define SPURIOUS_APIC_VECTOR 0xff
26#define ERROR_APIC_VECTOR 0xfe
27#define INVALIDATE_TLB_VECTOR 0xfd
28#define RESCHEDULE_VECTOR 0xfc
29#define CALL_FUNCTION_VECTOR 0xfb
30
31#define THERMAL_APIC_VECTOR 0xf0
32/*
33 * Local APIC timer IRQ vector is on a different priority level,
34 * to work around the 'lost local interrupt if more than 2 IRQ
35 * sources per level' errata.
36 */
37#define LOCAL_TIMER_VECTOR 0xef
38
39/*
40 * First APIC vector available to drivers: (vectors 0x30-0xee)
41 * we start at 0x31 to spread out vectors evenly between priority
42 * levels. (0x80 is the syscall vector)
43 */
44#define FIRST_DEVICE_VECTOR 0x31
45#define FIRST_SYSTEM_VECTOR 0xef
46
47#define TIMER_IRQ 0
48
49/*
50 * IRQ definitions
51 */
52#define NR_VECTORS 256
53#define NR_IRQS 224
54#define NR_IRQ_VECTORS NR_IRQS
55
56#define FPU_IRQ 13
57
58#define FIRST_VM86_IRQ 3
59#define LAST_VM86_IRQ 15
60#define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15)
61
62#endif /* _ASM_IRQ_VECTORS_H */
diff --git a/include/asm-x86/mach-voyager/irq_vectors.h b/include/asm-x86/mach-voyager/irq_vectors.h
deleted file mode 100644
index 165421f5821..00000000000
--- a/include/asm-x86/mach-voyager/irq_vectors.h
+++ /dev/null
@@ -1,79 +0,0 @@
1/* -*- mode: c; c-basic-offset: 8 -*- */
2
3/* Copyright (C) 2002
4 *
5 * Author: James.Bottomley@HansenPartnership.com
6 *
7 * linux/arch/i386/voyager/irq_vectors.h
8 *
9 * This file provides definitions for the VIC and QIC CPIs
10 */
11
12#ifndef _ASM_IRQ_VECTORS_H
13#define _ASM_IRQ_VECTORS_H
14
15/*
16 * IDT vectors usable for external interrupt sources start
17 * at 0x20:
18 */
19#define FIRST_EXTERNAL_VECTOR 0x20
20
21#define SYSCALL_VECTOR 0x80
22
23/*
24 * Vectors 0x20-0x2f are used for ISA interrupts.
25 */
26
27/* These define the CPIs we use in linux */
28#define VIC_CPI_LEVEL0 0
29#define VIC_CPI_LEVEL1 1
30/* now the fake CPIs */
31#define VIC_TIMER_CPI 2
32#define VIC_INVALIDATE_CPI 3
33#define VIC_RESCHEDULE_CPI 4
34#define VIC_ENABLE_IRQ_CPI 5
35#define VIC_CALL_FUNCTION_CPI 6
36
37/* Now the QIC CPIs: Since we don't need the two initial levels,
38 * these are 2 less than the VIC CPIs */
39#define QIC_CPI_OFFSET 1
40#define QIC_TIMER_CPI (VIC_TIMER_CPI - QIC_CPI_OFFSET)
41#define QIC_INVALIDATE_CPI (VIC_INVALIDATE_CPI - QIC_CPI_OFFSET)
42#define QIC_RESCHEDULE_CPI (VIC_RESCHEDULE_CPI - QIC_CPI_OFFSET)
43#define QIC_ENABLE_IRQ_CPI (VIC_ENABLE_IRQ_CPI - QIC_CPI_OFFSET)
44#define QIC_CALL_FUNCTION_CPI (VIC_CALL_FUNCTION_CPI - QIC_CPI_OFFSET)
45
46#define VIC_START_FAKE_CPI VIC_TIMER_CPI
47#define VIC_END_FAKE_CPI VIC_CALL_FUNCTION_CPI
48
49/* this is the SYS_INT CPI. */
50#define VIC_SYS_INT 8
51#define VIC_CMN_INT 15
52
53/* This is the boot CPI for alternate processors. It gets overwritten
54 * by the above once the system has activated all available processors */
55#define VIC_CPU_BOOT_CPI VIC_CPI_LEVEL0
56#define VIC_CPU_BOOT_ERRATA_CPI (VIC_CPI_LEVEL0 + 8)
57
58#define NR_VECTORS 256
59#define NR_IRQS 224
60#define NR_IRQ_VECTORS NR_IRQS
61
62#define FPU_IRQ 13
63
64#define FIRST_VM86_IRQ 3
65#define LAST_VM86_IRQ 15
66#define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15)
67
68#ifndef __ASSEMBLY__
69extern asmlinkage void vic_cpi_interrupt(void);
70extern asmlinkage void vic_sys_interrupt(void);
71extern asmlinkage void vic_cmn_interrupt(void);
72extern asmlinkage void qic_timer_interrupt(void);
73extern asmlinkage void qic_invalidate_interrupt(void);
74extern asmlinkage void qic_reschedule_interrupt(void);
75extern asmlinkage void qic_enable_irq_interrupt(void);
76extern asmlinkage void qic_call_function_interrupt(void);
77#endif /* !__ASSEMBLY__ */
78
79#endif /* _ASM_IRQ_VECTORS_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-04 16:27:26 -0500