diff options
author | David S. Miller <davem@davemloft.net> | 2008-08-25 16:38:30 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2008-08-25 16:38:30 -0400 |
commit | 85269eb5542b425b99d79dc4c312dce0157eac7e (patch) | |
tree | 241d63b5801a1d44cada8ae3075496818a31c688 | |
parent | 41660e9ac639c97840258d3c5294f618ca8cc46f (diff) |
sparc64: Add JBUS UltraSPARC-IIIi support to memory controller driver.
Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r-- | arch/sparc64/kernel/chmc.c | 536 |
1 files changed, 453 insertions, 83 deletions
diff --git a/arch/sparc64/kernel/chmc.c b/arch/sparc64/kernel/chmc.c index a3c79fd5dd3..3e14952e940 100644 --- a/arch/sparc64/kernel/chmc.c +++ b/arch/sparc64/kernel/chmc.c | |||
@@ -33,6 +33,12 @@ MODULE_DESCRIPTION("UltraSPARC-III memory controller driver"); | |||
33 | MODULE_LICENSE("GPL"); | 33 | MODULE_LICENSE("GPL"); |
34 | MODULE_VERSION(DRV_MODULE_VERSION); | 34 | MODULE_VERSION(DRV_MODULE_VERSION); |
35 | 35 | ||
36 | static int mc_type; | ||
37 | #define MC_TYPE_SAFARI 1 | ||
38 | #define MC_TYPE_JBUS 2 | ||
39 | |||
40 | static dimm_printer_t us3mc_dimm_printer; | ||
41 | |||
36 | #define CHMCTRL_NDGRPS 2 | 42 | #define CHMCTRL_NDGRPS 2 |
37 | #define CHMCTRL_NDIMMS 4 | 43 | #define CHMCTRL_NDIMMS 4 |
38 | 44 | ||
@@ -96,8 +102,386 @@ struct chmc { | |||
96 | struct chmc_bank_info logical_banks[CHMCTRL_NBANKS]; | 102 | struct chmc_bank_info logical_banks[CHMCTRL_NBANKS]; |
97 | }; | 103 | }; |
98 | 104 | ||
105 | #define JBUSMC_REGS_SIZE 8 | ||
106 | |||
107 | #define JB_MC_REG1_DIMM2_BANK3 0x8000000000000000 | ||
108 | #define JB_MC_REG1_DIMM1_BANK1 0x4000000000000000 | ||
109 | #define JB_MC_REG1_DIMM2_BANK2 0x2000000000000000 | ||
110 | #define JB_MC_REG1_DIMM1_BANK0 0x1000000000000000 | ||
111 | #define JB_MC_REG1_XOR 0x0000010000000000 | ||
112 | #define JB_MC_REG1_ADDR_GEN_2 0x000000e000000000 | ||
113 | #define JB_MC_REG1_ADDR_GEN_2_SHIFT 37 | ||
114 | #define JB_MC_REG1_ADDR_GEN_1 0x0000001c00000000 | ||
115 | #define JB_MC_REG1_ADDR_GEN_1_SHIFT 34 | ||
116 | #define JB_MC_REG1_INTERLEAVE 0x0000000001800000 | ||
117 | #define JB_MC_REG1_INTERLEAVE_SHIFT 23 | ||
118 | #define JB_MC_REG1_DIMM2_PTYPE 0x0000000000200000 | ||
119 | #define JB_MC_REG1_DIMM2_PTYPE_SHIFT 21 | ||
120 | #define JB_MC_REG1_DIMM1_PTYPE 0x0000000000100000 | ||
121 | #define JB_MC_REG1_DIMM1_PTYPE_SHIFT 20 | ||
122 | |||
123 | #define PART_TYPE_X8 0 | ||
124 | #define PART_TYPE_X4 1 | ||
125 | |||
126 | #define INTERLEAVE_NONE 0 | ||
127 | #define INTERLEAVE_SAME 1 | ||
128 | #define INTERLEAVE_INTERNAL 2 | ||
129 | #define INTERLEAVE_BOTH 3 | ||
130 | |||
131 | #define ADDR_GEN_128MB 0 | ||
132 | #define ADDR_GEN_256MB 1 | ||
133 | #define ADDR_GEN_512MB 2 | ||
134 | #define ADDR_GEN_1GB 3 | ||
135 | |||
136 | #define JB_NUM_DIMM_GROUPS 2 | ||
137 | #define JB_NUM_DIMMS_PER_GROUP 2 | ||
138 | #define JB_NUM_DIMMS (JB_NUM_DIMM_GROUPS * JB_NUM_DIMMS_PER_GROUP) | ||
139 | |||
140 | struct jbusmc_obp_map { | ||
141 | unsigned char dimm_map[18]; | ||
142 | unsigned char pin_map[144]; | ||
143 | }; | ||
144 | |||
145 | struct jbusmc_obp_mem_layout { | ||
146 | /* One max 8-byte string label per DIMM. Usually | ||
147 | * this matches the label on the motherboard where | ||
148 | * that DIMM resides. | ||
149 | */ | ||
150 | char dimm_labels[JB_NUM_DIMMS][DIMM_LABEL_SZ]; | ||
151 | |||
152 | /* If symmetric use map[0], else it is | ||
153 | * asymmetric and map[1] should be used. | ||
154 | */ | ||
155 | char symmetric; | ||
156 | |||
157 | struct jbusmc_obp_map map; | ||
158 | |||
159 | char _pad; | ||
160 | }; | ||
161 | |||
162 | struct jbusmc_dimm_group { | ||
163 | struct jbusmc *controller; | ||
164 | int index; | ||
165 | u64 base_addr; | ||
166 | u64 size; | ||
167 | }; | ||
168 | |||
169 | struct jbusmc { | ||
170 | void __iomem *regs; | ||
171 | u64 mc_reg_1; | ||
172 | u32 portid; | ||
173 | struct jbusmc_obp_mem_layout layout; | ||
174 | int layout_len; | ||
175 | int num_dimm_groups; | ||
176 | struct jbusmc_dimm_group dimm_groups[JB_NUM_DIMM_GROUPS]; | ||
177 | struct list_head list; | ||
178 | }; | ||
179 | |||
180 | static DEFINE_SPINLOCK(mctrl_list_lock); | ||
99 | static LIST_HEAD(mctrl_list); | 181 | static LIST_HEAD(mctrl_list); |
100 | 182 | ||
183 | static void mc_list_add(struct list_head *list) | ||
184 | { | ||
185 | spin_lock(&mctrl_list_lock); | ||
186 | list_add(list, &mctrl_list); | ||
187 | spin_unlock(&mctrl_list_lock); | ||
188 | } | ||
189 | |||
190 | static void mc_list_del(struct list_head *list) | ||
191 | { | ||
192 | spin_lock(&mctrl_list_lock); | ||
193 | list_del_init(list); | ||
194 | spin_unlock(&mctrl_list_lock); | ||
195 | } | ||
196 | |||
197 | #define SYNDROME_MIN -1 | ||
198 | #define SYNDROME_MAX 144 | ||
199 | |||
200 | /* Covert syndrome code into the way the bits are positioned | ||
201 | * on the bus. | ||
202 | */ | ||
203 | static int syndrome_to_qword_code(int syndrome_code) | ||
204 | { | ||
205 | if (syndrome_code < 128) | ||
206 | syndrome_code += 16; | ||
207 | else if (syndrome_code < 128 + 9) | ||
208 | syndrome_code -= (128 - 7); | ||
209 | else if (syndrome_code < (128 + 9 + 3)) | ||
210 | syndrome_code -= (128 + 9 - 4); | ||
211 | else | ||
212 | syndrome_code -= (128 + 9 + 3); | ||
213 | return syndrome_code; | ||
214 | } | ||
215 | |||
216 | /* All this magic has to do with how a cache line comes over the wire | ||
217 | * on Safari and JBUS. A 64-bit line comes over in 1 or more quadword | ||
218 | * cycles, each of which transmit ECC/MTAG info as well as the actual | ||
219 | * data. | ||
220 | */ | ||
221 | #define L2_LINE_SIZE 64 | ||
222 | #define L2_LINE_ADDR_MSK (L2_LINE_SIZE - 1) | ||
223 | #define QW_PER_LINE 4 | ||
224 | #define QW_BYTES (L2_LINE_SIZE / QW_PER_LINE) | ||
225 | #define QW_BITS 144 | ||
226 | #define SAFARI_LAST_BIT (576 - 1) | ||
227 | #define JBUS_LAST_BIT (144 - 1) | ||
228 | |||
229 | static void get_pin_and_dimm_str(int syndrome_code, unsigned long paddr, | ||
230 | int *pin_p, char **dimm_str_p, void *_prop, | ||
231 | int base_dimm_offset) | ||
232 | { | ||
233 | int qword_code = syndrome_to_qword_code(syndrome_code); | ||
234 | int cache_line_offset; | ||
235 | int offset_inverse; | ||
236 | int dimm_map_index; | ||
237 | int map_val; | ||
238 | |||
239 | if (mc_type == MC_TYPE_JBUS) { | ||
240 | struct jbusmc_obp_mem_layout *p = _prop; | ||
241 | |||
242 | /* JBUS */ | ||
243 | cache_line_offset = qword_code; | ||
244 | offset_inverse = (JBUS_LAST_BIT - cache_line_offset); | ||
245 | dimm_map_index = offset_inverse / 8; | ||
246 | map_val = p->map.dimm_map[dimm_map_index]; | ||
247 | map_val = ((map_val >> ((7 - (offset_inverse & 7)))) & 1); | ||
248 | *dimm_str_p = p->dimm_labels[base_dimm_offset + map_val]; | ||
249 | *pin_p = p->map.pin_map[cache_line_offset]; | ||
250 | } else { | ||
251 | struct chmc_obp_mem_layout *p = _prop; | ||
252 | struct chmc_obp_map *mp; | ||
253 | int qword; | ||
254 | |||
255 | /* Safari */ | ||
256 | if (p->symmetric) | ||
257 | mp = &p->map[0]; | ||
258 | else | ||
259 | mp = &p->map[1]; | ||
260 | |||
261 | qword = (paddr & L2_LINE_ADDR_MSK) / QW_BYTES; | ||
262 | cache_line_offset = ((3 - qword) * QW_BITS) + qword_code; | ||
263 | offset_inverse = (SAFARI_LAST_BIT - cache_line_offset); | ||
264 | dimm_map_index = offset_inverse >> 2; | ||
265 | map_val = mp->dimm_map[dimm_map_index]; | ||
266 | map_val = ((map_val >> ((3 - (offset_inverse & 3)) << 1)) & 0x3); | ||
267 | *dimm_str_p = p->dimm_labels[base_dimm_offset + map_val]; | ||
268 | *pin_p = mp->pin_map[cache_line_offset]; | ||
269 | } | ||
270 | } | ||
271 | |||
272 | static struct jbusmc_dimm_group *jbusmc_find_dimm_group(unsigned long phys_addr) | ||
273 | { | ||
274 | struct jbusmc *p; | ||
275 | |||
276 | list_for_each_entry(p, &mctrl_list, list) { | ||
277 | int i; | ||
278 | |||
279 | for (i = 0; i < p->num_dimm_groups; i++) { | ||
280 | struct jbusmc_dimm_group *dp = &p->dimm_groups[i]; | ||
281 | |||
282 | if (phys_addr < dp->base_addr || | ||
283 | (dp->base_addr + dp->size) <= phys_addr) | ||
284 | continue; | ||
285 | |||
286 | return dp; | ||
287 | } | ||
288 | } | ||
289 | return NULL; | ||
290 | } | ||
291 | |||
292 | static int jbusmc_print_dimm(int syndrome_code, | ||
293 | unsigned long phys_addr, | ||
294 | char *buf, int buflen) | ||
295 | { | ||
296 | struct jbusmc_obp_mem_layout *prop; | ||
297 | struct jbusmc_dimm_group *dp; | ||
298 | struct jbusmc *p; | ||
299 | int first_dimm; | ||
300 | |||
301 | dp = jbusmc_find_dimm_group(phys_addr); | ||
302 | if (dp == NULL || | ||
303 | syndrome_code < SYNDROME_MIN || | ||
304 | syndrome_code > SYNDROME_MAX) { | ||
305 | buf[0] = '?'; | ||
306 | buf[1] = '?'; | ||
307 | buf[2] = '?'; | ||
308 | buf[3] = '\0'; | ||
309 | } | ||
310 | p = dp->controller; | ||
311 | prop = &p->layout; | ||
312 | |||
313 | first_dimm = dp->index * JB_NUM_DIMMS_PER_GROUP; | ||
314 | |||
315 | if (syndrome_code != SYNDROME_MIN) { | ||
316 | char *dimm_str; | ||
317 | int pin; | ||
318 | |||
319 | get_pin_and_dimm_str(syndrome_code, phys_addr, &pin, | ||
320 | &dimm_str, prop, first_dimm); | ||
321 | sprintf(buf, "%s, pin %3d", dimm_str, pin); | ||
322 | } else { | ||
323 | int dimm; | ||
324 | |||
325 | /* Multi-bit error, we just dump out all the | ||
326 | * dimm labels associated with this dimm group. | ||
327 | */ | ||
328 | for (dimm = 0; dimm < JB_NUM_DIMMS_PER_GROUP; dimm++) { | ||
329 | sprintf(buf, "%s ", | ||
330 | prop->dimm_labels[first_dimm + dimm]); | ||
331 | buf += strlen(buf); | ||
332 | } | ||
333 | } | ||
334 | |||
335 | return 0; | ||
336 | } | ||
337 | |||
338 | static u64 __devinit jbusmc_dimm_group_size(u64 base, | ||
339 | const struct linux_prom64_registers *mem_regs, | ||
340 | int num_mem_regs) | ||
341 | { | ||
342 | u64 max = base + (8UL * 1024 * 1024 * 1024); | ||
343 | u64 max_seen = base; | ||
344 | int i; | ||
345 | |||
346 | for (i = 0; i < num_mem_regs; i++) { | ||
347 | const struct linux_prom64_registers *ent; | ||
348 | u64 this_base; | ||
349 | u64 this_end; | ||
350 | |||
351 | ent = &mem_regs[i]; | ||
352 | this_base = ent->phys_addr; | ||
353 | this_end = this_base + ent->reg_size; | ||
354 | if (base < this_base || base >= this_end) | ||
355 | continue; | ||
356 | if (this_end > max) | ||
357 | this_end = max; | ||
358 | if (this_end > max_seen) | ||
359 | max_seen = this_end; | ||
360 | } | ||
361 | |||
362 | return max_seen - base; | ||
363 | } | ||
364 | |||
365 | static void __devinit jbusmc_construct_one_dimm_group(struct jbusmc *p, | ||
366 | unsigned long index, | ||
367 | const struct linux_prom64_registers *mem_regs, | ||
368 | int num_mem_regs) | ||
369 | { | ||
370 | struct jbusmc_dimm_group *dp = &p->dimm_groups[index]; | ||
371 | |||
372 | dp->controller = p; | ||
373 | dp->index = index; | ||
374 | |||
375 | dp->base_addr = (p->portid * (64UL * 1024 * 1024 * 1024)); | ||
376 | dp->base_addr += (index * (8UL * 1024 * 1024 * 1024)); | ||
377 | dp->size = jbusmc_dimm_group_size(dp->base_addr, mem_regs, num_mem_regs); | ||
378 | } | ||
379 | |||
380 | static void __devinit jbusmc_construct_dimm_groups(struct jbusmc *p, | ||
381 | const struct linux_prom64_registers *mem_regs, | ||
382 | int num_mem_regs) | ||
383 | { | ||
384 | if (p->mc_reg_1 & JB_MC_REG1_DIMM1_BANK0) { | ||
385 | jbusmc_construct_one_dimm_group(p, 0, mem_regs, num_mem_regs); | ||
386 | p->num_dimm_groups++; | ||
387 | } | ||
388 | if (p->mc_reg_1 & JB_MC_REG1_DIMM2_BANK2) { | ||
389 | jbusmc_construct_one_dimm_group(p, 1, mem_regs, num_mem_regs); | ||
390 | p->num_dimm_groups++; | ||
391 | } | ||
392 | } | ||
393 | |||
394 | static int __devinit jbusmc_probe(struct of_device *op, | ||
395 | const struct of_device_id *match) | ||
396 | { | ||
397 | const struct linux_prom64_registers *mem_regs; | ||
398 | struct device_node *mem_node; | ||
399 | int err, len, num_mem_regs; | ||
400 | struct jbusmc *p; | ||
401 | const u32 *prop; | ||
402 | const void *ml; | ||
403 | |||
404 | err = -ENODEV; | ||
405 | mem_node = of_find_node_by_path("/memory"); | ||
406 | if (!mem_node) { | ||
407 | printk(KERN_ERR PFX "Cannot find /memory node.\n"); | ||
408 | goto out; | ||
409 | } | ||
410 | mem_regs = of_get_property(mem_node, "reg", &len); | ||
411 | if (!mem_regs) { | ||
412 | printk(KERN_ERR PFX "Cannot get reg property of /memory node.\n"); | ||
413 | goto out; | ||
414 | } | ||
415 | num_mem_regs = len / sizeof(*mem_regs); | ||
416 | |||
417 | err = -ENOMEM; | ||
418 | p = kzalloc(sizeof(*p), GFP_KERNEL); | ||
419 | if (!p) { | ||
420 | printk(KERN_ERR PFX "Cannot allocate struct jbusmc.\n"); | ||
421 | goto out; | ||
422 | } | ||
423 | |||
424 | INIT_LIST_HEAD(&p->list); | ||
425 | |||
426 | err = -ENODEV; | ||
427 | prop = of_get_property(op->node, "portid", &len); | ||
428 | if (!prop || len != 4) { | ||
429 | printk(KERN_ERR PFX "Cannot find portid.\n"); | ||
430 | goto out_free; | ||
431 | } | ||
432 | |||
433 | p->portid = *prop; | ||
434 | |||
435 | prop = of_get_property(op->node, "memory-control-register-1", &len); | ||
436 | if (!prop || len != 8) { | ||
437 | printk(KERN_ERR PFX "Cannot get memory control register 1.\n"); | ||
438 | goto out_free; | ||
439 | } | ||
440 | |||
441 | p->mc_reg_1 = ((u64)prop[0] << 32) | (u64) prop[1]; | ||
442 | |||
443 | err = -ENOMEM; | ||
444 | p->regs = of_ioremap(&op->resource[0], 0, JBUSMC_REGS_SIZE, "jbusmc"); | ||
445 | if (!p->regs) { | ||
446 | printk(KERN_ERR PFX "Cannot map jbusmc regs.\n"); | ||
447 | goto out_free; | ||
448 | } | ||
449 | |||
450 | err = -ENODEV; | ||
451 | ml = of_get_property(op->node, "memory-layout", &p->layout_len); | ||
452 | if (!ml) { | ||
453 | printk(KERN_ERR PFX "Cannot get memory layout property.\n"); | ||
454 | goto out_iounmap; | ||
455 | } | ||
456 | if (p->layout_len > sizeof(p->layout)) { | ||
457 | printk(KERN_ERR PFX "Unexpected memory-layout size %d\n", | ||
458 | p->layout_len); | ||
459 | goto out_iounmap; | ||
460 | } | ||
461 | memcpy(&p->layout, ml, p->layout_len); | ||
462 | |||
463 | jbusmc_construct_dimm_groups(p, mem_regs, num_mem_regs); | ||
464 | |||
465 | mc_list_add(&p->list); | ||
466 | |||
467 | printk(KERN_INFO PFX "UltraSPARC-IIIi memory controller at %s\n", | ||
468 | op->node->full_name); | ||
469 | |||
470 | dev_set_drvdata(&op->dev, p); | ||
471 | |||
472 | err = 0; | ||
473 | |||
474 | out: | ||
475 | return err; | ||
476 | |||
477 | out_iounmap: | ||
478 | of_iounmap(&op->resource[0], p->regs, JBUSMC_REGS_SIZE); | ||
479 | |||
480 | out_free: | ||
481 | kfree(p); | ||
482 | goto out; | ||
483 | } | ||
484 | |||
101 | /* Does BANK decode PHYS_ADDR? */ | 485 | /* Does BANK decode PHYS_ADDR? */ |
102 | static int chmc_bank_match(struct chmc_bank_info *bp, unsigned long phys_addr) | 486 | static int chmc_bank_match(struct chmc_bank_info *bp, unsigned long phys_addr) |
103 | { | 487 | { |
@@ -133,17 +517,11 @@ static int chmc_bank_match(struct chmc_bank_info *bp, unsigned long phys_addr) | |||
133 | /* Given PHYS_ADDR, search memory controller banks for a match. */ | 517 | /* Given PHYS_ADDR, search memory controller banks for a match. */ |
134 | static struct chmc_bank_info *chmc_find_bank(unsigned long phys_addr) | 518 | static struct chmc_bank_info *chmc_find_bank(unsigned long phys_addr) |
135 | { | 519 | { |
136 | struct list_head *mctrl_head = &mctrl_list; | 520 | struct chmc *p; |
137 | struct list_head *mctrl_entry = mctrl_head->next; | ||
138 | 521 | ||
139 | for (;;) { | 522 | list_for_each_entry(p, &mctrl_list, list) { |
140 | struct chmc *p = list_entry(mctrl_entry, struct chmc, list); | ||
141 | int bank_no; | 523 | int bank_no; |
142 | 524 | ||
143 | if (mctrl_entry == mctrl_head) | ||
144 | break; | ||
145 | mctrl_entry = mctrl_entry->next; | ||
146 | |||
147 | for (bank_no = 0; bank_no < CHMCTRL_NBANKS; bank_no++) { | 525 | for (bank_no = 0; bank_no < CHMCTRL_NBANKS; bank_no++) { |
148 | struct chmc_bank_info *bp; | 526 | struct chmc_bank_info *bp; |
149 | 527 | ||
@@ -157,8 +535,6 @@ static struct chmc_bank_info *chmc_find_bank(unsigned long phys_addr) | |||
157 | } | 535 | } |
158 | 536 | ||
159 | /* This is the main purpose of this driver. */ | 537 | /* This is the main purpose of this driver. */ |
160 | #define SYNDROME_MIN -1 | ||
161 | #define SYNDROME_MAX 144 | ||
162 | static int chmc_print_dimm(int syndrome_code, | 538 | static int chmc_print_dimm(int syndrome_code, |
163 | unsigned long phys_addr, | 539 | unsigned long phys_addr, |
164 | char *buf, int buflen) | 540 | char *buf, int buflen) |
@@ -184,54 +560,12 @@ static int chmc_print_dimm(int syndrome_code, | |||
184 | first_dimm *= CHMCTRL_NDIMMS; | 560 | first_dimm *= CHMCTRL_NDIMMS; |
185 | 561 | ||
186 | if (syndrome_code != SYNDROME_MIN) { | 562 | if (syndrome_code != SYNDROME_MIN) { |
187 | struct chmc_obp_map *map; | 563 | char *dimm_str; |
188 | int qword, where_in_line, where, map_index, map_offset; | 564 | int pin; |
189 | unsigned int map_val; | ||
190 | |||
191 | /* Yaay, single bit error so we can figure out | ||
192 | * the exact dimm. | ||
193 | */ | ||
194 | if (prop->symmetric) | ||
195 | map = &prop->map[0]; | ||
196 | else | ||
197 | map = &prop->map[1]; | ||
198 | |||
199 | /* Covert syndrome code into the way the bits are | ||
200 | * positioned on the bus. | ||
201 | */ | ||
202 | if (syndrome_code < 144 - 16) | ||
203 | syndrome_code += 16; | ||
204 | else if (syndrome_code < 144) | ||
205 | syndrome_code -= (144 - 7); | ||
206 | else if (syndrome_code < (144 + 3)) | ||
207 | syndrome_code -= (144 + 3 - 4); | ||
208 | else | ||
209 | syndrome_code -= 144 + 3; | ||
210 | 565 | ||
211 | /* All this magic has to do with how a cache line | 566 | get_pin_and_dimm_str(syndrome_code, phys_addr, &pin, |
212 | * comes over the wire on Safari. A 64-bit line | 567 | &dimm_str, prop, first_dimm); |
213 | * comes over in 4 quadword cycles, each of which | 568 | sprintf(buf, "%s, pin %3d", dimm_str, pin); |
214 | * transmit ECC/MTAG info as well as the actual | ||
215 | * data. 144 bits per quadword, 576 total. | ||
216 | */ | ||
217 | #define LINE_SIZE 64 | ||
218 | #define LINE_ADDR_MSK (LINE_SIZE - 1) | ||
219 | #define QW_PER_LINE 4 | ||
220 | #define QW_BYTES (LINE_SIZE / QW_PER_LINE) | ||
221 | #define QW_BITS 144 | ||
222 | #define LAST_BIT (576 - 1) | ||
223 | |||
224 | qword = (phys_addr & LINE_ADDR_MSK) / QW_BYTES; | ||
225 | where_in_line = ((3 - qword) * QW_BITS) + syndrome_code; | ||
226 | where = (LAST_BIT - where_in_line); | ||
227 | map_index = where >> 2; | ||
228 | map_offset = where & 0x3; | ||
229 | map_val = map->dimm_map[map_index]; | ||
230 | map_val = ((map_val >> ((3 - map_offset) << 1)) & (2 - 1)); | ||
231 | |||
232 | sprintf(buf, "%s, pin %3d", | ||
233 | prop->dimm_labels[first_dimm + map_val], | ||
234 | map->pin_map[where_in_line]); | ||
235 | } else { | 569 | } else { |
236 | int dimm; | 570 | int dimm; |
237 | 571 | ||
@@ -412,9 +746,8 @@ static int __devinit chmc_probe(struct of_device *op, | |||
412 | 746 | ||
413 | chmc_fetch_decode_regs(p); | 747 | chmc_fetch_decode_regs(p); |
414 | 748 | ||
415 | list_add(&p->list, &mctrl_list); | 749 | mc_list_add(&p->list); |
416 | 750 | ||
417 | /* Report the device. */ | ||
418 | printk(KERN_INFO PFX "UltraSPARC-III memory controller at %s [%s]\n", | 751 | printk(KERN_INFO PFX "UltraSPARC-III memory controller at %s [%s]\n", |
419 | dp->full_name, | 752 | dp->full_name, |
420 | (p->layout_size ? "ACTIVE" : "INACTIVE")); | 753 | (p->layout_size ? "ACTIVE" : "INACTIVE")); |
@@ -431,63 +764,100 @@ out_free: | |||
431 | goto out; | 764 | goto out; |
432 | } | 765 | } |
433 | 766 | ||
434 | static int __devexit chmc_remove(struct of_device *op) | 767 | static int __devinit us3mc_probe(struct of_device *op, |
768 | const struct of_device_id *match) | ||
769 | { | ||
770 | if (mc_type == MC_TYPE_SAFARI) | ||
771 | return chmc_probe(op, match); | ||
772 | else if (mc_type == MC_TYPE_JBUS) | ||
773 | return jbusmc_probe(op, match); | ||
774 | return -ENODEV; | ||
775 | } | ||
776 | |||
777 | static void __devexit chmc_destroy(struct of_device *op, struct chmc *p) | ||
778 | { | ||
779 | list_del(&p->list); | ||
780 | of_iounmap(&op->resource[0], p->regs, 0x48); | ||
781 | kfree(p); | ||
782 | } | ||
783 | |||
784 | static void __devexit jbusmc_destroy(struct of_device *op, struct jbusmc *p) | ||
435 | { | 785 | { |
436 | struct chmc *p = dev_get_drvdata(&op->dev); | 786 | mc_list_del(&p->list); |
787 | of_iounmap(&op->resource[0], p->regs, JBUSMC_REGS_SIZE); | ||
788 | kfree(p); | ||
789 | } | ||
790 | |||
791 | static int __devexit us3mc_remove(struct of_device *op) | ||
792 | { | ||
793 | void *p = dev_get_drvdata(&op->dev); | ||
437 | 794 | ||
438 | if (p) { | 795 | if (p) { |
439 | list_del(&p->list); | 796 | if (mc_type == MC_TYPE_SAFARI) |
440 | of_iounmap(&op->resource[0], p->regs, 0x48); | 797 | chmc_destroy(op, p); |
441 | kfree(p); | 798 | else if (mc_type == MC_TYPE_JBUS) |
799 | jbusmc_destroy(op, p); | ||
442 | } | 800 | } |
443 | return 0; | 801 | return 0; |
444 | } | 802 | } |
445 | 803 | ||
446 | static struct of_device_id chmc_match[] = { | 804 | static struct of_device_id us3mc_match[] = { |
447 | { | 805 | { |
448 | .name = "memory-controller", | 806 | .name = "memory-controller", |
449 | }, | 807 | }, |
450 | {}, | 808 | {}, |
451 | }; | 809 | }; |
452 | MODULE_DEVICE_TABLE(of, chmc_match); | 810 | MODULE_DEVICE_TABLE(of, us3mc_match); |
453 | 811 | ||
454 | static struct of_platform_driver chmc_driver = { | 812 | static struct of_platform_driver us3mc_driver = { |
455 | .name = "chmc", | 813 | .name = "us3mc", |
456 | .match_table = chmc_match, | 814 | .match_table = us3mc_match, |
457 | .probe = chmc_probe, | 815 | .probe = us3mc_probe, |
458 | .remove = __devexit_p(chmc_remove), | 816 | .remove = __devexit_p(us3mc_remove), |
459 | }; | 817 | }; |
460 | 818 | ||
461 | static inline bool chmc_platform(void) | 819 | static inline bool us3mc_platform(void) |
462 | { | 820 | { |
463 | if (tlb_type == cheetah || tlb_type == cheetah_plus) | 821 | if (tlb_type == cheetah || tlb_type == cheetah_plus) |
464 | return true; | 822 | return true; |
465 | return false; | 823 | return false; |
466 | } | 824 | } |
467 | 825 | ||
468 | static int __init chmc_init(void) | 826 | static int __init us3mc_init(void) |
469 | { | 827 | { |
828 | unsigned long ver; | ||
470 | int ret; | 829 | int ret; |
471 | 830 | ||
472 | if (!chmc_platform()) | 831 | if (!us3mc_platform()) |
473 | return -ENODEV; | 832 | return -ENODEV; |
474 | 833 | ||
475 | ret = register_dimm_printer(chmc_print_dimm); | 834 | __asm__ ("rdpr %%ver, %0" : "=r" (ver)); |
835 | if ((ver >> 32UL) == __JALAPENO_ID || | ||
836 | (ver >> 32UL) == __SERRANO_ID) { | ||
837 | mc_type = MC_TYPE_JBUS; | ||
838 | us3mc_dimm_printer = jbusmc_print_dimm; | ||
839 | } else { | ||
840 | mc_type = MC_TYPE_SAFARI; | ||
841 | us3mc_dimm_printer = chmc_print_dimm; | ||
842 | } | ||
843 | |||
844 | ret = register_dimm_printer(us3mc_dimm_printer); | ||
845 | |||
476 | if (!ret) { | 846 | if (!ret) { |
477 | ret = of_register_driver(&chmc_driver, &of_bus_type); | 847 | ret = of_register_driver(&us3mc_driver, &of_bus_type); |
478 | if (ret) | 848 | if (ret) |
479 | unregister_dimm_printer(chmc_print_dimm); | 849 | unregister_dimm_printer(us3mc_dimm_printer); |
480 | } | 850 | } |
481 | return ret; | 851 | return ret; |
482 | } | 852 | } |
483 | 853 | ||
484 | static void __exit chmc_cleanup(void) | 854 | static void __exit us3mc_cleanup(void) |
485 | { | 855 | { |
486 | if (chmc_platform()) { | 856 | if (us3mc_platform()) { |
487 | unregister_dimm_printer(chmc_print_dimm); | 857 | unregister_dimm_printer(us3mc_dimm_printer); |
488 | of_unregister_driver(&chmc_driver); | 858 | of_unregister_driver(&us3mc_driver); |
489 | } | 859 | } |
490 | } | 860 | } |
491 | 861 | ||
492 | module_init(chmc_init); | 862 | module_init(us3mc_init); |
493 | module_exit(chmc_cleanup); | 863 | module_exit(us3mc_cleanup); |