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authorJuergen Beisert <j.beisert@pengutronix.de>2008-07-05 04:03:00 -0400
committerRobert Schwebel <r.schwebel@pengutronix.de>2008-07-05 04:03:00 -0400
commit80eedae6f0322dafc749140b67986b2472473745 (patch)
tree23c6782e6387b01303855ea2febc819145fca798
parentc46f5856517c2d4f438df87dac81f2295931ee93 (diff)
i.MX27: Add ADS platform support
This patch adds basic support for the Freescale MX27ADS reference board. Currently only a serial console can be used. Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
Diffstat
-rw-r--r--arch/arm/configs/imx27ads_defconfig826
-rw-r--r--arch/arm/mach-mx2/Kconfig7
-rw-r--r--arch/arm/mach-mx2/Makefile2
-rw-r--r--arch/arm/mach-mx2/mx27ads.c304
-rw-r--r--include/asm-arm/arch-mxc/board-mx27ads.h354
-rw-r--r--include/asm-arm/arch-mxc/debug-macro.S4
6 files changed, 1496 insertions, 1 deletions
diff --git a/arch/arm/configs/imx27ads_defconfig b/arch/arm/configs/imx27ads_defconfig
new file mode 100644
index 00000000000..bcd95b8dd2d
--- /dev/null
+++ b/arch/arm/configs/imx27ads_defconfig
@@ -0,0 +1,826 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.26-rc6
4# Fri Jun 20 16:29:34 2008
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_CLOCKEVENTS=y
11CONFIG_MMU=y
12# CONFIG_NO_IOPORT is not set
13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_LOCKDEP_SUPPORT=y
16CONFIG_TRACE_IRQFLAGS_SUPPORT=y
17CONFIG_HARDIRQS_SW_RESEND=y
18CONFIG_GENERIC_IRQ_PROBE=y
19CONFIG_RWSEM_GENERIC_SPINLOCK=y
20# CONFIG_ARCH_HAS_ILOG2_U32 is not set
21# CONFIG_ARCH_HAS_ILOG2_U64 is not set
22CONFIG_GENERIC_HWEIGHT=y
23CONFIG_GENERIC_CALIBRATE_DELAY=y
24CONFIG_ARCH_SUPPORTS_AOUT=y
25CONFIG_ZONE_DMA=y
26CONFIG_ARCH_MTD_XIP=y
27CONFIG_VECTORS_BASE=0xffff0000
28CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
29
30#
31# General setup
32#
33CONFIG_EXPERIMENTAL=y
34CONFIG_BROKEN_ON_SMP=y
35CONFIG_LOCK_KERNEL=y
36CONFIG_INIT_ENV_ARG_LIMIT=32
37CONFIG_LOCALVERSION=""
38CONFIG_LOCALVERSION_AUTO=y
39# CONFIG_SWAP is not set
40CONFIG_SYSVIPC=y
41CONFIG_SYSVIPC_SYSCTL=y
42CONFIG_POSIX_MQUEUE=y
43# CONFIG_BSD_PROCESS_ACCT is not set
44# CONFIG_TASKSTATS is not set
45# CONFIG_AUDIT is not set
46# CONFIG_IKCONFIG is not set
47CONFIG_LOG_BUF_SHIFT=14
48# CONFIG_CGROUPS is not set
49# CONFIG_GROUP_SCHED is not set
50CONFIG_SYSFS_DEPRECATED=y
51CONFIG_SYSFS_DEPRECATED_V2=y
52# CONFIG_RELAY is not set
53# CONFIG_NAMESPACES is not set
54# CONFIG_BLK_DEV_INITRD is not set
55# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
56CONFIG_SYSCTL=y
57CONFIG_EMBEDDED=y
58CONFIG_UID16=y
59CONFIG_SYSCTL_SYSCALL=y
60CONFIG_SYSCTL_SYSCALL_CHECK=y
61CONFIG_KALLSYMS=y
62CONFIG_KALLSYMS_EXTRA_PASS=y
63CONFIG_HOTPLUG=y
64CONFIG_PRINTK=y
65CONFIG_BUG=y
66CONFIG_ELF_CORE=y
67CONFIG_COMPAT_BRK=y
68CONFIG_BASE_FULL=y
69CONFIG_FUTEX=y
70CONFIG_ANON_INODES=y
71CONFIG_EPOLL=y
72CONFIG_SIGNALFD=y
73CONFIG_TIMERFD=y
74CONFIG_EVENTFD=y
75CONFIG_SHMEM=y
76CONFIG_VM_EVENT_COUNTERS=y
77CONFIG_SLAB=y
78# CONFIG_SLUB is not set
79# CONFIG_SLOB is not set
80# CONFIG_PROFILING is not set
81# CONFIG_MARKERS is not set
82CONFIG_HAVE_OPROFILE=y
83# CONFIG_KPROBES is not set
84CONFIG_HAVE_KPROBES=y
85CONFIG_HAVE_KRETPROBES=y
86# CONFIG_HAVE_DMA_ATTRS is not set
87CONFIG_PROC_PAGE_MONITOR=y
88CONFIG_SLABINFO=y
89CONFIG_RT_MUTEXES=y
90# CONFIG_TINY_SHMEM is not set
91CONFIG_BASE_SMALL=0
92CONFIG_MODULES=y
93# CONFIG_MODULE_FORCE_LOAD is not set
94CONFIG_MODULE_UNLOAD=y
95# CONFIG_MODULE_FORCE_UNLOAD is not set
96# CONFIG_MODVERSIONS is not set
97# CONFIG_MODULE_SRCVERSION_ALL is not set
98# CONFIG_KMOD is not set
99CONFIG_BLOCK=y
100# CONFIG_LBD is not set
101# CONFIG_BLK_DEV_IO_TRACE is not set
102# CONFIG_LSF is not set
103# CONFIG_BLK_DEV_BSG is not set
104
105#
106# IO Schedulers
107#
108CONFIG_IOSCHED_NOOP=y
109# CONFIG_IOSCHED_AS is not set
110# CONFIG_IOSCHED_DEADLINE is not set
111# CONFIG_IOSCHED_CFQ is not set
112# CONFIG_DEFAULT_AS is not set
113# CONFIG_DEFAULT_DEADLINE is not set
114# CONFIG_DEFAULT_CFQ is not set
115CONFIG_DEFAULT_NOOP=y
116CONFIG_DEFAULT_IOSCHED="noop"
117CONFIG_CLASSIC_RCU=y
118
119#
120# System Type
121#
122# CONFIG_ARCH_AAEC2000 is not set
123# CONFIG_ARCH_INTEGRATOR is not set
124# CONFIG_ARCH_REALVIEW is not set
125# CONFIG_ARCH_VERSATILE is not set
126# CONFIG_ARCH_AT91 is not set
127# CONFIG_ARCH_CLPS7500 is not set
128# CONFIG_ARCH_CLPS711X is not set
129# CONFIG_ARCH_CO285 is not set
130# CONFIG_ARCH_EBSA110 is not set
131# CONFIG_ARCH_EP93XX is not set
132# CONFIG_ARCH_FOOTBRIDGE is not set
133# CONFIG_ARCH_NETX is not set
134# CONFIG_ARCH_H720X is not set
135# CONFIG_ARCH_IMX is not set
136# CONFIG_ARCH_IOP13XX is not set
137# CONFIG_ARCH_IOP32X is not set
138# CONFIG_ARCH_IOP33X is not set
139# CONFIG_ARCH_IXP23XX is not set
140# CONFIG_ARCH_IXP2000 is not set
141# CONFIG_ARCH_IXP4XX is not set
142# CONFIG_ARCH_L7200 is not set
143# CONFIG_ARCH_KS8695 is not set
144# CONFIG_ARCH_NS9XXX is not set
145CONFIG_ARCH_MXC=y
146# CONFIG_ARCH_ORION5X is not set
147# CONFIG_ARCH_PNX4008 is not set
148# CONFIG_ARCH_PXA is not set
149# CONFIG_ARCH_RPC is not set
150# CONFIG_ARCH_SA1100 is not set
151# CONFIG_ARCH_S3C2410 is not set
152# CONFIG_ARCH_SHARK is not set
153# CONFIG_ARCH_LH7A40X is not set
154# CONFIG_ARCH_DAVINCI is not set
155# CONFIG_ARCH_OMAP is not set
156# CONFIG_ARCH_MSM7X00A is not set
157
158#
159# Boot options
160#
161
162#
163# Power management
164#
165
166#
167# Freescale MXC Implementations
168#
169CONFIG_ARCH_MX2=y
170# CONFIG_ARCH_MX3 is not set
171
172#
173# MX2 family CPU support
174#
175CONFIG_MACH_MX27=y
176
177#
178# MX2 Platforms
179#
180CONFIG_MACH_MX27ADS=y
181# CONFIG_MACH_PCM038 is not set
182
183#
184# Processor Type
185#
186CONFIG_CPU_32=y
187CONFIG_CPU_ARM926T=y
188CONFIG_CPU_32v5=y
189CONFIG_CPU_ABRT_EV5TJ=y
190CONFIG_CPU_PABRT_NOIFAR=y
191CONFIG_CPU_CACHE_VIVT=y
192CONFIG_CPU_COPY_V4WB=y
193CONFIG_CPU_TLB_V4WBI=y
194CONFIG_CPU_CP15=y
195CONFIG_CPU_CP15_MMU=y
196
197#
198# Processor Features
199#
200CONFIG_ARM_THUMB=y
201# CONFIG_CPU_ICACHE_DISABLE is not set
202# CONFIG_CPU_DCACHE_DISABLE is not set
203# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
204# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
205# CONFIG_OUTER_CACHE is not set
206
207#
208# Bus support
209#
210# CONFIG_PCI_SYSCALL is not set
211# CONFIG_ARCH_SUPPORTS_MSI is not set
212# CONFIG_PCCARD is not set
213
214#
215# Kernel Features
216#
217CONFIG_TICK_ONESHOT=y
218CONFIG_NO_HZ=y
219CONFIG_HIGH_RES_TIMERS=y
220CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
221CONFIG_PREEMPT=y
222CONFIG_HZ=100
223CONFIG_AEABI=y
224# CONFIG_OABI_COMPAT is not set
225# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
226CONFIG_SELECT_MEMORY_MODEL=y
227CONFIG_FLATMEM_MANUAL=y
228# CONFIG_DISCONTIGMEM_MANUAL is not set
229# CONFIG_SPARSEMEM_MANUAL is not set
230CONFIG_FLATMEM=y
231CONFIG_FLAT_NODE_MEM_MAP=y
232# CONFIG_SPARSEMEM_STATIC is not set
233# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
234CONFIG_PAGEFLAGS_EXTENDED=y
235CONFIG_SPLIT_PTLOCK_CPUS=4096
236# CONFIG_RESOURCES_64BIT is not set
237CONFIG_ZONE_DMA_FLAG=1
238CONFIG_BOUNCE=y
239CONFIG_VIRT_TO_BUS=y
240CONFIG_ALIGNMENT_TRAP=y
241
242#
243# Boot options
244#
245CONFIG_ZBOOT_ROM_TEXT=0x0
246CONFIG_ZBOOT_ROM_BSS=0x0
247CONFIG_CMDLINE=""
248# CONFIG_XIP_KERNEL is not set
249# CONFIG_KEXEC is not set
250
251#
252# Floating point emulation
253#
254
255#
256# At least one emulation must be selected
257#
258# CONFIG_VFP is not set
259
260#
261# Userspace binary formats
262#
263CONFIG_BINFMT_ELF=y
264# CONFIG_BINFMT_AOUT is not set
265# CONFIG_BINFMT_MISC is not set
266
267#
268# Power management options
269#
270# CONFIG_PM is not set
271CONFIG_ARCH_SUSPEND_POSSIBLE=y
272
273#
274# Networking
275#
276CONFIG_NET=y
277
278#
279# Networking options
280#
281CONFIG_PACKET=y
282CONFIG_PACKET_MMAP=y
283CONFIG_UNIX=y
284# CONFIG_NET_KEY is not set
285CONFIG_INET=y
286CONFIG_IP_MULTICAST=y
287# CONFIG_IP_ADVANCED_ROUTER is not set
288CONFIG_IP_FIB_HASH=y
289CONFIG_IP_PNP=y
290# CONFIG_IP_PNP_DHCP is not set
291# CONFIG_IP_PNP_BOOTP is not set
292# CONFIG_IP_PNP_RARP is not set
293# CONFIG_NET_IPIP is not set
294# CONFIG_NET_IPGRE is not set
295# CONFIG_IP_MROUTE is not set
296# CONFIG_ARPD is not set
297# CONFIG_SYN_COOKIES is not set
298# CONFIG_INET_AH is not set
299# CONFIG_INET_ESP is not set
300# CONFIG_INET_IPCOMP is not set
301# CONFIG_INET_XFRM_TUNNEL is not set
302# CONFIG_INET_TUNNEL is not set
303# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
304# CONFIG_INET_XFRM_MODE_TUNNEL is not set
305# CONFIG_INET_XFRM_MODE_BEET is not set
306# CONFIG_INET_LRO is not set
307# CONFIG_INET_DIAG is not set
308# CONFIG_TCP_CONG_ADVANCED is not set
309CONFIG_TCP_CONG_CUBIC=y
310CONFIG_DEFAULT_TCP_CONG="cubic"
311# CONFIG_TCP_MD5SIG is not set
312# CONFIG_IPV6 is not set
313# CONFIG_NETWORK_SECMARK is not set
314# CONFIG_NETFILTER is not set
315# CONFIG_IP_DCCP is not set
316# CONFIG_IP_SCTP is not set
317# CONFIG_TIPC is not set
318# CONFIG_ATM is not set
319# CONFIG_BRIDGE is not set
320# CONFIG_VLAN_8021Q is not set
321# CONFIG_DECNET is not set
322# CONFIG_LLC2 is not set
323# CONFIG_IPX is not set
324# CONFIG_ATALK is not set
325# CONFIG_X25 is not set
326# CONFIG_LAPB is not set
327# CONFIG_ECONET is not set
328# CONFIG_WAN_ROUTER is not set
329# CONFIG_NET_SCHED is not set
330
331#
332# Network testing
333#
334# CONFIG_NET_PKTGEN is not set
335# CONFIG_HAMRADIO is not set
336# CONFIG_CAN is not set
337# CONFIG_IRDA is not set
338# CONFIG_BT is not set
339# CONFIG_AF_RXRPC is not set
340
341#
342# Wireless
343#
344# CONFIG_CFG80211 is not set
345# CONFIG_WIRELESS_EXT is not set
346# CONFIG_MAC80211 is not set
347# CONFIG_IEEE80211 is not set
348# CONFIG_RFKILL is not set
349# CONFIG_NET_9P is not set
350
351#
352# Device Drivers
353#
354
355#
356# Generic Driver Options
357#
358CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
359CONFIG_STANDALONE=y
360CONFIG_PREVENT_FIRMWARE_BUILD=y
361# CONFIG_FW_LOADER is not set
362# CONFIG_SYS_HYPERVISOR is not set
363# CONFIG_CONNECTOR is not set
364CONFIG_MTD=y
365# CONFIG_MTD_DEBUG is not set
366# CONFIG_MTD_CONCAT is not set
367CONFIG_MTD_PARTITIONS=y
368# CONFIG_MTD_REDBOOT_PARTS is not set
369CONFIG_MTD_CMDLINE_PARTS=y
370# CONFIG_MTD_AFS_PARTS is not set
371# CONFIG_MTD_AR7_PARTS is not set
372
373#
374# User Modules And Translation Layers
375#
376CONFIG_MTD_CHAR=y
377CONFIG_MTD_BLKDEVS=y
378CONFIG_MTD_BLOCK=y
379# CONFIG_FTL is not set
380# CONFIG_NFTL is not set
381# CONFIG_INFTL is not set
382# CONFIG_RFD_FTL is not set
383# CONFIG_SSFDC is not set
384# CONFIG_MTD_OOPS is not set
385
386#
387# RAM/ROM/Flash chip drivers
388#
389CONFIG_MTD_CFI=y
390# CONFIG_MTD_JEDECPROBE is not set
391CONFIG_MTD_GEN_PROBE=y
392CONFIG_MTD_CFI_ADV_OPTIONS=y
393CONFIG_MTD_CFI_NOSWAP=y
394# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
395# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
396CONFIG_MTD_CFI_GEOMETRY=y
397# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
398CONFIG_MTD_MAP_BANK_WIDTH_2=y
399# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
400# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
401# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
402# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
403CONFIG_MTD_CFI_I1=y
404# CONFIG_MTD_CFI_I2 is not set
405# CONFIG_MTD_CFI_I4 is not set
406# CONFIG_MTD_CFI_I8 is not set
407# CONFIG_MTD_OTP is not set
408CONFIG_MTD_CFI_INTELEXT=y
409# CONFIG_MTD_CFI_AMDSTD is not set
410# CONFIG_MTD_CFI_STAA is not set
411CONFIG_MTD_CFI_UTIL=y
412# CONFIG_MTD_RAM is not set
413# CONFIG_MTD_ROM is not set
414# CONFIG_MTD_ABSENT is not set
415# CONFIG_MTD_XIP is not set
416
417#
418# Mapping drivers for chip access
419#
420# CONFIG_MTD_COMPLEX_MAPPINGS is not set
421CONFIG_MTD_PHYSMAP=y
422CONFIG_MTD_PHYSMAP_START=0x00000000
423CONFIG_MTD_PHYSMAP_LEN=0x0
424CONFIG_MTD_PHYSMAP_BANKWIDTH=2
425# CONFIG_MTD_ARM_INTEGRATOR is not set
426# CONFIG_MTD_PLATRAM is not set
427
428#
429# Self-contained MTD device drivers
430#
431# CONFIG_MTD_SLRAM is not set
432# CONFIG_MTD_PHRAM is not set
433# CONFIG_MTD_MTDRAM is not set
434# CONFIG_MTD_BLOCK2MTD is not set
435
436#
437# Disk-On-Chip Device Drivers
438#
439# CONFIG_MTD_DOC2000 is not set
440# CONFIG_MTD_DOC2001 is not set
441# CONFIG_MTD_DOC2001PLUS is not set
442# CONFIG_MTD_NAND is not set
443# CONFIG_MTD_ONENAND is not set
444
445#
446# UBI - Unsorted block images
447#
448# CONFIG_MTD_UBI is not set
449# CONFIG_PARPORT is not set
450CONFIG_BLK_DEV=y
451# CONFIG_BLK_DEV_COW_COMMON is not set
452# CONFIG_BLK_DEV_LOOP is not set
453# CONFIG_BLK_DEV_NBD is not set
454# CONFIG_BLK_DEV_RAM is not set
455# CONFIG_CDROM_PKTCDVD is not set
456# CONFIG_ATA_OVER_ETH is not set
457# CONFIG_MISC_DEVICES is not set
458CONFIG_HAVE_IDE=y
459# CONFIG_IDE is not set
460
461#
462# SCSI device support
463#
464# CONFIG_RAID_ATTRS is not set
465# CONFIG_SCSI is not set
466# CONFIG_SCSI_DMA is not set
467# CONFIG_SCSI_NETLINK is not set
468# CONFIG_ATA is not set
469# CONFIG_MD is not set
470CONFIG_NETDEVICES=y
471# CONFIG_NETDEVICES_MULTIQUEUE is not set
472# CONFIG_DUMMY is not set
473# CONFIG_BONDING is not set
474# CONFIG_MACVLAN is not set
475# CONFIG_EQUALIZER is not set
476# CONFIG_TUN is not set
477# CONFIG_VETH is not set
478# CONFIG_PHYLIB is not set
479CONFIG_NET_ETHERNET=y
480# CONFIG_MII is not set
481# CONFIG_AX88796 is not set
482# CONFIG_SMC91X is not set
483# CONFIG_DM9000 is not set
484# CONFIG_IBM_NEW_EMAC_ZMII is not set
485# CONFIG_IBM_NEW_EMAC_RGMII is not set
486# CONFIG_IBM_NEW_EMAC_TAH is not set
487# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
488# CONFIG_B44 is not set
489# CONFIG_FEC_OLD is not set
490# CONFIG_NETDEV_1000 is not set
491# CONFIG_NETDEV_10000 is not set
492
493#
494# Wireless LAN
495#
496# CONFIG_WLAN_PRE80211 is not set
497# CONFIG_WLAN_80211 is not set
498# CONFIG_IWLWIFI_LEDS is not set
499# CONFIG_WAN is not set
500# CONFIG_PPP is not set
501# CONFIG_SLIP is not set
502# CONFIG_NETCONSOLE is not set
503# CONFIG_NETPOLL is not set
504# CONFIG_NET_POLL_CONTROLLER is not set
505# CONFIG_ISDN is not set
506
507#
508# Input device support
509#
510CONFIG_INPUT=y
511# CONFIG_INPUT_FF_MEMLESS is not set
512# CONFIG_INPUT_POLLDEV is not set
513
514#
515# Userland interfaces
516#
517# CONFIG_INPUT_MOUSEDEV is not set
518# CONFIG_INPUT_JOYDEV is not set
519CONFIG_INPUT_EVDEV=y
520# CONFIG_INPUT_EVBUG is not set
521
522#
523# Input Device Drivers
524#
525# CONFIG_INPUT_KEYBOARD is not set
526# CONFIG_INPUT_MOUSE is not set
527# CONFIG_INPUT_JOYSTICK is not set
528# CONFIG_INPUT_TABLET is not set
529CONFIG_INPUT_TOUCHSCREEN=y
530# CONFIG_TOUCHSCREEN_FUJITSU is not set
531# CONFIG_TOUCHSCREEN_GUNZE is not set
532# CONFIG_TOUCHSCREEN_ELO is not set
533# CONFIG_TOUCHSCREEN_MTOUCH is not set
534# CONFIG_TOUCHSCREEN_MK712 is not set
535# CONFIG_TOUCHSCREEN_PENMOUNT is not set
536# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
537# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
538# CONFIG_TOUCHSCREEN_UCB1400 is not set
539# CONFIG_INPUT_MISC is not set
540
541#
542# Hardware I/O ports
543#
544# CONFIG_SERIO is not set
545# CONFIG_GAMEPORT is not set
546
547#
548# Character devices
549#
550# CONFIG_VT is not set
551CONFIG_DEVKMEM=y
552# CONFIG_SERIAL_NONSTANDARD is not set
553
554#
555# Serial drivers
556#
557# CONFIG_SERIAL_8250 is not set
558
559#
560# Non-8250 serial port support
561#
562# CONFIG_SERIAL_IMX is not set
563CONFIG_UNIX98_PTYS=y
564# CONFIG_LEGACY_PTYS is not set
565# CONFIG_IPMI_HANDLER is not set
566# CONFIG_HW_RANDOM is not set
567# CONFIG_NVRAM is not set
568# CONFIG_R3964 is not set
569# CONFIG_RAW_DRIVER is not set
570# CONFIG_TCG_TPM is not set
571# CONFIG_I2C is not set
572# CONFIG_SPI is not set
573CONFIG_HAVE_GPIO_LIB=y
574
575#
576# GPIO Support
577#
578
579#
580# I2C GPIO expanders:
581#
582
583#
584# SPI GPIO expanders:
585#
586# CONFIG_W1 is not set
587# CONFIG_POWER_SUPPLY is not set
588# CONFIG_HWMON is not set
589# CONFIG_WATCHDOG is not set
590
591#
592# Sonics Silicon Backplane
593#
594CONFIG_SSB_POSSIBLE=y
595# CONFIG_SSB is not set
596
597#
598# Multifunction device drivers
599#
600# CONFIG_MFD_SM501 is not set
601# CONFIG_MFD_ASIC3 is not set
602# CONFIG_HTC_EGPIO is not set
603# CONFIG_HTC_PASIC3 is not set
604
605#
606# Multimedia devices
607#
608
609#
610# Multimedia core support
611#
612# CONFIG_VIDEO_DEV is not set
613# CONFIG_DVB_CORE is not set
614# CONFIG_VIDEO_MEDIA is not set
615
616#
617# Multimedia drivers
618#
619# CONFIG_DAB is not set
620
621#
622# Graphics support
623#
624# CONFIG_VGASTATE is not set
625# CONFIG_VIDEO_OUTPUT_CONTROL is not set
626# CONFIG_FB is not set
627# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
628
629#
630# Display device support
631#
632# CONFIG_DISPLAY_SUPPORT is not set
633
634#
635# Sound
636#
637# CONFIG_SOUND is not set
638# CONFIG_HID_SUPPORT is not set
639# CONFIG_USB_SUPPORT is not set
640# CONFIG_MMC is not set
641# CONFIG_NEW_LEDS is not set
642CONFIG_RTC_LIB=y
643# CONFIG_RTC_CLASS is not set
644# CONFIG_UIO is not set
645
646#
647# File systems
648#
649# CONFIG_EXT2_FS is not set
650# CONFIG_EXT3_FS is not set
651# CONFIG_EXT4DEV_FS is not set
652# CONFIG_REISERFS_FS is not set
653# CONFIG_JFS_FS is not set
654# CONFIG_FS_POSIX_ACL is not set
655# CONFIG_XFS_FS is not set
656# CONFIG_OCFS2_FS is not set
657# CONFIG_DNOTIFY is not set
658# CONFIG_INOTIFY is not set
659# CONFIG_QUOTA is not set
660# CONFIG_AUTOFS_FS is not set
661# CONFIG_AUTOFS4_FS is not set
662# CONFIG_FUSE_FS is not set
663
664#
665# CD-ROM/DVD Filesystems
666#
667# CONFIG_ISO9660_FS is not set
668# CONFIG_UDF_FS is not set
669
670#
671# DOS/FAT/NT Filesystems
672#
673# CONFIG_MSDOS_FS is not set
674# CONFIG_VFAT_FS is not set
675# CONFIG_NTFS_FS is not set
676
677#
678# Pseudo filesystems
679#
680CONFIG_PROC_FS=y
681CONFIG_PROC_SYSCTL=y
682CONFIG_SYSFS=y
683CONFIG_TMPFS=y
684# CONFIG_TMPFS_POSIX_ACL is not set
685# CONFIG_HUGETLB_PAGE is not set
686# CONFIG_CONFIGFS_FS is not set
687
688#
689# Miscellaneous filesystems
690#
691# CONFIG_ADFS_FS is not set
692# CONFIG_AFFS_FS is not set
693# CONFIG_HFS_FS is not set
694# CONFIG_HFSPLUS_FS is not set
695# CONFIG_BEFS_FS is not set
696# CONFIG_BFS_FS is not set
697# CONFIG_EFS_FS is not set
698CONFIG_JFFS2_FS=y
699CONFIG_JFFS2_FS_DEBUG=0
700CONFIG_JFFS2_FS_WRITEBUFFER=y
701# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
702# CONFIG_JFFS2_SUMMARY is not set
703# CONFIG_JFFS2_FS_XATTR is not set
704# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
705CONFIG_JFFS2_ZLIB=y
706# CONFIG_JFFS2_LZO is not set
707CONFIG_JFFS2_RTIME=y
708# CONFIG_JFFS2_RUBIN is not set
709# CONFIG_CRAMFS is not set
710# CONFIG_VXFS_FS is not set
711# CONFIG_MINIX_FS is not set
712# CONFIG_HPFS_FS is not set
713# CONFIG_QNX4FS_FS is not set
714# CONFIG_ROMFS_FS is not set
715# CONFIG_SYSV_FS is not set
716# CONFIG_UFS_FS is not set
717CONFIG_NETWORK_FILESYSTEMS=y
718CONFIG_NFS_FS=y
719CONFIG_NFS_V3=y
720# CONFIG_NFS_V3_ACL is not set
721# CONFIG_NFS_V4 is not set
722# CONFIG_NFSD is not set
723CONFIG_ROOT_NFS=y
724CONFIG_LOCKD=y
725CONFIG_LOCKD_V4=y
726CONFIG_NFS_COMMON=y
727CONFIG_SUNRPC=y
728# CONFIG_SUNRPC_BIND34 is not set
729# CONFIG_RPCSEC_GSS_KRB5 is not set
730# CONFIG_RPCSEC_GSS_SPKM3 is not set
731# CONFIG_SMB_FS is not set
732# CONFIG_CIFS is not set
733# CONFIG_NCP_FS is not set
734# CONFIG_CODA_FS is not set
735# CONFIG_AFS_FS is not set
736
737#
738# Partition Types
739#
740# CONFIG_PARTITION_ADVANCED is not set
741CONFIG_MSDOS_PARTITION=y
742CONFIG_NLS=y
743CONFIG_NLS_DEFAULT="iso8859-1"
744CONFIG_NLS_CODEPAGE_437=m
745# CONFIG_NLS_CODEPAGE_737 is not set
746# CONFIG_NLS_CODEPAGE_775 is not set
747CONFIG_NLS_CODEPAGE_850=m
748# CONFIG_NLS_CODEPAGE_852 is not set
749# CONFIG_NLS_CODEPAGE_855 is not set
750# CONFIG_NLS_CODEPAGE_857 is not set
751# CONFIG_NLS_CODEPAGE_860 is not set
752# CONFIG_NLS_CODEPAGE_861 is not set
753# CONFIG_NLS_CODEPAGE_862 is not set
754# CONFIG_NLS_CODEPAGE_863 is not set
755# CONFIG_NLS_CODEPAGE_864 is not set
756# CONFIG_NLS_CODEPAGE_865 is not set
757# CONFIG_NLS_CODEPAGE_866 is not set
758# CONFIG_NLS_CODEPAGE_869 is not set
759# CONFIG_NLS_CODEPAGE_936 is not set
760# CONFIG_NLS_CODEPAGE_950 is not set
761# CONFIG_NLS_CODEPAGE_932 is not set
762# CONFIG_NLS_CODEPAGE_949 is not set
763# CONFIG_NLS_CODEPAGE_874 is not set
764# CONFIG_NLS_ISO8859_8 is not set
765# CONFIG_NLS_CODEPAGE_1250 is not set
766# CONFIG_NLS_CODEPAGE_1251 is not set
767# CONFIG_NLS_ASCII is not set
768CONFIG_NLS_ISO8859_1=y
769# CONFIG_NLS_ISO8859_2 is not set
770# CONFIG_NLS_ISO8859_3 is not set
771# CONFIG_NLS_ISO8859_4 is not set
772# CONFIG_NLS_ISO8859_5 is not set
773# CONFIG_NLS_ISO8859_6 is not set
774# CONFIG_NLS_ISO8859_7 is not set
775# CONFIG_NLS_ISO8859_9 is not set
776# CONFIG_NLS_ISO8859_13 is not set
777# CONFIG_NLS_ISO8859_14 is not set
778CONFIG_NLS_ISO8859_15=m
779# CONFIG_NLS_KOI8_R is not set
780# CONFIG_NLS_KOI8_U is not set
781# CONFIG_NLS_UTF8 is not set
782# CONFIG_DLM is not set
783
784#
785# Kernel hacking
786#
787# CONFIG_PRINTK_TIME is not set
788CONFIG_ENABLE_WARN_DEPRECATED=y
789CONFIG_ENABLE_MUST_CHECK=y
790CONFIG_FRAME_WARN=1024
791# CONFIG_MAGIC_SYSRQ is not set
792# CONFIG_UNUSED_SYMBOLS is not set
793# CONFIG_DEBUG_FS is not set
794# CONFIG_HEADERS_CHECK is not set
795# CONFIG_DEBUG_KERNEL is not set
796# CONFIG_DEBUG_BUGVERBOSE is not set
797CONFIG_FRAME_POINTER=y
798# CONFIG_SAMPLES is not set
799# CONFIG_DEBUG_USER is not set
800
801#
802# Security options
803#
804# CONFIG_KEYS is not set
805# CONFIG_SECURITY is not set
806# CONFIG_SECURITY_FILE_CAPABILITIES is not set
807# CONFIG_CRYPTO is not set
808
809#
810# Library routines
811#
812CONFIG_BITREVERSE=y
813# CONFIG_GENERIC_FIND_FIRST_BIT is not set
814# CONFIG_GENERIC_FIND_NEXT_BIT is not set
815# CONFIG_CRC_CCITT is not set
816# CONFIG_CRC16 is not set
817# CONFIG_CRC_ITU_T is not set
818CONFIG_CRC32=y
819# CONFIG_CRC7 is not set
820# CONFIG_LIBCRC32C is not set
821CONFIG_ZLIB_INFLATE=y
822CONFIG_ZLIB_DEFLATE=y
823CONFIG_PLIST=y
824CONFIG_HAS_IOMEM=y
825CONFIG_HAS_IOPORT=y
826CONFIG_HAS_DMA=y
diff --git a/arch/arm/mach-mx2/Kconfig b/arch/arm/mach-mx2/Kconfig
index 6e7d724e323..6f98355d686 100644
--- a/arch/arm/mach-mx2/Kconfig
+++ b/arch/arm/mach-mx2/Kconfig
@@ -9,3 +9,10 @@ config MACH_MX27
9 9
10comment "MX2 Platforms" 10comment "MX2 Platforms"
11 depends on ARCH_MX2 11 depends on ARCH_MX2
12
13config MACH_MX27ADS
14 bool "MX27ADS platform"
15 depends on MACH_MX27
16 help
17 Include support for MX27ADS platform. This includes specific
18 configurations for the board and its peripherals.
diff --git a/arch/arm/mach-mx2/Makefile b/arch/arm/mach-mx2/Makefile
index 74fb9b3eb06..f6764eb6471 100644
--- a/arch/arm/mach-mx2/Makefile
+++ b/arch/arm/mach-mx2/Makefile
@@ -8,3 +8,5 @@ obj-y := system.o generic.o devices.o serial.o
8 8
9obj-$(CONFIG_MACH_MX27) += cpu_imx27.o 9obj-$(CONFIG_MACH_MX27) += cpu_imx27.o
10obj-$(CONFIG_MACH_MX27) += clock_imx27.o 10obj-$(CONFIG_MACH_MX27) += clock_imx27.o
11
12obj-$(CONFIG_MACH_MX27ADS) += mx27ads.o
diff --git a/arch/arm/mach-mx2/mx27ads.c b/arch/arm/mach-mx2/mx27ads.c
new file mode 100644
index 00000000000..a9ff01fff13
--- /dev/null
+++ b/arch/arm/mach-mx2/mx27ads.c
@@ -0,0 +1,304 @@
1/*
2 * Copyright (C) 2000 Deep Blue Solutions Ltd
3 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
4 * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#include <linux/platform_device.h>
22#include <linux/mtd/mtd.h>
23#include <linux/mtd/map.h>
24#include <linux/mtd/partitions.h>
25#include <linux/mtd/physmap.h>
26#include <asm/arch/common.h>
27#include <asm/hardware.h>
28#include <asm/mach-types.h>
29#include <asm/mach/arch.h>
30#include <asm/mach/time.h>
31#include <asm/mach/map.h>
32#include <asm/arch/gpio.h>
33#include <asm/arch/imx-uart.h>
34#include <asm/arch/iomux-mx1-mx2.h>
35#include <asm/arch/board-mx27ads.h>
36
37/* ADS's NOR flash */
38static struct physmap_flash_data mx27ads_flash_data = {
39 .width = 2,
40};
41
42static struct resource mx27ads_flash_resource = {
43 .start = 0xc0000000,
44 .end = 0xc0000000 + 0x02000000 - 1,
45 .flags = IORESOURCE_MEM,
46
47};
48
49static struct platform_device mx27ads_nor_mtd_device = {
50 .name = "physmap-flash",
51 .id = 0,
52 .dev = {
53 .platform_data = &mx27ads_flash_data,
54 },
55 .num_resources = 1,
56 .resource = &mx27ads_flash_resource,
57};
58
59static int mxc_uart0_pins[] = {
60 PE12_PF_UART1_TXD,
61 PE13_PF_UART1_RXD,
62 PE14_PF_UART1_CTS,
63 PE15_PF_UART1_RTS
64};
65
66static int uart_mxc_port0_init(struct platform_device *pdev)
67{
68 return mxc_gpio_setup_multiple_pins(mxc_uart0_pins,
69 ARRAY_SIZE(mxc_uart0_pins),
70 MXC_GPIO_ALLOC_MODE_NORMAL, "UART0");
71}
72
73static int uart_mxc_port0_exit(struct platform_device *pdev)
74{
75 return mxc_gpio_setup_multiple_pins(mxc_uart0_pins,
76 ARRAY_SIZE(mxc_uart0_pins),
77 MXC_GPIO_ALLOC_MODE_RELEASE, "UART0");
78}
79
80static int mxc_uart1_pins[] = {
81 PE3_PF_UART2_CTS,
82 PE4_PF_UART2_RTS,
83 PE6_PF_UART2_TXD,
84 PE7_PF_UART2_RXD
85};
86
87static int uart_mxc_port1_init(struct platform_device *pdev)
88{
89 return mxc_gpio_setup_multiple_pins(mxc_uart1_pins,
90 ARRAY_SIZE(mxc_uart1_pins),
91 MXC_GPIO_ALLOC_MODE_NORMAL, "UART1");
92}
93
94static int uart_mxc_port1_exit(struct platform_device *pdev)
95{
96 return mxc_gpio_setup_multiple_pins(mxc_uart1_pins,
97 ARRAY_SIZE(mxc_uart1_pins),
98 MXC_GPIO_ALLOC_MODE_RELEASE, "UART1");
99}
100
101static int mxc_uart2_pins[] = {
102 PE8_PF_UART3_TXD,
103 PE9_PF_UART3_RXD,
104 PE10_PF_UART3_CTS,
105 PE11_PF_UART3_RTS
106};
107
108static int uart_mxc_port2_init(struct platform_device *pdev)
109{
110 return mxc_gpio_setup_multiple_pins(mxc_uart2_pins,
111 ARRAY_SIZE(mxc_uart2_pins),
112 MXC_GPIO_ALLOC_MODE_NORMAL, "UART2");
113}
114
115static int uart_mxc_port2_exit(struct platform_device *pdev)
116{
117 return mxc_gpio_setup_multiple_pins(mxc_uart2_pins,
118 ARRAY_SIZE(mxc_uart2_pins),
119 MXC_GPIO_ALLOC_MODE_RELEASE, "UART2");
120}
121
122static int mxc_uart3_pins[] = {
123 PB26_AF_UART4_RTS,
124 PB28_AF_UART4_TXD,
125 PB29_AF_UART4_CTS,
126 PB31_AF_UART4_RXD
127};
128
129static int uart_mxc_port3_init(struct platform_device *pdev)
130{
131 return mxc_gpio_setup_multiple_pins(mxc_uart3_pins,
132 ARRAY_SIZE(mxc_uart3_pins),
133 MXC_GPIO_ALLOC_MODE_NORMAL, "UART3");
134}
135
136static int uart_mxc_port3_exit(struct platform_device *pdev)
137{
138 return mxc_gpio_setup_multiple_pins(mxc_uart3_pins,
139 ARRAY_SIZE(mxc_uart3_pins),
140 MXC_GPIO_ALLOC_MODE_RELEASE, "UART3");
141}
142
143static int mxc_uart4_pins[] = {
144 PB18_AF_UART5_TXD,
145 PB19_AF_UART5_RXD,
146 PB20_AF_UART5_CTS,
147 PB21_AF_UART5_RTS
148};
149
150static int uart_mxc_port4_init(struct platform_device *pdev)
151{
152 return mxc_gpio_setup_multiple_pins(mxc_uart4_pins,
153 ARRAY_SIZE(mxc_uart4_pins),
154 MXC_GPIO_ALLOC_MODE_NORMAL, "UART4");
155}
156
157static int uart_mxc_port4_exit(struct platform_device *pdev)
158{
159 return mxc_gpio_setup_multiple_pins(mxc_uart4_pins,
160 ARRAY_SIZE(mxc_uart4_pins),
161 MXC_GPIO_ALLOC_MODE_RELEASE, "UART4");
162}
163
164static int mxc_uart5_pins[] = {
165 PB10_AF_UART6_TXD,
166 PB12_AF_UART6_CTS,
167 PB11_AF_UART6_RXD,
168 PB13_AF_UART6_RTS
169};
170
171static int uart_mxc_port5_init(struct platform_device *pdev)
172{
173 return mxc_gpio_setup_multiple_pins(mxc_uart5_pins,
174 ARRAY_SIZE(mxc_uart5_pins),
175 MXC_GPIO_ALLOC_MODE_NORMAL, "UART5");
176}
177
178static int uart_mxc_port5_exit(struct platform_device *pdev)
179{
180 return mxc_gpio_setup_multiple_pins(mxc_uart5_pins,
181 ARRAY_SIZE(mxc_uart5_pins),
182 MXC_GPIO_ALLOC_MODE_RELEASE, "UART5");
183}
184
185static struct platform_device *platform_devices[] __initdata = {
186 &mx27ads_nor_mtd_device,
187};
188
189static int mxc_fec_pins[] = {
190 PD0_AIN_FEC_TXD0,
191 PD1_AIN_FEC_TXD1,
192 PD2_AIN_FEC_TXD2,
193 PD3_AIN_FEC_TXD3,
194 PD4_AOUT_FEC_RX_ER,
195 PD5_AOUT_FEC_RXD1,
196 PD6_AOUT_FEC_RXD2,
197 PD7_AOUT_FEC_RXD3,
198 PD8_AF_FEC_MDIO,
199 PD9_AIN_FEC_MDC,
200 PD10_AOUT_FEC_CRS,
201 PD11_AOUT_FEC_TX_CLK,
202 PD12_AOUT_FEC_RXD0,
203 PD13_AOUT_FEC_RX_DV,
204 PD14_AOUT_FEC_CLR,
205 PD15_AOUT_FEC_COL,
206 PD16_AIN_FEC_TX_ER,
207 PF23_AIN_FEC_TX_EN
208};
209
210static void gpio_fec_active(void)
211{
212 mxc_gpio_setup_multiple_pins(mxc_fec_pins,
213 ARRAY_SIZE(mxc_fec_pins),
214 MXC_GPIO_ALLOC_MODE_NORMAL, "FEC");
215}
216
217static void gpio_fec_inactive(void)
218{
219 mxc_gpio_setup_multiple_pins(mxc_fec_pins,
220 ARRAY_SIZE(mxc_fec_pins),
221 MXC_GPIO_ALLOC_MODE_RELEASE, "FEC");
222}
223
224static struct imxuart_platform_data uart_pdata[] = {
225 {
226 .init = uart_mxc_port0_init,
227 .exit = uart_mxc_port0_exit,
228 .flags = IMXUART_HAVE_RTSCTS,
229 }, {
230 .init = uart_mxc_port1_init,
231 .exit = uart_mxc_port1_exit,
232 .flags = IMXUART_HAVE_RTSCTS,
233 }, {
234 .init = uart_mxc_port2_init,
235 .exit = uart_mxc_port2_exit,
236 .flags = IMXUART_HAVE_RTSCTS,
237 }, {
238 .init = uart_mxc_port3_init,
239 .exit = uart_mxc_port3_exit,
240 .flags = IMXUART_HAVE_RTSCTS,
241 }, {
242 .init = uart_mxc_port4_init,
243 .exit = uart_mxc_port4_exit,
244 .flags = IMXUART_HAVE_RTSCTS,
245 }, {
246 .init = uart_mxc_port5_init,
247 .exit = uart_mxc_port5_exit,
248 .flags = IMXUART_HAVE_RTSCTS,
249 },
250};
251
252static void __init mx27ads_board_init(void)
253{
254 int i;
255
256 gpio_fec_active();
257
258 for (i = 0; i < 6; i++)
259 imx_init_uart(i, &uart_pdata[i]);
260
261 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
262}
263
264static void __init mx27ads_timer_init(void)
265{
266 unsigned long fref = 26000000;
267
268 if ((__raw_readw(PBC_VERSION_REG) & CKIH_27MHZ_BIT_SET) == 0)
269 fref = 27000000;
270
271 mxc_clocks_init(fref);
272 mxc_timer_init("gpt_clk.0");
273}
274
275struct sys_timer mx27ads_timer = {
276 .init = mx27ads_timer_init,
277};
278
279static struct map_desc mx27ads_io_desc[] __initdata = {
280 {
281 .virtual = PBC_BASE_ADDRESS,
282 .pfn = __phys_to_pfn(CS4_BASE_ADDR),
283 .length = SZ_1M,
284 .type = MT_DEVICE,
285 },
286};
287
288void __init mx27ads_map_io(void)
289{
290 mxc_map_io();
291 iotable_init(mx27ads_io_desc, ARRAY_SIZE(mx27ads_io_desc));
292}
293
294MACHINE_START(MX27ADS, "Freescale i.MX27ADS")
295 /* maintainer: Freescale Semiconductor, Inc. */
296 .phys_io = AIPI_BASE_ADDR,
297 .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
298 .boot_params = PHYS_OFFSET + 0x100,
299 .map_io = mx27ads_map_io,
300 .init_irq = mxc_init_irq,
301 .init_machine = mx27ads_board_init,
302 .timer = &mx27ads_timer,
303MACHINE_END
304
diff --git a/include/asm-arm/arch-mxc/board-mx27ads.h b/include/asm-arm/arch-mxc/board-mx27ads.h
new file mode 100644
index 00000000000..61e66dac90e
--- /dev/null
+++ b/include/asm-arm/arch-mxc/board-mx27ads.h
@@ -0,0 +1,354 @@
1/*
2 * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
3 */
4
5/*
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
9 *
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
12 */
13
14#ifndef __ASM_ARCH_MXC_BOARD_MX27ADS_H__
15#define __ASM_ARCH_MXC_BOARD_MX27ADS_H__
16
17/* external interrupt multiplexer */
18#define MXC_EXP_IO_BASE (MXC_GPIO_BASE + MXC_MAX_GPIO_LINES)
19
20#define MXC_VIRTUAL_INTS_BASE (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES)
21#define MXC_SDIO1_CARD_IRQ MXC_VIRTUAL_INTS_BASE
22#define MXC_SDIO2_CARD_IRQ (MXC_VIRTUAL_INTS_BASE + 1)
23#define MXC_SDIO3_CARD_IRQ (MXC_VIRTUAL_INTS_BASE + 2)
24
25#define MXC_MAX_BOARD_INTS (MXC_MAX_EXP_IO_LINES + \
26 MXC_MAX_VIRTUAL_INTS)
27
28/*
29 * MXC UART EVB board level configurations
30 */
31
32#define MXC_LL_EXTUART_PADDR (CS4_BASE_ADDR + 0x20000)
33#define MXC_LL_EXTUART_VADDR (CS4_BASE_ADDR_VIRT + 0x20000)
34#define MXC_LL_EXTUART_16BIT_BUS
35
36#define MXC_LL_UART_PADDR UART1_BASE_ADDR
37#define MXC_LL_UART_VADDR AIPI_IO_ADDRESS(UART1_BASE_ADDR)
38
39/*
40 * @name Memory Size parameters
41 */
42
43/*
44 * Size of SDRAM memory
45 */
46#define SDRAM_MEM_SIZE SZ_128M
47
48/*
49 * PBC Controller parameters
50 */
51
52/*
53 * Base address of PBC controller, CS4
54 */
55#define PBC_BASE_ADDRESS 0xEB000000
56#define PBC_REG_ADDR(offset) (PBC_BASE_ADDRESS + (offset))
57
58/*
59 * PBC Interupt name definitions
60 */
61#define PBC_GPIO1_0 0
62#define PBC_GPIO1_1 1
63#define PBC_GPIO1_2 2
64#define PBC_GPIO1_3 3
65#define PBC_GPIO1_4 4
66#define PBC_GPIO1_5 5
67
68#define PBC_INTR_MAX_NUM 6
69#define PBC_INTR_SHARED_MAX_NUM 8
70
71/* When the PBC address connection is fixed in h/w, defined as 1 */
72#define PBC_ADDR_SH 0
73
74/* Offsets for the PBC Controller register */
75/*
76 * PBC Board version register offset
77 */
78#define PBC_VERSION_REG PBC_REG_ADDR(0x00000 >> PBC_ADDR_SH)
79/*
80 * PBC Board control register 1 set address.
81 */
82#define PBC_BCTRL1_SET_REG PBC_REG_ADDR(0x00008 >> PBC_ADDR_SH)
83/*
84 * PBC Board control register 1 clear address.
85 */
86#define PBC_BCTRL1_CLEAR_REG PBC_REG_ADDR(0x0000C >> PBC_ADDR_SH)
87/*
88 * PBC Board control register 2 set address.
89 */
90#define PBC_BCTRL2_SET_REG PBC_REG_ADDR(0x00010 >> PBC_ADDR_SH)
91/*
92 * PBC Board control register 2 clear address.
93 */
94#define PBC_BCTRL2_CLEAR_REG PBC_REG_ADDR(0x00014 >> PBC_ADDR_SH)
95/*
96 * PBC Board control register 3 set address.
97 */
98#define PBC_BCTRL3_SET_REG PBC_REG_ADDR(0x00018 >> PBC_ADDR_SH)
99/*
100 * PBC Board control register 3 clear address.
101 */
102#define PBC_BCTRL3_CLEAR_REG PBC_REG_ADDR(0x0001C >> PBC_ADDR_SH)
103/*
104 * PBC Board control register 3 set address.
105 */
106#define PBC_BCTRL4_SET_REG PBC_REG_ADDR(0x00020 >> PBC_ADDR_SH)
107/*
108 * PBC Board control register 4 clear address.
109 */
110#define PBC_BCTRL4_CLEAR_REG PBC_REG_ADDR(0x00024 >> PBC_ADDR_SH)
111/*PBC_ADDR_SH
112 * PBC Board status register 1.
113 */
114#define PBC_BSTAT1_REG PBC_REG_ADDR(0x00028 >> PBC_ADDR_SH)
115/*
116 * PBC Board interrupt status register.
117 */
118#define PBC_INTSTATUS_REG PBC_REG_ADDR(0x0002C >> PBC_ADDR_SH)
119/*
120 * PBC Board interrupt current status register.
121 */
122#define PBC_INTCURR_STATUS_REG PBC_REG_ADDR(0x00034 >> PBC_ADDR_SH)
123/*
124 * PBC Interrupt mask register set address.
125 */
126#define PBC_INTMASK_SET_REG PBC_REG_ADDR(0x00038 >> PBC_ADDR_SH)
127/*
128 * PBC Interrupt mask register clear address.
129 */
130#define PBC_INTMASK_CLEAR_REG PBC_REG_ADDR(0x0003C >> PBC_ADDR_SH)
131/*
132 * External UART A.
133 */
134#define PBC_SC16C652_UARTA_REG PBC_REG_ADDR(0x20000 >> PBC_ADDR_SH)
135/*
136 * UART 4 Expanding Signal Status.
137 */
138#define PBC_UART_STATUS_REG PBC_REG_ADDR(0x22000 >> PBC_ADDR_SH)
139/*
140 * UART 4 Expanding Signal Control Set.
141 */
142#define PBC_UCTRL_SET_REG PBC_REG_ADDR(0x24000 >> PBC_ADDR_SH)
143/*
144 * UART 4 Expanding Signal Control Clear.
145 */
146#define PBC_UCTRL_CLR_REG PBC_REG_ADDR(0x26000 >> PBC_ADDR_SH)
147/*
148 * Ethernet Controller IO base address.
149 */
150#define PBC_CS8900A_IOBASE_REG PBC_REG_ADDR(0x40000 >> PBC_ADDR_SH)
151/*
152 * Ethernet Controller Memory base address.
153 */
154#define PBC_CS8900A_MEMBASE_REG PBC_REG_ADDR(0x42000 >> PBC_ADDR_SH)
155/*
156 * Ethernet Controller DMA base address.
157 */
158#define PBC_CS8900A_DMABASE_REG PBC_REG_ADDR(0x44000 >> PBC_ADDR_SH)
159
160/* PBC Board Version Register bit definition */
161#define PBC_VERSION_ADS 0x8000 /* Bit15=1 means version for ads */
162#define PBC_VERSION_EVB_REVB 0x4000 /* BIT14=1 means version for evb revb */
163
164/* PBC Board Control Register 1 bit definitions */
165#define PBC_BCTRL1_ERST 0x0001 /* Ethernet Reset */
166#define PBC_BCTRL1_URST 0x0002 /* Reset External UART controller */
167#define PBC_BCTRL1_FRST 0x0004 /* FEC Reset */
168#define PBC_BCTRL1_ESLEEP 0x0010 /* Enable ethernet Sleep */
169#define PBC_BCTRL1_LCDON 0x0800 /* Enable the LCD */
170
171/* PBC Board Control Register 2 bit definitions */
172#define PBC_BCTRL2_VCC_EN 0x0004 /* Enable VCC */
173#define PBC_BCTRL2_VPP_EN 0x0008 /* Enable Vpp */
174#define PBC_BCTRL2_ATAFEC_EN 0X0010
175#define PBC_BCTRL2_ATAFEC_SEL 0X0020
176#define PBC_BCTRL2_ATA_EN 0X0040
177#define PBC_BCTRL2_IRDA_SD 0X0080
178#define PBC_BCTRL2_IRDA_EN 0X0100
179#define PBC_BCTRL2_CCTL10 0X0200
180#define PBC_BCTRL2_CCTL11 0X0400
181
182/* PBC Board Control Register 3 bit definitions */
183#define PBC_BCTRL3_HSH_EN 0X0020
184#define PBC_BCTRL3_FSH_MOD 0X0040
185#define PBC_BCTRL3_OTG_HS_EN 0X0080
186#define PBC_BCTRL3_OTG_VBUS_EN 0X0100
187#define PBC_BCTRL3_FSH_VBUS_EN 0X0200
188#define PBC_BCTRL3_USB_OTG_ON 0X0800
189#define PBC_BCTRL3_USB_FSH_ON 0X1000
190
191/* PBC Board Control Register 4 bit definitions */
192#define PBC_BCTRL4_REGEN_SEL 0X0001
193#define PBC_BCTRL4_USER_OFF 0X0002
194#define PBC_BCTRL4_VIB_EN 0X0004
195#define PBC_BCTRL4_PWRGT1_EN 0X0008
196#define PBC_BCTRL4_PWRGT2_EN 0X0010
197#define PBC_BCTRL4_STDBY_PRI 0X0020
198
199#ifndef __ASSEMBLY__
200/*
201 * Enumerations for SD cards and memory stick card. This corresponds to
202 * the card EN bits in the IMR: SD1_EN | MS_EN | SD3_EN | SD2_EN.
203 */
204enum mxc_card_no {
205 MXC_CARD_SD2 = 0,
206 MXC_CARD_SD3,
207 MXC_CARD_MS,
208 MXC_CARD_SD1,
209 MXC_CARD_MIN = MXC_CARD_SD2,
210 MXC_CARD_MAX = MXC_CARD_SD1,
211};
212#endif
213
214#define MXC_CPLD_VER_1_50 0x01
215
216/*
217 * PBC BSTAT Register bit definitions
218 */
219#define PBC_BSTAT_PRI_INT 0X0001
220#define PBC_BSTAT_USB_BYP 0X0002
221#define PBC_BSTAT_ATA_IOCS16 0X0004
222#define PBC_BSTAT_ATA_CBLID 0X0008
223#define PBC_BSTAT_ATA_DASP 0X0010
224#define PBC_BSTAT_PWR_RDY 0X0020
225#define PBC_BSTAT_SD3_WP 0X0100
226#define PBC_BSTAT_SD2_WP 0X0200
227#define PBC_BSTAT_SD1_WP 0X0400
228#define PBC_BSTAT_SD3_DET 0X0800
229#define PBC_BSTAT_SD2_DET 0X1000
230#define PBC_BSTAT_SD1_DET 0X2000
231#define PBC_BSTAT_MS_DET 0X4000
232#define PBC_BSTAT_SD3_DET_BIT 11
233#define PBC_BSTAT_SD2_DET_BIT 12
234#define PBC_BSTAT_SD1_DET_BIT 13
235#define PBC_BSTAT_MS_DET_BIT 14
236#define MXC_BSTAT_BIT(n) ((n == MXC_CARD_SD2) ? PBC_BSTAT_SD2_DET : \
237 ((n == MXC_CARD_SD3) ? PBC_BSTAT_SD3_DET : \
238 ((n == MXC_CARD_SD1) ? PBC_BSTAT_SD1_DET : \
239 ((n == MXC_CARD_MS) ? PBC_BSTAT_MS_DET : \
240 0x0))))
241
242/*
243 * PBC UART Control Register bit definitions
244 */
245#define PBC_UCTRL_DCE_DCD 0X0001
246#define PBC_UCTRL_DCE_DSR 0X0002
247#define PBC_UCTRL_DCE_RI 0X0004
248#define PBC_UCTRL_DTE_DTR 0X0100
249
250/*
251 * PBC UART Status Register bit definitions
252 */
253#define PBC_USTAT_DTE_DCD 0X0001
254#define PBC_USTAT_DTE_DSR 0X0002
255#define PBC_USTAT_DTE_RI 0X0004
256#define PBC_USTAT_DCE_DTR 0X0100
257
258/*
259 * PBC Interupt mask register bit definitions
260 */
261#define PBC_INTR_SD3_R_EN_BIT 4
262#define PBC_INTR_SD2_R_EN_BIT 0
263#define PBC_INTR_SD1_R_EN_BIT 6
264#define PBC_INTR_MS_R_EN_BIT 5
265#define PBC_INTR_SD3_EN_BIT 13
266#define PBC_INTR_SD2_EN_BIT 12
267#define PBC_INTR_MS_EN_BIT 14
268#define PBC_INTR_SD1_EN_BIT 15
269
270#define PBC_INTR_SD2_R_EN 0x0001
271#define PBC_INTR_LOW_BAT 0X0002
272#define PBC_INTR_OTG_FSOVER 0X0004
273#define PBC_INTR_FSH_OVER 0X0008
274#define PBC_INTR_SD3_R_EN 0x0010
275#define PBC_INTR_MS_R_EN 0x0020
276#define PBC_INTR_SD1_R_EN 0x0040
277#define PBC_INTR_FEC_INT 0X0080
278#define PBC_INTR_ENET_INT 0X0100
279#define PBC_INTR_OTGFS_INT 0X0200
280#define PBC_INTR_XUART_INT 0X0400
281#define PBC_INTR_CCTL12 0X0800
282#define PBC_INTR_SD2_EN 0x1000
283#define PBC_INTR_SD3_EN 0x2000
284#define PBC_INTR_MS_EN 0x4000
285#define PBC_INTR_SD1_EN 0x8000
286
287
288
289/* For interrupts like xuart, enet etc */
290#define EXPIO_PARENT_INT IOMUX_TO_IRQ(MX27_PIN_TIN)
291#define MXC_MAX_EXP_IO_LINES 16
292
293/*
294 * This corresponds to PBC_INTMASK_SET_REG at offset 0x38.
295 *
296 */
297#define EXPIO_INT_LOW_BAT (MXC_EXP_IO_BASE + 1)
298#define EXPIO_INT_OTG_FS_OVR (MXC_EXP_IO_BASE + 2)
299#define EXPIO_INT_FSH_OVR (MXC_EXP_IO_BASE + 3)
300#define EXPIO_INT_RES4 (MXC_EXP_IO_BASE + 4)
301#define EXPIO_INT_RES5 (MXC_EXP_IO_BASE + 5)
302#define EXPIO_INT_RES6 (MXC_EXP_IO_BASE + 6)
303#define EXPIO_INT_FEC (MXC_EXP_IO_BASE + 7)
304#define EXPIO_INT_ENET_INT (MXC_EXP_IO_BASE + 8)
305#define EXPIO_INT_OTG_FS_INT (MXC_EXP_IO_BASE + 9)
306#define EXPIO_INT_XUART_INTA (MXC_EXP_IO_BASE + 10)
307#define EXPIO_INT_CCTL12_INT (MXC_EXP_IO_BASE + 11)
308#define EXPIO_INT_SD2_EN (MXC_EXP_IO_BASE + 12)
309#define EXPIO_INT_SD3_EN (MXC_EXP_IO_BASE + 13)
310#define EXPIO_INT_MS_EN (MXC_EXP_IO_BASE + 14)
311#define EXPIO_INT_SD1_EN (MXC_EXP_IO_BASE + 15)
312
313/*
314 * This is System IRQ used by CS8900A for interrupt generation
315 * taken from platform.h
316 */
317#define CS8900AIRQ EXPIO_INT_ENET_INT
318/* This is I/O Base address used to access registers of CS8900A on MXC ADS */
319#define CS8900A_BASE_ADDRESS (PBC_CS8900A_IOBASE_REG + 0x300)
320
321#define MXC_PMIC_INT_LINE IOMUX_TO_IRQ(MX27_PIN_TOUT)
322
323/*
324* This is used to detect if the CPLD version is for mx27 evb board rev-a
325*/
326#define PBC_CPLD_VERSION_IS_REVA() \
327 ((__raw_readw(PBC_VERSION_REG) & \
328 (PBC_VERSION_ADS | PBC_VERSION_EVB_REVB))\
329 == 0)
330
331/* This is used to active or inactive ata signal in CPLD .
332 * It is dependent with hardware
333 */
334#define PBC_ATA_SIGNAL_ACTIVE() \
335 __raw_writew( \
336 PBC_BCTRL2_ATAFEC_EN|PBC_BCTRL2_ATAFEC_SEL|PBC_BCTRL2_ATA_EN, \
337 PBC_BCTRL2_CLEAR_REG)
338
339#define PBC_ATA_SIGNAL_INACTIVE() \
340 __raw_writew( \
341 PBC_BCTRL2_ATAFEC_EN|PBC_BCTRL2_ATAFEC_SEL|PBC_BCTRL2_ATA_EN, \
342 PBC_BCTRL2_SET_REG)
343
344#define MXC_BD_LED1 (1 << 5)
345#define MXC_BD_LED2 (1 << 6)
346#define MXC_BD_LED_ON(led) \
347 __raw_writew(led, PBC_BCTRL1_SET_REG)
348#define MXC_BD_LED_OFF(led) \
349 __raw_writew(led, PBC_BCTRL1_CLEAR_REG)
350
351/* to determine the correct external crystal reference */
352#define CKIH_27MHZ_BIT_SET (1 << 3)
353
354#endif /* __ASM_ARCH_MXC_BOARD_MX27ADS_H__ */
diff --git a/include/asm-arm/arch-mxc/debug-macro.S b/include/asm-arm/arch-mxc/debug-macro.S
index 5add48b6665..c6c56805143 100644
--- a/include/asm-arm/arch-mxc/debug-macro.S
+++ b/include/asm-arm/arch-mxc/debug-macro.S
@@ -22,7 +22,9 @@
22#ifdef CONFIG_MACH_MX31LITE 22#ifdef CONFIG_MACH_MX31LITE
23#include <asm/arch/board-mx31lite.h> 23#include <asm/arch/board-mx31lite.h>
24#endif 24#endif
25 25#ifdef CONFIG_MACH_MX27ADS
26#include <asm/arch/board-mx27ads.h>
27#endif
26 .macro addruart,rx 28 .macro addruart,rx
27 mrc p15, 0, \rx, c1, c0 29 mrc p15, 0, \rx, c1, c0
28 tst \rx, #1 @ MMU enabled? 30 tst \rx, #1 @ MMU enabled?
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-28 02:03:53 -0500