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authorMarc Zyngier <maz@misterjones.org>2010-04-10 16:32:38 -0400
committerKrzysztof Hałasa <khc@pm.waw.pl>2010-05-27 07:02:42 -0400
commit4d9be47f3dcf647aff11406b2f868811442d2d02 (patch)
tree3aa7b0287343eee1de2ae755c1e1674c5d8603dc
parente40152ee1e1c7a63f4777791863215e3faa37a86 (diff)
ixp4xx: base support for Arcom Vulcan
This patch adds some basic support for the Arcom Vulcan (ixp425 based). Supported devices include: - XR16L551 serial ports - External watchdog - Flash - SRAM - 1-wire id Signed-off-by: Marc Zyngier <maz@misterjones.org> Cc: Imre Kaloz <kaloz@openwrt.org> Cc: Krzysztof Halasa <khc@pm.waw.pl> Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
Diffstat
-rw-r--r--arch/arm/mach-ixp4xx/Kconfig8
-rw-r--r--arch/arm/mach-ixp4xx/Makefile1
-rw-r--r--arch/arm/mach-ixp4xx/vulcan-setup.c246
3 files changed, 255 insertions, 0 deletions
diff --git a/arch/arm/mach-ixp4xx/Kconfig b/arch/arm/mach-ixp4xx/Kconfig
index 9e5070da17a..6f991c5ae86 100644
--- a/arch/arm/mach-ixp4xx/Kconfig
+++ b/arch/arm/mach-ixp4xx/Kconfig
@@ -140,6 +140,14 @@ config MACH_FSG
140 FSG-3 device. For more information on this platform, 140 FSG-3 device. For more information on this platform,
141 see http://www.nslu2-linux.org/wiki/FSG3/HomePage 141 see http://www.nslu2-linux.org/wiki/FSG3/HomePage
142 142
143config MACH_ARCOM_VULCAN
144 bool
145 prompt "Arcom/Eurotech Vulcan"
146 select PCI
147 help
148 Say 'Y' here if you want your kernel to support Arcom's
149 Vulcan board.
150
143# 151#
144# Certain registers and IRQs are only enabled if supporting IXP465 CPUs 152# Certain registers and IRQs are only enabled if supporting IXP465 CPUs
145# 153#
diff --git a/arch/arm/mach-ixp4xx/Makefile b/arch/arm/mach-ixp4xx/Makefile
index 47d1f60d23f..ab39693cb71 100644
--- a/arch/arm/mach-ixp4xx/Makefile
+++ b/arch/arm/mach-ixp4xx/Makefile
@@ -31,6 +31,7 @@ obj-$(CONFIG_MACH_GATEWAY7001) += gateway7001-setup.o
31obj-$(CONFIG_MACH_WG302V2) += wg302v2-setup.o 31obj-$(CONFIG_MACH_WG302V2) += wg302v2-setup.o
32obj-$(CONFIG_MACH_FSG) += fsg-setup.o 32obj-$(CONFIG_MACH_FSG) += fsg-setup.o
33obj-$(CONFIG_MACH_GORAMO_MLR) += goramo_mlr.o 33obj-$(CONFIG_MACH_GORAMO_MLR) += goramo_mlr.o
34obj-$(CONFIG_MACH_ARCOM_VULCAN) += vulcan-setup.o
34 35
35obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o 36obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o
36obj-$(CONFIG_IXP4XX_QMGR) += ixp4xx_qmgr.o 37obj-$(CONFIG_IXP4XX_QMGR) += ixp4xx_qmgr.o
diff --git a/arch/arm/mach-ixp4xx/vulcan-setup.c b/arch/arm/mach-ixp4xx/vulcan-setup.c
new file mode 100644
index 00000000000..465cc5cce68
--- /dev/null
+++ b/arch/arm/mach-ixp4xx/vulcan-setup.c
@@ -0,0 +1,246 @@
1/*
2 * arch/arm/mach-ixp4xx/vulcan-setup.c
3 *
4 * Arcom/Eurotech Vulcan board-setup
5 *
6 * Copyright (C) 2010 Marc Zyngier <maz@misterjones.org>
7 *
8 * based on fsg-setup.c:
9 * Copyright (C) 2008 Rod Whitby <rod@whitby.id.au>
10 */
11
12#include <linux/if_ether.h>
13#include <linux/irq.h>
14#include <linux/serial.h>
15#include <linux/serial_8250.h>
16#include <linux/io.h>
17#include <linux/w1-gpio.h>
18#include <linux/mtd/plat-ram.h>
19#include <asm/mach-types.h>
20#include <asm/mach/arch.h>
21#include <asm/mach/flash.h>
22
23static struct flash_platform_data vulcan_flash_data = {
24 .map_name = "cfi_probe",
25 .width = 2,
26};
27
28static struct resource vulcan_flash_resource = {
29 .flags = IORESOURCE_MEM,
30};
31
32static struct platform_device vulcan_flash = {
33 .name = "IXP4XX-Flash",
34 .id = 0,
35 .dev = {
36 .platform_data = &vulcan_flash_data,
37 },
38 .resource = &vulcan_flash_resource,
39 .num_resources = 1,
40};
41
42static struct platdata_mtd_ram vulcan_sram_data = {
43 .mapname = "Vulcan SRAM",
44 .bankwidth = 1,
45};
46
47static struct resource vulcan_sram_resource = {
48 .flags = IORESOURCE_MEM,
49};
50
51static struct platform_device vulcan_sram = {
52 .name = "mtd-ram",
53 .id = 0,
54 .dev = {
55 .platform_data = &vulcan_sram_data,
56 },
57 .resource = &vulcan_sram_resource,
58 .num_resources = 1,
59};
60
61static struct resource vulcan_uart_resources[] = {
62 [0] = {
63 .start = IXP4XX_UART1_BASE_PHYS,
64 .end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
65 .flags = IORESOURCE_MEM,
66 },
67 [1] = {
68 .start = IXP4XX_UART2_BASE_PHYS,
69 .end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
70 .flags = IORESOURCE_MEM,
71 },
72 [2] = {
73 .flags = IORESOURCE_MEM,
74 },
75};
76
77static struct plat_serial8250_port vulcan_uart_data[] = {
78 [0] = {
79 .mapbase = IXP4XX_UART1_BASE_PHYS,
80 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
81 .irq = IRQ_IXP4XX_UART1,
82 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
83 .iotype = UPIO_MEM,
84 .regshift = 2,
85 .uartclk = IXP4XX_UART_XTAL,
86 },
87 [1] = {
88 .mapbase = IXP4XX_UART2_BASE_PHYS,
89 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
90 .irq = IRQ_IXP4XX_UART2,
91 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
92 .iotype = UPIO_MEM,
93 .regshift = 2,
94 .uartclk = IXP4XX_UART_XTAL,
95 },
96 [2] = {
97 .irq = IXP4XX_GPIO_IRQ(4),
98 .irqflags = IRQF_TRIGGER_LOW,
99 .flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
100 .iotype = UPIO_MEM,
101 .uartclk = 1843200,
102 },
103 [3] = {
104 .irq = IXP4XX_GPIO_IRQ(4),
105 .irqflags = IRQF_TRIGGER_LOW,
106 .flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
107 .iotype = UPIO_MEM,
108 .uartclk = 1843200,
109 },
110 { }
111};
112
113static struct platform_device vulcan_uart = {
114 .name = "serial8250",
115 .id = PLAT8250_DEV_PLATFORM,
116 .dev = {
117 .platform_data = vulcan_uart_data,
118 },
119 .resource = vulcan_uart_resources,
120 .num_resources = ARRAY_SIZE(vulcan_uart_resources),
121};
122
123static struct eth_plat_info vulcan_plat_eth[] = {
124 [0] = {
125 .phy = 0,
126 .rxq = 3,
127 .txreadyq = 20,
128 },
129 [1] = {
130 .phy = 1,
131 .rxq = 4,
132 .txreadyq = 21,
133 },
134};
135
136static struct platform_device vulcan_eth[] = {
137 [0] = {
138 .name = "ixp4xx_eth",
139 .id = IXP4XX_ETH_NPEB,
140 .dev = {
141 .platform_data = &vulcan_plat_eth[0],
142 },
143 },
144 [1] = {
145 .name = "ixp4xx_eth",
146 .id = IXP4XX_ETH_NPEC,
147 .dev = {
148 .platform_data = &vulcan_plat_eth[1],
149 },
150 },
151};
152
153static struct resource vulcan_max6369_resource = {
154 .flags = IORESOURCE_MEM,
155};
156
157static struct platform_device vulcan_max6369 = {
158 .name = "max6369_wdt",
159 .id = -1,
160 .resource = &vulcan_max6369_resource,
161 .num_resources = 1,
162};
163
164static struct w1_gpio_platform_data vulcan_w1_gpio_pdata = {
165 .pin = 14,
166};
167
168static struct platform_device vulcan_w1_gpio = {
169 .name = "w1-gpio",
170 .id = 0,
171 .dev = {
172 .platform_data = &vulcan_w1_gpio_pdata,
173 },
174};
175
176static struct platform_device *vulcan_devices[] __initdata = {
177 &vulcan_uart,
178 &vulcan_flash,
179 &vulcan_sram,
180 &vulcan_max6369,
181 &vulcan_eth[0],
182 &vulcan_eth[1],
183 &vulcan_w1_gpio,
184};
185
186static void __init vulcan_init(void)
187{
188 ixp4xx_sys_init();
189
190 /* Flash is spread over both CS0 and CS1 */
191 vulcan_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
192 vulcan_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1;
193 *IXP4XX_EXP_CS0 = IXP4XX_EXP_BUS_CS_EN |
194 IXP4XX_EXP_BUS_STROBE_T(3) |
195 IXP4XX_EXP_BUS_SIZE(0xF) |
196 IXP4XX_EXP_BUS_BYTE_RD16 |
197 IXP4XX_EXP_BUS_WR_EN;
198 *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
199
200 /* SRAM on CS2, (256kB, 8bit, writable) */
201 vulcan_sram_resource.start = IXP4XX_EXP_BUS_BASE(2);
202 vulcan_sram_resource.end = IXP4XX_EXP_BUS_BASE(2) + SZ_256K - 1;
203 *IXP4XX_EXP_CS2 = IXP4XX_EXP_BUS_CS_EN |
204 IXP4XX_EXP_BUS_STROBE_T(1) |
205 IXP4XX_EXP_BUS_HOLD_T(2) |
206 IXP4XX_EXP_BUS_SIZE(9) |
207 IXP4XX_EXP_BUS_SPLT_EN |
208 IXP4XX_EXP_BUS_WR_EN |
209 IXP4XX_EXP_BUS_BYTE_EN;
210
211 /* XR16L2551 on CS3 (Moto style, 512 bytes, 8bits, writable) */
212 vulcan_uart_resources[2].start = IXP4XX_EXP_BUS_BASE(3);
213 vulcan_uart_resources[2].end = IXP4XX_EXP_BUS_BASE(3) + 16 - 1;
214 vulcan_uart_data[2].mapbase = vulcan_uart_resources[2].start;
215 vulcan_uart_data[3].mapbase = vulcan_uart_data[2].mapbase + 8;
216 *IXP4XX_EXP_CS3 = IXP4XX_EXP_BUS_CS_EN |
217 IXP4XX_EXP_BUS_STROBE_T(3) |
218 IXP4XX_EXP_BUS_CYCLES(IXP4XX_EXP_BUS_CYCLES_MOTOROLA)|
219 IXP4XX_EXP_BUS_WR_EN |
220 IXP4XX_EXP_BUS_BYTE_EN;
221
222 /* GPIOS on CS4 (512 bytes, 8bits, writable) */
223 *IXP4XX_EXP_CS4 = IXP4XX_EXP_BUS_CS_EN |
224 IXP4XX_EXP_BUS_WR_EN |
225 IXP4XX_EXP_BUS_BYTE_EN;
226
227 /* max6369 on CS5 (512 bytes, 8bits, writable) */
228 vulcan_max6369_resource.start = IXP4XX_EXP_BUS_BASE(5);
229 vulcan_max6369_resource.end = IXP4XX_EXP_BUS_BASE(5);
230 *IXP4XX_EXP_CS5 = IXP4XX_EXP_BUS_CS_EN |
231 IXP4XX_EXP_BUS_WR_EN |
232 IXP4XX_EXP_BUS_BYTE_EN;
233
234 platform_add_devices(vulcan_devices, ARRAY_SIZE(vulcan_devices));
235}
236
237MACHINE_START(ARCOM_VULCAN, "Arcom/Eurotech Vulcan")
238 /* Maintainer: Marc Zyngier <maz@misterjones.org> */
239 .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
240 .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
241 .map_io = ixp4xx_map_io,
242 .init_irq = ixp4xx_init_irq,
243 .timer = &ixp4xx_timer,
244 .boot_params = 0x0100,
245 .init_machine = vulcan_init,
246MACHINE_END
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