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authorTimur Tabi <timur@freescale.com>2011-06-23 16:20:26 -0400
committerPaul Mundt <lethal@linux-sh.org>2011-06-24 04:08:49 -0400
commit39785eb1d3e6c58cc8bf8f6990956a58037ecc75 (patch)
treeb896a48b483803124c940ff99e7ffdfd4a4a171c
parent9377c51752970c305fae29ac634501fde44378cb (diff)
fsl-diu-fb: remove check for pixel clock ranges
The Freescale DIU framebuffer driver defines two constants, MIN_PIX_CLK and MAX_PIX_CLK, that are supposed to represent the lower and upper limits of the pixel clock. These values, however, are true only for one platform clock rate (533MHz) and only for the MPC8610. So the actual range for the pixel clock is chip-specific, which means the current values are almost always wrong. The chance of an out-of-range pixel clock being used are also remote. Rather than try to detect an out-of-range clock in the DIU driver, we depend on the board-specific pixel clock function (e.g. p1022ds_set_pixel_clock) to clamp the pixel clock to a supported value. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r--drivers/video/fsl-diu-fb.c16
-rw-r--r--include/linux/fsl-diu-fb.h6
2 files changed, 0 insertions, 22 deletions
diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fsl-diu-fb.c
index bedf5be27f0..0acc7d65aea 100644
--- a/drivers/video/fsl-diu-fb.c
+++ b/drivers/video/fsl-diu-fb.c
@@ -555,8 +555,6 @@ static void adjust_aoi_size_position(struct fb_var_screeninfo *var,
555static int fsl_diu_check_var(struct fb_var_screeninfo *var, 555static int fsl_diu_check_var(struct fb_var_screeninfo *var,
556 struct fb_info *info) 556 struct fb_info *info)
557{ 557{
558 unsigned long htotal, vtotal;
559
560 pr_debug("check_var xres: %d\n", var->xres); 558 pr_debug("check_var xres: %d\n", var->xres);
561 pr_debug("check_var yres: %d\n", var->yres); 559 pr_debug("check_var yres: %d\n", var->yres);
562 560
@@ -635,20 +633,6 @@ static int fsl_diu_check_var(struct fb_var_screeninfo *var,
635 633
636 break; 634 break;
637 } 635 }
638 /* If the pixclock is below the minimum spec'd value then set to
639 * refresh rate for 60Hz since this is supported by most monitors.
640 * Refer to Documentation/fb/ for calculations.
641 */
642 if ((var->pixclock < MIN_PIX_CLK) || (var->pixclock > MAX_PIX_CLK)) {
643 htotal = var->xres + var->right_margin + var->hsync_len +
644 var->left_margin;
645 vtotal = var->yres + var->lower_margin + var->vsync_len +
646 var->upper_margin;
647 var->pixclock = (vtotal * htotal * 6UL) / 100UL;
648 var->pixclock = KHZ2PICOS(var->pixclock);
649 pr_debug("pixclock set for 60Hz refresh = %u ps\n",
650 var->pixclock);
651 }
652 636
653 var->height = -1; 637 var->height = -1;
654 var->width = -1; 638 var->width = -1;
diff --git a/include/linux/fsl-diu-fb.h b/include/linux/fsl-diu-fb.h
index 781d4671415..daa9952d217 100644
--- a/include/linux/fsl-diu-fb.h
+++ b/include/linux/fsl-diu-fb.h
@@ -24,12 +24,6 @@
24 * See mpc8610fb_set_par(), map_video_memory(), and unmap_video_memory() 24 * See mpc8610fb_set_par(), map_video_memory(), and unmap_video_memory()
25 */ 25 */
26#define MEM_ALLOC_THRESHOLD (1024*768*4+32) 26#define MEM_ALLOC_THRESHOLD (1024*768*4+32)
27/* Minimum value that the pixel clock can be set to in pico seconds
28 * This is determined by platform clock/3 where the minimum platform
29 * clock is 533MHz. This gives 5629 pico seconds.
30 */
31#define MIN_PIX_CLK 5629
32#define MAX_PIX_CLK 96096
33 27
34#include <linux/types.h> 28#include <linux/types.h>
35 29