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authorShawn Guo <shawn.guo@freescale.com>2011-02-21 05:42:55 -0500
committerSascha Hauer <s.hauer@pengutronix.de>2011-03-07 13:29:54 -0500
commit208277f74e449fca082c1895086bd44c159efba5 (patch)
treec267f3a7d8cd3b93a604765ca3c78a6ad29f3f53
parent3baa4feeadf22ae72dad217f31ea739d881fc149 (diff)
ARM: mxs: make ssp error irq definition consistent
Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r--arch/arm/mach-mxs/include/mach/mx23.h2
-rw-r--r--arch/arm/mach-mxs/include/mach/mx28.h8
2 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/mach-mxs/include/mach/mx23.h b/arch/arm/mach-mxs/include/mach/mx23.h
index 1745e98ca96..c0a18c23084 100644
--- a/arch/arm/mach-mxs/include/mach/mx23.h
+++ b/arch/arm/mach-mxs/include/mach/mx23.h
@@ -93,7 +93,7 @@
93#define MX23_INT_USB_WAKEUP 12 93#define MX23_INT_USB_WAKEUP 12
94#define MX23_INT_GPMI_DMA 13 94#define MX23_INT_GPMI_DMA 13
95#define MX23_INT_SSP1_DMA 14 95#define MX23_INT_SSP1_DMA 14
96#define MX23_INT_SSP_ERROR 15 96#define MX23_INT_SSP1_ERROR 15
97#define MX23_INT_GPIO0 16 97#define MX23_INT_GPIO0 16
98#define MX23_INT_GPIO1 17 98#define MX23_INT_GPIO1 17
99#define MX23_INT_GPIO2 18 99#define MX23_INT_GPIO2 18
diff --git a/arch/arm/mach-mxs/include/mach/mx28.h b/arch/arm/mach-mxs/include/mach/mx28.h
index 3f3485af9ac..75d86118b76 100644
--- a/arch/arm/mach-mxs/include/mach/mx28.h
+++ b/arch/arm/mach-mxs/include/mach/mx28.h
@@ -163,10 +163,10 @@
163#define MX28_INT_USB0 93 163#define MX28_INT_USB0 93
164#define MX28_INT_USB1_WAKEUP 94 164#define MX28_INT_USB1_WAKEUP 94
165#define MX28_INT_USB0_WAKEUP 95 165#define MX28_INT_USB0_WAKEUP 95
166#define MX28_INT_SSP0 96 166#define MX28_INT_SSP0_ERROR 96
167#define MX28_INT_SSP1 97 167#define MX28_INT_SSP1_ERROR 97
168#define MX28_INT_SSP2 98 168#define MX28_INT_SSP2_ERROR 98
169#define MX28_INT_SSP3 99 169#define MX28_INT_SSP3_ERROR 99
170#define MX28_INT_ENET_SWI 100 170#define MX28_INT_ENET_SWI 100
171#define MX28_INT_ENET_MAC0 101 171#define MX28_INT_ENET_MAC0 101
172#define MX28_INT_ENET_MAC1 102 172#define MX28_INT_ENET_MAC1 102