i386: fix PGE mask

cr4 is a 32-bit register, so casting the mask to an unsigned char is wrong,
as it clears more than the PGE bit.

Signed-off-by: Brian Gerst <bgerst@didntduck.org>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

2 files changed, 2 insertions, 2 deletions

diff --git a/arch/i386/kernel/cpu/mtrr/cyrix.c b/arch/i386/kernel/cpu/mtrr/cyrix.c
index 0737a596db4..9edf5625584 100644
--- a/arch/i386/kernel/cpu/mtrr/cyrix.c
+++ b/arch/i386/kernel/cpu/mtrr/cyrix.c
@@ -136,7 +136,7 @@ static void prepare_set(void)
         /*  Save value of CR4 and clear Page Global Enable (bit 7)  */
         if ( cpu_has_pge ) {
                 cr4 = read_cr4();
-                write_cr4(cr4 & (unsigned char) ~(1 << 7));
+                write_cr4(cr4 & ~X86_CR4_PGE);
         }
 
         /*  Disable and flush caches. Note that wbinvd flushes the TLBs as
diff --git a/arch/i386/kernel/cpu/mtrr/state.c b/arch/i386/kernel/cpu/mtrr/state.c
index f62ecd15811..7b39a2f954d 100644
--- a/arch/i386/kernel/cpu/mtrr/state.c
+++ b/arch/i386/kernel/cpu/mtrr/state.c
@@ -19,7 +19,7 @@ void set_mtrr_prepare_save(struct set_mtrr_context *ctxt)
                 /*  Save value of CR4 and clear Page Global Enable (bit 7)  */
                 if ( cpu_has_pge ) {
                         ctxt->cr4val = read_cr4();
-                        write_cr4(ctxt->cr4val & (unsigned char) ~(1 << 7));
+                        write_cr4(ctxt->cr4val & ~X86_CR4_PGE);
                 }
 
                 /*  Disable and flush caches. Note that wbinvd flushes the TLBs as