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The SRPC register should be volatile, LOCK bit is set by the hardware.
Signed-off-by: Shengjiu Wang <b02247@freescale.com>
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Not only SIS but also other read-only or write-only reigsters should be marked
as volatile register so as not to let regcache cache them. So this patch just
adds those missing registers.
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
(cherry picked from commit 56ad235ba23274fc05422ad4b13153d1c56801c4)
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MEGA Fast
For i.MX6 SoloX, there is a mode of the SoC to shutdown all power source of
modules during system suspend and resume procedure. Thus, SPDIF needs to save
all the values of registers before the system suspend and restore them after
the system resume.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
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It'd better to tell people what's the current rate from the clock
selecting function against the required sample rate.
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
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The sysclk, which could be connected to IPG clock, is one of the eight
clocks on the inner clock mux of SPDIF. Previously we forbade the usage
of this clock due to imperfect clock selecting function.
This patch adds the sysclk_df divisor so as to complete sysclk function.
[ In order to potect those clocks from other modules and the situation
when SPDIF root clock is shared with other module (ASRC on imx6sx for
example) that demands us to fix the clock and not to change its rate,
starting from now on, we no longer use clk_round() and clk_set_rate(). ]
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
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Even if we assign regmap to manage the coreclk control, we still need
to open the clock if we are going to run the driver because DMA access
would not be detected by regmap.
So this patch adds clock control for coreclk.
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
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Both esai and spdif are using SDMA script to transmit and receive data while
the essential spba clock is missed in the current two drivers. Thus add them.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
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The current clock selecting mechanism would choose a clock and set its rate
later when using it. It might be feasible for other clock sources but not
for sysclk -- ipg clock. Changing ipg clock rate in specific driver would
be a dangerous operation, so we here ingore the sysclk and will restore it
after we accomplish a better mechanism.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
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According to the Reference Manual, we should use system clock to calculate
rx clock rate instead of spdif own clock. Thus add system clock to spdif
driver and replace the incorrect one in rate calculation.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
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Each CPU DAI driver has its own defined DMA buffer size, so this patch just
drops the original one that uses a fixed size for all drivers and implements
a different DMA buffer size to each driver.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
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Redundant semicolon at the end of brace is removed.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
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Remove the "====" pattern to let the comments cleaner and more uniform.
Also, do not use multi-line style for a single line comment.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Nicolin Chen <b42378@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Signed-off-by: Mark Brown <broonie@linaro.org>
Acked-by: Nicolin Chen <B42378@freescale.com>
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Add wrapping '\n' for dev_dbg() in fsl_spdif.c
Signed-off-by: Nicolin Chen <b42378@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Add pm runtime for fsl audio codec
Signed-off-by: Shengjiu Wang <b02247@freescale.com>
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We are using generic dma binding from devicetree for spdif, thus use
the correct flag.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
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Driver core clears the driver data to NULL after device_release or on probe
failure, so just remove it from here.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Nicolin Chen <b42378@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
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This patch implements a device-tree-only CPU DAI driver for Freescale
S/PDIF controller that supports stereo playback and record feature.
Signed-off-by: Nicolin Chen <b42378@freescale.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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