aboutsummaryrefslogtreecommitdiffstats
path: root/sound/soc/fsl/fsl_sai.c
Commit message (Collapse)AuthorAge
* ENGR00324009 Revert "ENGR00323404-1 ASoC: fsl_sai: Reset FIFOs after ↵Nicolin Chen2014-07-23
| | | | | | | | | | | | | | | disabling TE/RE" Patch "ASoC: fsl_sai: Reset FIFOs after disabling TE/RE" may accidentally increase the underrun rate of SAI. To keep an equal quality as previous release, we decide to revert this patch and find a thorough way to reset the FIFO later. This reverts commit b85f840a60de8d0a5ca8fbe7eda15f611ff5b622. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00323404-2 ASoC: fsl_sai: Fix incorrect register writing in fsl_sai_isr()Nicolin Chen2014-07-18
| | | | | | | In the rx irq handling part, we should clear the flags in RCSR not TCSR. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00323404-1 ASoC: fsl_sai: Reset FIFOs after disabling TE/RENicolin Chen2014-07-18
| | | | | | | | SAI will not clear their FIFOs after disabling TE/RE. Therfore, the driver should take care the task so as not to let useless data remain in the FIFO. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ENGR00318773-6 ASoC: fsl_sai: Add driver suspend and resume to support MEGA FastNicolin Chen2014-06-19
| | | | | | | | | | For i.MX6 SoloX, there is a mode of the SoC to shutdown all power source of modules during system suspend and resume procedure. Thus, SAI needs to save all the values of registers before the system suspend and restore them after the system resume. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ASoC: fsl_sai: Use FSL_SAI_xXR() and regmap_update_bits() to simplify codeNicolin Chen2014-04-16
| | | | | | | | By doing this, the driver can drop around 50 lines and become neater. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit 2a266f8b2ae790454edb79cb8c707c9305e0307a)
* ASoC: fsl_sai: Fix incorrect condition check in trigger()Nicolin Chen2014-04-16
| | | | | | | | | | | | | Patch ASoC: fsl_sai: Fix buggy configurations in trigger() doesn't entirely fix the condition: FRDE of the current substream direction is being cleared while the code is still using the non-updated one. Thus this patch fixes this issue by checking the opposite one's FRDE alone since the current one's is absolutely disabled. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit f84526cfae46672308a361333c76b724384b61ee)
* ENGR00307635-1 ASoC: fsl_sai: Specify buffer size for SAINicolin Chen2014-04-16
| | | | | | | Add a new micro for SAI so as to make further define flexible. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ASoC: fsl_sai: Add clock controls for SAINicolin Chen2014-04-16
| | | | | | | | | | | | | | | | | | | | | | | The SAI mainly has the following clocks: bus clock control and configure registers and to generate synchronous interrupts and DMA requests. mclk1, mclk2, mclk3 to generate the bit clock when the receiver or transmitter is configured for an internally generated bit clock. So this patch adds these clocks and their clock controls to the driver. [ To concern the old DTB cases, I've added a bit of extra code to make the driver compatible with them. And by marking clock NULL if failed to get, the clk_prepare() or clk_get_rate() would easily return 0 so no further path should be broken. -- by Nicolin ] Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Acked-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit 17d1eb6628e70488c44c46003dcfe583696bb7b7)
* ASoC: fsl_sai: Fix Bit Clock Polarity configurationsNicolin Chen2014-04-16
| | | | | | | | | | | | | | | | | | | | | | The BCP bit in TCR4/RCR4 register rules as followings: 0 Bit clock is active high with drive outputs on rising edge and sample inputs on falling edge. 1 Bit clock is active low with drive outputs on falling edge and sample inputs on rising edge. For all formats currently supported in the fsl_sai driver, they're exactly sending data on the falling edge and sampling on the rising edge. However, the driver clears this BCP bit for all of them which results click noise when working with SGTL5000 and big noise with WM8962. Thus this patch corrects the BCP settings for all the formats here to fix the nosie issue. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Acked-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit ef33bc3217c7aa9868f497c4f797cc50ad3ce357)
* ASoC: fsl_sai: Add imx6sx platform supportNicolin Chen2014-04-16
| | | | | | | | | | | | | | | | | The next coming i.MX6 Solo X SoC also contains SAI module while we use imp_pcm_init() for i.MX platform. So this patch adds one compatible route for imx6sx and updates the DT doc accordingly. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit 30c35252aadb460e009ca8a3fdc8891903bdfc66) [ Added essential parameters to imx_pcm_init() calling due to build error, resulted from the define change of the function on the upstream. ] Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ASoC: fsl_sai: Separately enable interrupts for Tx and Rx streamsNicolin Chen2014-04-16
| | | | | | | | | | | | We only enable one side interrupt for each stream since over/underrun on the opposite stream would be resulted from what we previously did, enabling TERE but remaining FRDE disabled, even though the xrun on the opposite direction will not break the current stream. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Acked-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit 20ea0d31528f7a461a4ecfb5924ca228bf3ca3c5)
* ASoC: fsl_sai: Fix buggy configurations in trigger()Nicolin Chen2014-04-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current trigger() has two crucial problems: 1) The DMA request enabling operations (FSL_SAI_CSR_FRDE) for Tx and Rx are now totally exclusive: It would fail to run simultaneous Tx-Rx cases. 2) The TERE disabling operation depends on an incorrect condition -- active reference count that only gets increased in snd_pcm_open() and decreased in snd_pcm_close(): The TERE would never get cleared. So this patch overwrites the trigger function by following these rules: A) We continue to support tx-async-while-rx-sync-to-tx case alone, which's originally limited by this fsl_sai driver, but we make the code easy to modify for the further support of the opposite case. B) We enable both TE and RE for PLAYBACK stream or CAPTURE stream but only enabling the DMA request bit (FSL_SAI_CSR_FRDE) of the current direction due to the requirement of SAI -- For tx-async-while-rx-sync-to-tx case, the receiver is enabled only when both the transmitter and receiver are enabled. Tested cases: a) aplay test.wav -d5 b) arecord -r44100 -c2 -fS16_LE test.wav -d5 c) arecord -r44100 -c2 -fS16_LE -d5 | aplay d) (aplay test2.wav &); sleep 1; arecord -r44100 -c2 -fS16_LE test.wav -d1 e) (arecord -r44100 -c2 -fS16_LE test.wav -d5 &); sleep 1; aplay test.wav -d1 Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Acked-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit d827786ea623da7ceadaa037f2574a19cbeb90e5)
* ASoC: fsl_sai: Improve fsl_sai_isr()Nicolin Chen2014-04-16
| | | | | | | | | | | This patch improves fsl_sai_isr() in these ways: 1, Add comment for mask fetching code. 2, Return IRQ_NONE if the IRQ is not for the device. 3, Use regmap_write() instead of regmap_update_bits(). Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit 4a16d85ffa819902f595eac6677788eddc0e6628)
* ASoC: fsl_sai: Add isr to deal with error flagNicolin Chen2014-04-16
| | | | | | | | | | | | | It's quite cricial to clear error flags because SAI might hang if getting FIFO underrun during playback (I haven't confirmed the same issue on Rx overflow though). So this patch enables those irq and adds isr() to clear the flags so as to keep playback entirely safe. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit e2681a1bf5ae053426a6c5c1daaed17b2f95efe6)
* ASoC: fsl-sai: Add SND_SOC_DAIFMT_DSP_A/B support.Xiubo Li2014-04-16
| | | | | | | | | | o Add SND_SOC_DAIFMT_DSP_A support. o Add SND_SOC_DAIFMT_DSP_B support. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit a3f7dcc9cc0392528bff75b17adfcd74fb8a0ecd) Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ASoC: fsl-sai: fix Freescale SAI DAI format setting.Xiubo Li2014-04-16
| | | | | | | | | | | | | o Fix some bugs of fsl_sai_set_dai_fmt_tr(). o Add SND_SOC_DAIFMT_LEFT_J support. o Add SND_SOC_DAIFMT_CBS_CFM support. o Add SND_SOC_DAIFMT_CBM_CFS support. o And SND_SOC_DAIFMT_RIGHT_J need to be done in the future. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit 13cde090030c7d00e991c85b87c12891cc8e4df4) Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ASoC: fsl-sai: convert to use regmap API for Freeacale SAIXiubo Li2014-04-16
| | | | | | | Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit 78957fc349bcf29d415a649601581a993ff25e4d) Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ASoC: fsl-sai: Clean up the codeXiubo Li2014-04-16
| | | | | | | | | Makes the code slightly shorter. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit 633ff8f8a4393b4a13b94eddd2613198c32035e6) Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ASoC: fsl_sai: fix the endianess for SAI fifo data.Xiubo Li2014-04-16
| | | | | | | | | Revert the SAI's endianess for fifo data to/from DMA engine. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit 72aa62bed3ea30635156fad95f123a0b665072bf) Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ASoC: fsl_sai: Fix one bug for hardware limitation.Xiubo Li2014-04-16
| | | | | | | | | | | | | | | This is maybe one bug or a limitation of the hardware that the {T,R}CR2's Synchronous Mode bits must be set as late as possible, or the SAI device maybe hanged up, and there has not any explaination about this limitation in the SAI Data Sheet. And the {T,R}CR2's Synchronous Mode bits must be set at the same time whether for Tx or Rx stream. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit 496a39d9ec238569fac6daceac8f5420c5edc2f1) Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ASoC: fsl_sai: Add disable operation for the corresponding data channel.Xiubo Li2014-04-16
| | | | | | | | | | | Enables/Disables the corresponding data channel for tx/rx operation. A channel must be enabled before its FIFO is accessed, and then disable it when tx/rx is stopped or idle. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit e5d0fa9c3ec59a40e0285d96b65b7f62875acd42) Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ASoC: fsl_sai: Move the global registers setting to _dai_probe()Xiubo Li2014-04-16
| | | | | | | | | | | | | Because we cannot make sure which one of _dai_fmt() and _dai_sysclk() will be firstly called. So move the RCSR/TCSR and TCR1/RCR1's initialization to _dai_probe(), and this can make sure that before any of {T,R}CR{1~5} register to be set the RCSR/TCSR's RE/TE bit has been cleared for the hareware limitation. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit e6dc12d7198eddba2e3e7a13feab5c7edde7ba1d) Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ASoC: fsl_sai: Sort local variable in general wayNicolin Chen2014-04-16
| | | | | | | | | | | | | | | | | | Generally we would write code for local variable like: static new_func() { struct xxx *yyy; ... int ret; } But this driver only follows this pattern for some functions, not all. Thus this patch sorts the local variable in the general way. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Reviewed-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit 4e3a99f5b004b30bc604d82e5498700649148e0d)
* ASoC: fsl_sai: Make dev_err information neaterNicolin Chen2014-04-16
| | | | | | | | | | Since using dev_err() there's no need to mention SAI any more, it will print the full name of the driver -- fsl_sai. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Reviewed-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit 190af12dad975f2ea7d69d1c5c9d36fec64da767)
* ASoC: fsl_sai: Drop useless ret in startup()Nicolin Chen2014-04-16
| | | | | | | | | We can save this ret to make the code neater. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Reviewed-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit 15b29dae6604d2d2daf586429ff12f26272a868a)
* ASoC: fsl_sai: Drop useless channels check in hw_params()Nicolin Chen2014-04-16
| | | | | | | | | | SAi only supports two data channels on hardware level and the driver also does register the min->1 and max->2, so no need to check channels. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Reviewed-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit d22e28cce80a93578787d273bf1fa26a2be2636b)
* ASoC: fsl_sai: Use snd_pcm_format_width()Nicolin Chen2014-04-16
| | | | | | | | | Use common helper function snd_pcm_format_width() to make code neater. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Reviewed-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit 1d7003092771bd2feec30e2f3e5a06aa33479e08)
* ASoC: fsl_sai: Keep symmetry for clk_enable() and clk_disable()Nicolin Chen2014-04-16
| | | | | | | | | | There are two functions haven't clk_disable_unprepare() if having error. Thus fix them. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Reviewed-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit 1fb2d9d7465bcbb519c582fa4a3bd04ff4fce2d2)
* ASoC: fsl-sai: Use snd_soc_dai_init_dma_data()Xiubo Li2014-04-16
| | | | | | | | | Makes the code slightly shorter Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit dd9f40602e96353c210805a99abd9af6abd28473) Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ASoC: fsl-sai: Use devm_snd_dmaengine_pcm_register()Xiubo Li2014-04-16
| | | | | | | | | Makes the code slightly shorter Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit e5180df3960b6130f17f3c5ab50d23674cdb2b5a) Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ASoC: fsl-sai: Remove fsl_sai_remove()Xiubo Li2014-04-16
| | | | | | | | | There is no need of this function and makes the code slightly shorter Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit a6af47ae5399baf4f5a2426b2121c1bcb9da4019) Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
* ASoC: Add SAI SoC Digital Audio Interface driver.Xiubo Li2014-04-16
This adds Freescale SAI ASoC Audio support. This implementation is only compatible with device tree definition. Features: o Supports playback/capture o Supports 16/20/24 bit PCM o Supports 8k - 96k sample rates o Supports master and slave mode. Signed-off-by: Alison Wang <b18965@freescale.com> Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit 4355082149429d1f87b6fbfc3ebc6305a5372ce2) Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Conflicts: sound/soc/fsl/Makefile
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-15 05:55:44 -0400