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The optimal resize ratio should be used if the downscaler is not needed. This
will fix a vertical line in the center for some scaling ratios.
Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
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This patch removes test mode clock setting in function
ipu_csi_init_interface(), since the setting is only
necessary for function _ipu_csi_set_test_generator().
This unnecessary setting is added wrongly by commit
f8e1a3bb62eecf93a31a51c4dbe08a0214fa1d57.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit 482c30821d0aad0ab500a9d5db95654917986a3c)
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We reversed CCIR code1/2 setting before, which may brings
captured frame quality issue(jaggy edge can be seen). This
patch revert that change.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit abdb4369f6ebcd90656b5fc319ee79eeb3bec7c5)
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When split mode deinterlacing is the ipu_calc_stripes_sizes() was failing due
to an unnecessary test. Added logic to use the maximal_stripe_width only if
the flag parameter has the bit 0 clear for not equal stripe sizes.
Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
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Kernel will dump when run deinterlace stress test.
It is caused by vditmpbuf being reallocated by another thread
when one thread accesses it.
Issue is fixed by putting these code in mutex.
Kernel dump log:
[Playing ][Vol=01][00:00:10/00:00:30][fps:32]Unable to handle kernel
paging request at virtual address 607d6085
pgd = 80004000
[607d6085] *pgd=00000000
Internal error: Oops: 5 [#1] SMP ARM
Modules linked in:
CPU: 0 PID: 50 Comm: ipu2_task Not tainted 3.10.17-02308-g3700819 #28
task: ac1dc700 ti: ac1ba000 task.ti: ac1ba000
PC is at __kmalloc+0x40/0x114
LR is at __kmalloc+0x14/0x114
pc : [<800bbd40>] lr : [<800bbd14>] psr: 200f0013
sp : ac1bbbc8 ip : 008cc000 fp : 00001e40
r10: ac772e00 r9 : 0057b255 r8 : 000000d0
r7 : 00000790 r6 : ac773800 r5 : 607d6085 r4 : ac001b00
r3 : 00000000 r2 : 814f92a0 r1 : 000000d0 r0 : 000398c9
Flags: nzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel
Control: 10c53c7d Table: 3c4c004a DAC: 00000015
Process ipu2_task (pid: 50, stack limit = 0xac1ba238)
Stack: (0xac1bbbc8 to 0xac1bc000)
Signed-off-by: Sandor Yu <R01008@freescale.com>
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__va function only can handle frame buffer from low memory.
Use page_address function to replace it, that can handle
frame buffer from both lower and high memory.
Use ioremap_nocache function to handle Frame buffer
from GPU reserve memory pool.
Correct vdi data save buffer size, save both luma and chroma part for
interleaved YUV format.
For non-interleaved and partial-interleaved YUV format,
save luma part data, chroma part is not covered in the patch.
Signed-off-by: Sandor Yu <R01008@freescale.com>
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The original IPUv3 driver uses readl()/writel() to
access the IPUv3 registers in the following way where
ipu->reg_base is a pointer which points to a 32 bit
I/O memory cell of a certain IPUv3 deblock's base address:
writel(value, ipu->reg_base + offset);
readl(ipu->reg_base + offset);
This makes the register offset values shrink 4 times,
comparing to the offset values documented in the
reference manual. For example, we need to change the
offset value from 0x003C to 0x003C/4 so that we may
access the register IPU_INT_CTRL_1 correctly.
This patch redefines the type of ipu->reg_base to
'void __iomem *', then the offset values can be the
same to what they are documented.
Also, this patch corrects some register relevant
macros by wrapping their arguments with parentheses
to avoid any unsafe decipher.
Reviewed-by: Robby Cai <R63905@freescale.com>
Cc: Oliver Brown <oliver.brown@freescale.com>
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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This patch removes two unused macros IPU_INT_CTRL_IRQ(irq)
and IPU_INT_STAT_IRQ(irq) to save two lines of code. The
existing another two macros IPUIRQ_2_STATREG(irq) and
IPUIRQ_2_CTRLREG(irq) are the surrogates for them.
Reviewed-by: Robby Cai <R63905@freescale.com>
Cc: Oliver Brown <oliver.brown@freescale.com>
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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Added additional check to handle stripe limits differently for upscaling
and downscaling. Upscaling requires relaxed checking because input stripe
may fall slighty outside of the input window. Downscaling requires strict
limit checking.
Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
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Changed alignement for planar formats back to 16 pixels.
Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
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Since the channel MEM_VDI_MEM doesn't use the PRP_VF task, this
patch removes the code to initialize the PRP_VF task for the
channel MEM_VDI_MEM. This change may fix the issue caused by
the unnesessary PRP_VF task output resolution limitation check.
The issue can be reproduced by the following unit test case:
mxc_vpu_test.out -D "-f 2 -y 2 -v m -i
1080i_shields1088i2997_shields_ter_4x300_15fps_track1.h264"
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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The downsizing ratio overflow check should cover every stripe
in the split mode. We need to do the overflow check correctly
by taking the width/height 8-pixel alignment requirement into
consideration since the alignment would be done when every
stripe is checked in it's own ipu task.
This patch takes a workaround for the issue which can be
reproduced by this unit test case:
==================================================================
mxc_v4l2_output.out -iw 1920 -ih 1080 -ow 200 -oh 200 -v 1
mxc_ipu mxc_ipu: ERR:create_split_child_task() ret:-22
mxc_ipu mxc_ipu: sp_task[0],no-0x12 fail state:-22, queue err:-22.
mxc_ipu mxc_ipu: ERR: [0xac73ea00] no-0x10,state 3: error
mxc_ipu mxc_ipu: ERR: no-0x10,ipu_queue_task err:-125
mxc_v4l2_output v4l2_out.35: display work fail ret = -125
mxc_ipu mxc_ipu: ERR:create_split_child_task() ret:-22
mxc_ipu mxc_ipu: sp_task[0],no-0x22 fail state:-22, queue err:-22.
mxc_ipu mxc_ipu: ERR: [0xac73ea00] no-0x20,state 3: error
mxc_ipu mxc_ipu: ERR: no-0x20,ipu_queue_task err:-125
mxc_v4l2_output v4l2_out.35: display work fail ret = -125
mxc_ipu mxc_ipu: ERR:create_split_child_task() ret:-22
mxc_ipu mxc_ipu: sp_task[0],no-0x32 fail state:-22, queue err:-22.
mxc_ipu mxc_ipu: ERR: [0xac63c400] no-0x30,state 3: error
mxc_ipu mxc_ipu: ERR: no-0x30,ipu_queue_task err:-125
mxc_v4l2_output v4l2_out.35: display work fail ret = -125
VIDIOC_QBUF failed -1
==================================================================
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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This patch fixes the following build warning by
initializing some local variables:
drivers/mxc/ipu3/ipu_calc_stripes_sizes.c: In function ‘ipu_calc_stripes_sizes’:
drivers/mxc/ipu3/ipu_calc_stripes_sizes.c:393:3: warning: ‘difwr’ may be used uninitialized in this function [-Wuninitialized]
drivers/mxc/ipu3/ipu_calc_stripes_sizes.c:393:3: warning: ‘onw’ may be used uninitialized in this function [-Wuninitialized]
drivers/mxc/ipu3/ipu_calc_stripes_sizes.c:393:3: warning: ‘inw’ may be used uninitialized in this function [-Wuninitialized]
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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The IPUv3 IDMAC has a bug to read 32bpp pixels from a
graphics plane whose alpha component is at the most
significant 8 bits. The bug only impacts on cases in which
the relevant separate alpha channel is enabled.
This patch adds check for the errata so that the bad
cases won't be triggered.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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When the ipu pixel clocks are initialized, the default pixel clock rate
will be calucated according to the present ipu register setting which
is likely set by a bootloader.
But these registers will be reset by the ipu reset function.
If the default pixel clock rate is the same to what is requested later,
the clk_set_rate function will treat this case as pixel clock unchanged.
Move the pixel clock setup function after the ipu reset function to
resolve this issue
Signed-off-by: Sandor Yu <R01008@freescale.com>
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In rotation cases, the width and height of IPUv3 IC scaling block's
output should align with the width and height of IPUv3 IC rotation
block. And, users only tell the IPUv3 device driver about the parameters
of scaling block's input and rotation block's output. So, we need to
swap the width and height of rotation block in cache before we do
downsize(a functionality of the scaling block) overflow check.
This patch fixes the issue which can be reproduced by this unit test case:
/unit_tests/mxc_v4l2_output.out -iw 128 -ih 128 -ow 176 -oh 10 -r 90
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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- Need to use different multiple and index parameters for vertical
and horizontal stripes
- Use correct multiple and index based upon pixel format
- Allow input crop and size to be larger than width by upto 16 pixels
Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
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For downscaling, it is possible that downscaler output is greater
than 1024. Added a function, calc_split_resize_coeffs, based upon
_calc_resize_coeffs to calculate resizing and downscaling coefficients.
In ipu_ic.c, checks for the range of *_resize_ratio are no longer needed.
Non split cases will always have *_resize_ratio of zero.
In ipu_device, additional checks are needed to check for an error from
ipu_calc_stripes_sizes if calc_split_resize_coeffs fails.
Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
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TV will show 639x480p60 when HDMI output 640x480p60.
The same issue can be found when pixel clock sources from ipu internally.
All video modes whose pixel clocks derive from DI clock work OK.
It is caused by the wrong parent clock rate the driver gets.
Fix the issue by getting the right parent clock(ipu->pixel_clk_sel).
Signed-off-by: Sandor Yu <R01008@freescale.com>
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This patch removes unnecessary memset() before kfree().
Also, it fixes a potential NULL pointer dereference(writing
to a freed block of memory).
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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This patch removes an unnesessary check before setting
task ID to simplify the code.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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This patch corrects the logic to set timeout value specified
by the users.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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IPUv3 IC task downsize scaling ratio cannot exceed or be
equal to 8:1. This patch makes the code return error code
if the ratio overflows.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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This patch improves IPU IC task scale check logic
so that we may return with error code if the calculation
for scale coefficients fails.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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This patch updates IPUv3 IC RGB to YUV color space conversion
matrix's parameters to align with the default VIV GPU CSC
implementation so that we may pass relevant Android CTS test
cases.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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Add request_bus_freq() and release_bus_freq() calls to the
various drivers to ensure that the DDR and AHB are the requested
frequency before the driver starts its task.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
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The ipu task thread checks outstanding tasks to be done on waiting
event uninterruptibly on the function find_task()'s return value.
However, sleeping on waiting event uninterruptibly contributes to
system load average value. This patch changes wait_event() to
wait_event_interruptible() to avoid the load average value inflation.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit ec9479ffc757eaefa9b8d4942c37e3634e15599c)
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This is a fast-forward porting of ipuv3 driver from 3.5.7 kernel to
kernel 3.10. The change set is kept as minimum as possible with only
making necessary code changes to adapt 3.10 kernel internal API and
framework updates. Everything else should be same as 3.5.7 one. The
change set consists of the following.
* Remove unused Kconfig options MXC_IPU_V3D, MXC_IPU_V3EX and
MXC_IPU_V3H
* Comment out busfreq calls
* Move ipu-v3.h into include/linux/, and remove all <mach/*> includes
* Drop __devinit and __devexit
* Remove assignment of pltfm_data->pg = imx6q_ipu_pg;
* Use generic device_reset() API rather than ipu_pltfm_data->init()
hook to reset IPU
* Includes <linux/sched/rt.h> ipu_device.c to fix undeclared
MAX_USER_RT_PRIO error
* Change compatible string to "fsl,imx6q-ipu" to align with community
kernel
* Define irq_sync before irq_err in DTS to align with community kernel
* Drop "ipu1_" and "ipu2_" from clock names to save the handling of the
second parameter of devm_clk_get()
* Remove the buggy csi_clk setup in ipu_clk_setup_enable() and validate
the clock before operate on it in ipu_csi_enable_mclk()
* Replace iram API (linux/iram_alloc.h) with generic memory pool API
(linux/genalloc.h) in VDOA driver
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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