| Commit message (Expand) | Author | Age |
* | drm/nv50: drop explicit yields in favour of smaller PFIFO timeslice | Ben Skeggs | 2011-02-24 |
* | drm/nv50: import new vm code | Ben Skeggs | 2010-12-07 |
* | drm/nouveau: make fifo.create_context() responsible for mapping control regs | Ben Skeggs | 2010-12-07 |
* | drm/nouveau: move PFIFO ISR into nv04_fifo.c | Ben Skeggs | 2010-12-03 |
* | drm/nouveau: Refactor context destruction to avoid a lock ordering issue. | Francisco Jerez | 2010-12-03 |
* | drm/nouveau: add more fine-grained locking to channel list + structures | Ben Skeggs | 2010-12-03 |
* | drm/nv50: implement possible workaround for NV86 PGRAPH TLB flush hang | Ben Skeggs | 2010-11-17 |
* | drm/nouveau: tidy ram{ht,fc,ro} a bit | Ben Skeggs | 2010-09-24 |
* | drm/nouveau: remove nouveau_gpuobj_ref completely, replace with sanity | Ben Skeggs | 2010-09-24 |
* | drm/nouveau: rebase per-channel pramin heap offsets to 0 | Ben Skeggs | 2010-09-24 |
* | drm/nouveau: modify object accessors, offset in bytes rather than dwords | Ben Skeggs | 2010-09-24 |
* | drm/nv50: fix RAMHT size | Ben Skeggs | 2010-07-12 |
* | drm/nv50: cleanup nv50_fifo.c | Ben Skeggs | 2010-07-12 |
* | drm/nouveau: add instmem flush() hook | Ben Skeggs | 2010-07-12 |
* | drm/nv50: switch to indirect push buffer controls | Ben Skeggs | 2010-02-25 |
* | drm/nouveau: protect channel create/destroy and irq handler with a spinlock | Maarten Maathuis | 2010-02-25 |
* | drm/nv50: delete ramfc object after disabling fifo, not before | Maarten Maathuis | 2010-02-09 |
* | drm/nv50: fix alignment of per-channel fifo cache | Ben Skeggs | 2010-01-17 |
* | drm/nv50: restore correct cache1 get/put address on fifoctx load | Ben Skeggs | 2010-01-10 |
* | drm/nv50: fix two potential suspend/resume oopses | Ben Skeggs | 2009-12-16 |
* | drm/nouveau: Add DRM driver for NVIDIA GPUs | Ben Skeggs | 2009-12-11 |