litmus-rt-imx6.git - LITMUS^RT and MC^2 V1 support for the i.MX6 processor family.

	Commit message (Expand)	Author	Age
*	sh: Mass ctrl_in/outX to __raw_read/writeX conversion.	Paul Mundt	2010-01-25
*	sh: Kill off the special uncached section and fixmap.	Paul Mundt	2010-01-21
*	sh: Split out MMUCR.URB based entry wiring in to shared helper.	Paul Mundt	2010-01-19
*	sh: New extended page flag to wire/unwire TLB entries	Matt Fleming	2010-01-16
*	Merge branch 'master' into sh/smp	Paul Mundt	2009-09-01
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\| *	sh: Better description of SH-4 PTEA register update.	Michael Trimarchi	2009-08-20
* \|	sh: Handle a NULL vma in __update_tlb() for the fast-path.	Paul Mundt	2009-07-29
* \|	sh: update_mmu_cache() consolidation.	Paul Mundt	2009-07-28
* \|	sh: Migrate from PG_mapped to PG_dcache_dirty.	Paul Mundt	2009-07-22
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*	sh: Preparation for uncached jumps through PMB.	Stuart Menefy	2008-01-27
*	sh: Fix up extended mode TLB for SH-X2+ cores.	Paul Mundt	2007-09-20
*	sh: Support explicit L1 cache disabling.	Paul Mundt	2007-09-20
*	sh: Revert lazy dcache writeback changes.	Paul Mundt	2007-03-05
*	sh: Local TLB flushing variants for SMP prep.	Paul Mundt	2007-02-12
*	sh: Lazy dcache writeback optimizations.	Paul Mundt	2007-02-12
*	sh: Add flag for MMU PTEA capability.	Paul Mundt	2006-09-27
*	sh: Support for SH7770/SH7780 CPU subtypes.	Paul Mundt	2006-09-27
*	Linux-2.6.12-rc2	Linus Torvalds	2005-04-16