litmus-rt-imx6.git - LITMUS^RT and MC^2 V1 support for the i.MX6 processor family.

	Commit message (Collapse)	Author	Age
*	mips/kvm: Use KVM_REG_MIPS and proper size indicators for *_ONE_REG	David Daney	2013-06-11
\| \| \| \| \| \| \| \|	The API requires that the GET_ONE_REG and SET_ONE_REG ioctls have this extra information encoded in the register identifiers. Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Gleb Natapov <gleb@redhat.com>
*	mips/kvm: Fix ABI by moving manipulation of CP0 registers to KVM_{G,S}ET_ONE_REG	David Daney	2013-06-03
\| \| \| \| \| \| \| \| \| \| \| \|	Because not all 256 CP0 registers are ever implemented, we need a different method of manipulating them. Use the KVM_SET_ONE_REG/KVM_GET_ONE_REG mechanism. Now unused code and definitions are removed. Signed-off-by: David Daney <david.daney@cavium.com> Acked-by: Sanjay Lal <sanjayl@kymasys.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
*	mips/kvm: Fix name of gpr field in struct kvm_regs.	David Daney	2013-06-03
\| \| \| \| \| \|	Signed-off-by: David Daney <david.daney@cavium.com> Acked-by: Sanjay Lal <sanjayl@kymasys.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
*	mips/kvm: Fix ABI for use of 64-bit registers.	David Daney	2013-06-03
\| \| \| \| \| \| \| \| \|	All registers are 64-bits wide, 32-bit guests use the least significant portion of the register storage fields. Signed-off-by: David Daney <david.daney@cavium.com> Acked-by: Sanjay Lal <sanjayl@kymasys.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
*	mips/kvm: Fix ABI for use of FPU.	David Daney	2013-06-03
\| \| \| \| \| \| \| \|	Define a non-empty struct kvm_fpu. Signed-off-by: David Daney <david.daney@cavium.com> Acked-by: Sanjay Lal <sanjayl@kymasys.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
*	KVM/MIPS32: Move include/asm/kvm.h => include/uapi/asm/kvm.h since it is a ↵	Sanjay Lal	2013-05-22
	user visible API. Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Signed-off-by: Gleb Natapov <gleb@redhat.com>