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LITMUS^RT and MC^2 V1 support for the i.MX6 processor family.
Namhoon Kim
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cache-l2x0.c
Commit message (
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Author
Age
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ARM: 6272/1: Convert L2x0 to use the IO relaxed operations
Catalin Marinas
2010-07-29
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ARM: 6210/1: Do not rely on reset defaults of L2X0_AUX_CTRL
Sascha Hauer
2010-07-09
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Merge branch 'devel-stable' into devel
Russell King
2010-05-17
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ARM: 5995/1: ARM: Add L2x0 outer_sync() support (3/4)
Catalin Marinas
2010-03-25
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ARM: 6094/1: Extend cache-l2x0 to support the 16-way PL310
Jason McMullan
2010-05-15
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ARM: 5919/1: ARM: L2 : Errata 588369: Clean & Invalidate do not invalidate cl...
Santosh Shilimkar
2010-02-15
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ARM: 5916/1: ARM: L2 : Add maintainace by line helper functions
Santosh Shilimkar
2010-02-15
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Merge branch 'pending-l2x0' into cache
Russell King
2009-12-14
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ARM: cache-l2x0: make better use of background cache handling
Russell King
2009-12-14
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ARM: cache-l2x0: avoid taking spinlock for every iteration
Russell King
2009-12-14
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ARM: 5845/1: l2x0: check whether l2x0 already enabled
Srinidhi Kasagar
2009-12-03
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[ARM] Convert asm/io.h to linux/io.h
Russell King
2008-09-06
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[ARM] 4568/1: fix l2x0 cache invalidate handling of unaligned addresses
Rui Sousa
2007-09-17
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[ARM] 4500/1: Add locking around the background L2x0 cache operations
Catalin Marinas
2007-07-20
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[ARM] 4135/1: Add support for the L210/L220 cache controllers
Catalin Marinas
2007-02-11