| Commit message (Collapse) | Author | Age |
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commit b6328a6b7ba57fc84c38248f6f0e387e1170f1a8 upstream.
Commit 4dcfa60071b3d23f0181f27d8519f12e37cefbb9 ("ARM: DMA-API: better
handing of DMA masks for coherent allocations") added an additional
check to the coherent DMA mask that results in an error when the mask is
larger than what dma_addr_t can address.
Set the LCDC coherent DMA mask to DMA_BIT_MASK(32) instead of ~0 to fix
the problem.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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commit dcd740b645003b866d7eb30d13d34d0729cce9db upstream.
Commit 4dcfa60071b3d23f0181f27d8519f12e37cefbb9 ("ARM: DMA-API: better
handing of DMA masks for coherent allocations") added an additional
check to the coherent DMA mask that results in an error when the mask is
larger than what dma_addr_t can address.
Set the LCDC coherent DMA mask to DMA_BIT_MASK(32) instead of ~0 to fix
the problem.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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commit 4f387323853c495ac589210832fad4503f75a0e7 upstream.
Commit 4dcfa60071b3d23f0181f27d8519f12e37cefbb9 ("ARM: DMA-API: better
handing of DMA masks for coherent allocations") added an additional
check to the coherent DMA mask that results in an error when the mask is
larger than what dma_addr_t can address.
Set the LCDC coherent DMA mask to DMA_BIT_MASK(32) instead of ~0 to fix
the problem.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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commit 1eb14ea1e6bcd11d6d0ba937fc39808bb4d3453e upstream.
Fix GIO3 base addresses for EMEV2.
This bug was introduced by 088efd9273b5076a0aead479aa31f1066d182b3e
("mach-shmobile: Emma Mobile EV2 GPIO support V3") which was included in v3.5.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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commit f820b60582f75e73e83b8505d7e48fe59770f558 upstream.
Fix base address and IRQ resources associated with SCIFB0.
This bug was introduced by e481a528901d0cd18b5b5fcbdc55207ea3b6ef68
("ARM: shmobile: r8a73a4 SCIF support V3") which was included in v3.10.
Signed-off-by: Takanari Hayama <taki@igel.co.jp>
Acked-by: Magnus Damm <damm@opensource.se>
[ horms+renesas@verge.net.au: Add information about commit and version
this bug was added in ]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes
From Simon Horman, Renesas ARM based SoC fixes for v3.10:
- Correction to USB OVC and PENC pin groupings on r8a7779 SoC.
This avoids conflicts when the USB_OVCn pins are used by another function.
This has been observed to be a problem in v3.10-rc1.
- Update CMT clock rating for sh73a0 SoC to resolve boot failure
on kzm9g-reference. This resolves a regression between v3.9 and v3.10-rc1.
* tag 'renesas-fixes-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: sh73a0: Update CMT clockevent rating to 80
sh-pfc: r8a7779: Don't group USB OVC and PENC pins
Signed-off-by: Olof Johansson <olof@lixom.net>
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Update the CMT clockevent rating from 125 to 80.
This resolves a boot-failure regression for kzm9g-reference in v3.10-rc1
introduced by f7db706b132f11c79ae1d74b2382e0926cf31644 ("ARM: 7674/1: smp:
Avoid dummy clockevent being preferred over real").
The patch noted above reduces the rating of dummy clockevent from 400 to 100.
This patch reduces the rating of CMT so that it is once again less than that
of the dummy clockevent.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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This patch updates the marzen board code as if USB PHY isn't enabled
they phy will have a value set by ERR_PTR() rather than be NULL.
Without this patch a NULL pointer dereference and kernel panic
occurs on initialisation of USB on marzen.
This resolves a regression introduced in 3.10-rc1 by
b7fa5c2aec5be083eb2719b405089703608e9bc6
("usb: phy: return -ENXIO when PHY layer isn't enabled").
Tested-by: Nguyen Hong Ky <nh-ky@jinso.co.jp>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC late cleanups from Arnd Bergmann:
"These are cleanups and smaller changes that either depend on earlier
feature branches or came in late during the development cycle. We
normally try to get all cleanups early, so these are the exceptions:
- A follow-up on the clocksource reworks, hopefully the last time we
need to merge clocksource subsystem changes through arm-soc.
A first set of patches was part of the original 3.10 arm-soc
cleanup series because of interdependencies with timer drivers now
moved out of arch/arm.
- Migrating the SPEAr13xx platform away from using auxdata for DMA
channel descriptions towards using information in device tree,
based on the earlier SPEAr multiplatform series
- A few follow-ups on the Atmel SAMA5 support and other changes for
Atmel at91 based on the larger at91 reworks.
- Moving the armada irqchip implementation to drivers/irqchip
- Several OMAP cleanups following up on the larger series already
merged in 3.10."
* tag 'cleanup-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (50 commits)
ARM: OMAP4: change the device names in usb_bind_phy
ARM: OMAP2+: Fix mismerge for timer.c between ff931c82 and da4a686a
ARM: SPEAr: conditionalize SMP code
ARM: arch_timer: Silence debug preempt warnings
ARM: OMAP: remove unused variable
serial: amba-pl011: fix !CONFIG_DMA_ENGINE case
ata: arasan: remove the need for platform_data
ARM: at91/sama5d34ek.dts: remove not needed compatibility string
ARM: at91: dts: add MCI DMA support
ARM: at91: dts: add i2c dma support
ARM: at91: dts: set #dma-cells to the correct value
ARM: at91: suspend both memory controllers on at91sam9263
irqchip: armada-370-xp: slightly cleanup irq controller driver
irqchip: armada-370-xp: move IRQ handler to avoid forward declaration
irqchip: move IRQ driver for Armada 370/XP
ARM: mvebu: move L2 cache initialization in init_early()
devtree: add binding documentation for sp804
ARM: integrator-cp: convert use CLKSRC_OF for timer init
ARM: versatile: use OF init for sp804 timer
ARM: versatile: add versatile dtbs to dtbs target
...
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git://sources.calxeda.com/kernel/linux into late/clksrc
This is the 2nd part of ARM timer clean-ups for 3.10. This series has
the following changes:
- Add sched_clock selection logic to select the highest frequency clock
- Use full 64-bit arch timer counter for sched_clock
- Convert arch timer, sp804 and integrator-cp timers to CLKSRC_OF and
adapt all users to use clocksource_of_init
* tag 'clksrc-cleanup-for-3.10-part2' of git://sources.calxeda.com/kernel/linux:
devtree: add binding documentation for sp804
ARM: integrator-cp: convert use CLKSRC_OF for timer init
ARM: versatile: use OF init for sp804 timer
ARM: versatile: add versatile dtbs to dtbs target
ARM: vexpress: remove extra timer-sp control register clearing
ARM: dts: vexpress: disable CA9 core tile sp804 timer
ARM: vexpress: remove sp804 OF init
ARM: highbank: use OF init for sp804 timer
ARM: timer-sp: convert to use CLKSRC_OF init
OF: add empty of_device_is_available for !OF
ARM: convert arm/arm64 arch timer to use CLKSRC_OF init
ARM: make machine_desc->init_time default to clocksource_of_init
ARM: arch_timer: use full 64-bit counter for sched_clock
ARM: make sched_clock just call a function pointer
ARM: sched_clock: allow changing to higher frequency counter
Signed-off-by: Olof Johansson <olof@lixom.net>
This has a nasty set of conflicts with the exynos MCT code, which was
moved in a separate branch, and then fixed up when merged in, but still
conflicts a bit here. It should have been sorted out by this merge though.
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This converts arm and arm64 to use CLKSRC_OF DT based initialization for
the arch timer. A new function arch_timer_arch_init is added to allow for
arch specific setup.
This has a side effect of enabling sched_clock on omap5 and exynos5. There
should not be any reason not to use the arch timers for sched_clock.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Simon Horman <horms@verge.net.au>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-samsung-soc@vger.kernel.org
Cc: linux-omap@vger.kernel.org
Cc: linux-sh@vger.kernel.org
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates (part 3) from Arnd Bergmann:
"This is the third and smallest of the SoC specific updates. Changes
include:
- SMP support for the Xilinx zynq platform
- Smaller imx changes
- LPAE support for mvebu
- Moving the orion5x, kirkwood, dove and mvebu platforms to a common
"mbus" driver for their internal devices.
It would be good to get feedback on the location of the "mbus" driver.
Since this is used on multiple platforms may potentially get shared
with other architectures (powerpc and arm64), it was moved to
drivers/bus/. We expect other similar drivers to get moved to the
same place in order to avoid creating more top-level directories under
drivers/ or cluttering up the messy drivers/misc/ even more."
* tag 'soc-for-linus-3' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (50 commits)
ARM: imx: reset_controller may be disabled
ARM: mvebu: Align the internal registers virtual base to support LPAE
ARM: mvebu: Limit the DMA zone when LPAE is selected
arm: plat-orion: remove addr-map code
arm: mach-mv78xx0: convert to use the mvebu-mbus driver
arm: mach-orion5x: convert to use mvebu-mbus driver
arm: mach-dove: convert to use mvebu-mbus driver
arm: mach-kirkwood: convert to use mvebu-mbus driver
arm: mach-mvebu: convert to use mvebu-mbus driver
ARM i.MX53: set CLK_SET_RATE_PARENT flag on the tve_ext_sel clock
ARM i.MX53: tve_di clock is not part of the CCM, but of TVE
ARM i.MX53: make tve_ext_sel propagate rate change to PLL
ARM i.MX53: Remove unused tve_gate clkdev entry
ARM i.MX5: Remove tve_sel clock from i.MX53 clock tree
ARM: i.MX5: Add PATA and SRTC clocks
ARM: imx: do not bring up unavailable cores
ARM: imx: add initial imx6dl support
ARM: imx1: mm: add call to mxc_device_init
ARM: imx_v4_v5_defconfig: Add CONFIG_GPIO_SYSFS
ARM: imx_v6_v7_defconfig: Select CONFIG_PERF_EVENTS
...
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc2
From Simon Horman:
Renesas ARM based r8a7790 SoC update for v3.10
* Force architecture timer to be activated regardless of bootloader
- This is necessary for the lager board to boot
* Add second memory range to r8a7790 PFC device
- This is in preparation for further PFC work.
It should not break anything as it is not used yet.
This pull request is based on:
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git renesas-soc2-for-v3.10
* tag 'renesas-soc-r8a7790-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: force enable of r8a7790 arch timer
ARM: shmobile: Add second I/O range for r8a7790 PFC
Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc2
From Simon Horman <horms+renesas@verge.net.au>:
Renesas ARM r8a7778 SoC update for v3.10
Update to the r8a7778 SoC:
* Add SH Ethernet support
* Add r8a7778_init_irq_extpin() to allow configuration of IRQ0 - IRQ3
- This is a requirement for SMSC ethernet support
* Cleanup: remove PLATFORM_INFO macro
This pull request is based on:
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-soc2-for-v3.10
* tag 'renesas-soc-r8a7778-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: R8A7778: add Ether support
ARM: shmobile: r8a7778: add r8a7778_init_irq_extpin()
ARM: shmobile: r8a7778: remove pointless PLATFORM_INFO()
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc2
From Simon Horman <horms+renesas@verge.net.au>:
Renesas ARM r8a7779 SoC update for v3.10
Update to the r8a7779 SoC:
* Add SH Ethernet support
* Add comment describing clock ratios
This pull request is based on:
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-soc2-for-v3.10
* tag 'renesas-soc-r8a7779-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: R8A7779: add Ether support
ARM: shmobile: r8a7779: add each clocks ratio on comment area
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Add Ether clock and platform device for R8A7779 SoC; add a function to register
this device with board-specific platform data.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Adding comment describing the r8a7779 clock frequencies depending on
MD pin settings.
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Both zynq and shmobile have conflicts against the gic cleanup
series, resolved here.
Conflicts:
arch/arm/mach-shmobile/smp-emev2.c
arch/arm/mach-shmobile/smp-r8a7779.c
arch/arm/mach-shmobile/smp-sh73a0.c
arch/arm/mach-zynq/platsmp.c
drivers/gpio/gpio-pl061.c
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates (part 2) from Arnd Bergmann:
"These patches are all for Renesas shmobile, and depend on the earlier
pinctrl updates. Remarkably, this adds support for three new SoCs:
r8a73a4, r8a73a4 and r8a7778. The bulk of the code added for these is
for pinctrl (using the new subsystem) and for clocks (not yet using
the common clock subsystem). The latter will have to get converted in
one of the upcoming releases, but shmobile is not ready for that yet.
The series also contains Renesas shmobile board changes, adding one
board file for each of the three new SoCs. These boards are using a
mix of classic and device-tree based probing, as there is still a lot
of infrastructure in shmobile that has not been converted to DT yet.
Once those are resolved to the degree that no board specific setup
code is needed, they can get folded into the respective SoC setup files."
* tag 'soc-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (78 commits)
ARM: shmobile: use r8a7790 timer setup code on Lager
ARM: shmobile: force enable of r8a7790 arch timer
ARM: shmobile: Add second I/O range for r8a7790 PFC
ARM: shmobile: bockw: enable network settings on bootargs
ARM: shmobile: bockw: add SMSC ethernet support
ARM: shmobile: R8A7778: add Ether support
ARM: shmobile: bockw: enable SMSC ethernet on defconfig
ARM: shmobile: r8a7778: add r8a7778_init_irq_extpin()
ARM: shmobile: r8a7778: remove pointless PLATFORM_INFO()
ARM: shmobile: mackerel: clean up MMCIF vs. SDHI1 selection
ARM: shmobile: mackerel: add interrupt names for SDHI0
ARM: shmobile: mackerel: switch SDHI and MMCIF interfaces to slot-gpio
ARM: shmobile: mackerel: remove OCR masks, where regulators are used
ARM: shmobile: mackerel: SDHI resources do not have to be numbered
ARM: shmobile: Initial r8a7790 Lager board support
ARM: shmobile: APE6EVM LAN9220 support
ARM: shmobile: APE6EVM PFC support
ARM: shmobile: APE6EVM base support
ARM: shmobile: kzm9g-reference: add ethernet support
ARM: shmobile: add R-Car M1A Bock-W platform support
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/boards2
From Simon Horman:
Renesas ARM based SoC lager board updates for v3.10
* Use r8a7790 timer setup code to force the
arch timer to be enabled regardless of the bootloader setting
- This is necessary for the lager board to boot
This pull request is based on:
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git renesas-boards3-for-v3.10
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git renesas-soc-r8a7790-for-v3.10
The merge was made to provide the r8a7790 timer setup code
* tag 'renesas-boards-lager-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: use r8a7790 timer setup code on Lager
ARM: shmobile: force enable of r8a7790 arch timer
ARM: shmobile: Add second I/O range for r8a7790 PFC
Signed-off-by: Olof Johansson <olof@lixom.net>
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Use the r8a7790 timer init function on Lager
to make sure the architected timer is started
regardless of boot loader setting.
Signed-off-by: Magnus Damm <damm@opensource.se>
Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Implement a SoC-specific timer init function for
r8a7790 that makes sure the architected timer
is started regardless of boot loader setting.
Signed-off-by: Magnus Damm <damm@opensource.se>
Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add the GPIO I/O memory range to the r8a7790 PFC device.
This extra I/O memory range is needed when using the PFC
tables to drive both pin functions (using PINCTRL or
function GPIO for old code) and actual GPIO. The goal is
however to use a separate GPIO driver in the long run
and when that happens this extra I/O memory range can
be removed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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This patch adds SMSC ethernet support on Bock-W
Bock-W SMSC needs FPGA settings which enables interrupt.
This patch does it on bockw_init() function.
As notes for future, this FPGA settings should be updated,
since this FPGA is using cascaded interrupt.
Current code is assuming that this FPGA interrupt user is only SMSC.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add Ether clock and platform device for R8A7778 SoC; add a function to register
this device with board-specific platform data.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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This patch adds r8a7778_init_irq_extpin() for IRQ0 - IRQ3.
But this patch doesn't enable DT settings on r8a7778.dts,
because R8A7778 chip external IRQ depends on
IRQ0 - IRQ3 pin encoding which came from platform board
implementation.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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remove pointless PLATFORM_INFO() macro from setup-r8a7778,
and, used original platform_device_register_xxx()
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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MMCIF and SDHI1 share the same slot on mackerel. One of them is selected
by a jumper, which cannot be queried from software. Currently in software
one of the two interfaces is selected, depending whether or not the MMCIF
driver is enabled. This is not optimal, since the kernel has to be rebuilt
to switch from one interface to another. Still, so far there isn't a
better option. At least make this selection consistent.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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To unify with SDHI1 also use named IRQs for SDHI0. This also clarifies
which specific IRQs are used.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Both SDHI and MMCIF drivers can use the standard slot-gpio card-detection
functions. Switch mackerel to using them instead of platform callbacks.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Both SDHI and MMCIF drivers ignore their OCR platform values, when
available voltages can be retrieved from regulators.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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The SDHI driver doesn't care about platform resource order, explicit
resource numbering is redundant.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Lager base board support making use of 2 GiB of memory,
the r8a7790 SoC with the SCIF0 serial port and CA15 with
ARM architected timer.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add LAN9220 support to the APE6EVM board using C and DT.
At this point the PFC driver lacks DT bindings so to
configure the PFC we use PINCTRL in C board code.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Start using the r8a73a4 PFC on the APE6EVM board
and configure the SCIFA0 console signals in the
PFC via PINCTRL.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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V3 of APE6EVM base board support making use of
1 GiB of memory, the SCIFA0 serial port and
ARM architected timer.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add basic Bock-W board support
More devices will be added on top of this patch after
PICNTRL and clock framework are in better shape.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Second round of Renesas ARM and SH based SoC pinmux updates for v3.10
Highlights:
* Compilation fixes for sh7269 and for when CONFIG_BUG is not set
* sh-pfc Support for r8a73a4 SoC
* Move GPIOs handling from the PFC device to separate GPIO devices on the r8a7779 SoC
This pull request is based on a merge of:
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-pinmux-for-v3.10
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-soc2-for-v3.10
This merge is made to supply run-time dependencies for the following
patches that will bea added on top:
ARM: shmobile: APE6EVM LAN9220 support
ARM: shmobile: APE6EVM PFC support
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Function GPIOs are not used anymore, and all code use the GPIO numbers
directly. Remove the GPIOs enumeration.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Remove IRQ pin function GPIOs that have been deprecated by the pinctrl
API.
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Remove SCIF function GPIOs that have been deprecated by the pinctrl API.
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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The r8a73a4 SoC has sparse GPIO numbers. Declare ranges for pin numbers
in the PFC SoC data. Pin numbers shall be used with the GPIO API from
this point on.
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add initial PFC support for the r8a73a4 SoC.
At this point only GPIO interface is supported, move to newer interfaces
planned as incremental changes.
Original authors are Morimoto-san with help from Yoshii-san, thanks to
them for the heavy lifting. Adjusted by Magnus to work together with
updated code in drivers/pinctrl.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Takashi Yoshii <takashi.yoshii.zj@renesas.com>
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Move GPIOs handling from the PFC device to separate GPIO devices.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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The board has 3 LEDs connected to GPIOs. Add a led-gpio device to
support them.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Function GPIOs are not used anymore, and all code use the GPIO numbers
directly. Remove the GPIOs enumeration.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Conflicts:
drivers/pinctrl/sh-pfc/pfc-r8a7740.c
This merge is to provide r8a73a4 SoC files, which are added in the
soc branch and depended on by r8a73a4 pfc-changes which are to
be added to the pinmux branch.
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Add a platform device for the r8a7790 PFC.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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