| Commit message (Expand) | Author | Age | |
|---|---|---|---|
| * | ENGR00317542-1 ARM:imx6x: Dynamically calculate the size of low power mode code. | Ranjani Vaidyanathan | 2014-06-12 |
| * | ENGR00309881 ARM:imx6: Disable L1 and L2 when DDR is in self-refresh. | Ranjani Vaidyanathan | 2014-05-16 |
| * | ENGR00297285-1 [MX6x] Support IRAM page table when DDR is in self-refresh | Ranjani Vaidyanathan | 2014-04-16 |
| * | ENGR00281017 [MX6SL]Low power IDLE mode optimizations | Ranjani Vaidyanathan | 2014-04-16 |
| * | ENGR00281036: [MX6SL]Align LPDDR2 freq change code to 8-byte boundary | Ranjani Vaidyanathan | 2014-04-16 |
| * | ENGR00280101-1 [iMX6SL] Add busfreq support | Ranjani Vaidyanathan | 2014-04-16 |
 |
index : litmus-rt-imx6.git | |
| LITMUS^RT and MC^2 V1 support for the i.MX6 processor family. | Namhoon Kim |
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