| Commit message (Expand) | Author | Age | |
|---|---|---|---|
| * | ARC: Brown paper bag bug in macro for checking cache color | Vineet Gupta | 2013-05-23 |
| * | ARC: [mm] Aliasing VIPT dcache support 2/4 | Vineet Gupta | 2013-05-09 |
| * | ARC: [mm] Aliasing VIPT dcache support 1/4 | Vineet Gupta | 2013-05-09 |
| * | ARC: [mm] Lazy D-cache flush (non aliasing VIPT) | Vineet Gupta | 2013-05-07 |
| * | ARC: [mm] optimise icache flush for user mappings | Vineet Gupta | 2013-05-07 |
| * | ARC: Respect the cpu_id passed for fetching correct cpu info | Noam Camus | 2013-05-07 |
| * | ARC: [build] Fix warnings with CONFIG_DEBUG_SECTION_MISMATCH | Vineet Gupta | 2013-04-09 |
| * | ARC: Boot #2: Verbose Boot reporting / feature verification | Vineet Gupta | 2013-02-15 |
| * | ARC: SMP support | Vineet Gupta | 2013-02-15 |
| * | ARC: TLB flush Handling | Vineet Gupta | 2013-02-15 |
| * | ARC: MMU Exception Handling | Vineet Gupta | 2013-02-15 |
| * | ARC: MMU Context Management | Vineet Gupta | 2013-02-15 |
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index : litmus-rt-imx6.git | |
| LITMUS^RT and MC^2 V1 support for the i.MX6 processor family. | Namhoon Kim |
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