litmus-rt-imx6.git - LITMUS^RT and MC^2 V1 support for the i.MX6 processor family.

	Commit message (Expand)	Author	Age
*	ARC: lazy dcache flush broke gdb in non-aliasing configs	Vineet Gupta	2013-05-25
*	ARC: [mm] Prevent stray dcache lines after__sync_icache_dcach()	Vineet Gupta	2013-05-23
*	ARC: [mm] Aliasing VIPT dcache support 3/4	Vineet Gupta	2013-05-09
*	ARC: [mm] Aliasing VIPT dcache support 2/4	Vineet Gupta	2013-05-09
*	ARC: [mm] Aliasing VIPT dcache support 1/4	Vineet Gupta	2013-05-09
*	ARC: [mm] refactor the core (i\|d)cache line ops loops	Vineet Gupta	2013-05-09
*	ARC: [mm] serious bug in vaddr based icache flush	Vineet Gupta	2013-05-09
*	ARC: [mm] Lazy D-cache flush (non aliasing VIPT)	Vineet Gupta	2013-05-07
*	ARC: [mm] micro-optimize page size icache invalidate	Vineet Gupta	2013-05-07
*	ARC: [mm] remove the pessimistic all-alias-invalidate icache helpers	Vineet Gupta	2013-05-07
*	ARC: [mm] consolidate icache/dcache sync code	Vineet Gupta	2013-05-07
*	ARC: [mm] optimise icache flush for kernel mappings	Vineet Gupta	2013-05-07
*	ARC: [mm] optimise icache flush for user mappings	Vineet Gupta	2013-05-07
*	ARC: [build] Fix warnings with CONFIG_DEBUG_SECTION_MISMATCH	Vineet Gupta	2013-04-09
*	ARC: Don't fiddle with non-existent caches	Vineet Gupta	2013-02-15
*	ARC: Boot #2: Verbose Boot reporting / feature verification	Vineet Gupta	2013-02-15
*	ARC: Cache Flush Management	Vineet Gupta	2013-02-15