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-rw-r--r--include/linux/Kbuild1
-rw-r--r--include/linux/caif/caif_socket.h5
-rw-r--r--include/linux/dcbnl.h2
-rw-r--r--include/linux/fib_rules.h8
-rw-r--r--include/linux/filter.h3
-rw-r--r--include/linux/firewire-cdev.h78
-rw-r--r--include/linux/firewire-constants.h29
-rw-r--r--include/linux/fs.h12
-rw-r--r--include/linux/ieee80211.h1
-rw-r--r--include/linux/if.h2
-rw-r--r--include/linux/if_tun.h2
-rw-r--r--include/linux/if_x25.h26
-rw-r--r--include/linux/in6.h5
-rw-r--r--include/linux/input/matrix_keypad.h2
-rw-r--r--include/linux/ipv6.h16
-rw-r--r--include/linux/ks8842.h34
-rw-r--r--include/linux/net.h14
-rw-r--r--include/linux/netdevice.h27
-rw-r--r--include/linux/netpoll.h13
-rw-r--r--include/linux/nfs_fs_sb.h1
-rw-r--r--include/linux/nl80211.h5
-rw-r--r--include/linux/notifier.h1
-rw-r--r--include/linux/pci_regs.h3
-rw-r--r--include/linux/rculist.h29
-rw-r--r--include/linux/rcupdate.h65
-rw-r--r--include/linux/rtnetlink.h6
-rw-r--r--include/linux/skbuff.h21
-rw-r--r--include/linux/spi/wl12xx.h2
-rw-r--r--include/linux/ssb/ssb.h4
-rw-r--r--include/linux/ssb/ssb_driver_chipcommon.h15
-rw-r--r--include/linux/ssb/ssb_regs.h239
31 files changed, 467 insertions, 204 deletions
diff --git a/include/linux/Kbuild b/include/linux/Kbuild
index e2ea0b2159cd..2fc8e14cc24a 100644
--- a/include/linux/Kbuild
+++ b/include/linux/Kbuild
@@ -94,6 +94,7 @@ header-y += if_ppp.h
94header-y += if_slip.h 94header-y += if_slip.h
95header-y += if_strip.h 95header-y += if_strip.h
96header-y += if_tun.h 96header-y += if_tun.h
97header-y += if_x25.h
97header-y += in_route.h 98header-y += in_route.h
98header-y += ioctl.h 99header-y += ioctl.h
99header-y += ip6_tunnel.h 100header-y += ip6_tunnel.h
diff --git a/include/linux/caif/caif_socket.h b/include/linux/caif/caif_socket.h
index 8e5c8444a3f4..2a61eb1beb85 100644
--- a/include/linux/caif/caif_socket.h
+++ b/include/linux/caif/caif_socket.h
@@ -16,7 +16,6 @@
16#include <sys/socket.h> 16#include <sys/socket.h>
17#endif 17#endif
18 18
19
20/** 19/**
21 * enum caif_link_selector - Physical Link Selection. 20 * enum caif_link_selector - Physical Link Selection.
22 * @CAIF_LINK_HIGH_BANDW: Physical interface for high-bandwidth 21 * @CAIF_LINK_HIGH_BANDW: Physical interface for high-bandwidth
@@ -59,7 +58,7 @@ enum caif_channel_priority {
59/** 58/**
60 * enum caif_protocol_type - CAIF Channel type. 59 * enum caif_protocol_type - CAIF Channel type.
61 * @CAIFPROTO_AT: Classic AT channel. 60 * @CAIFPROTO_AT: Classic AT channel.
62 * @CAIFPROTO_DATAGRAM: Datagram channel. 61 * @CAIFPROTO_DATAGRAM: Datagram channel.
63 * @CAIFPROTO_DATAGRAM_LOOP: Datagram loopback channel, used for testing. 62 * @CAIFPROTO_DATAGRAM_LOOP: Datagram loopback channel, used for testing.
64 * @CAIFPROTO_UTIL: Utility (Psock) channel. 63 * @CAIFPROTO_UTIL: Utility (Psock) channel.
65 * @CAIFPROTO_RFM: Remote File Manager 64 * @CAIFPROTO_RFM: Remote File Manager
@@ -87,6 +86,7 @@ enum caif_at_type {
87 86
88/** 87/**
89 * struct sockaddr_caif - the sockaddr structure for CAIF sockets. 88 * struct sockaddr_caif - the sockaddr structure for CAIF sockets.
89 * @family: Address family number, must be AF_CAIF.
90 * @u: Union of address data 'switched' by family. 90 * @u: Union of address data 'switched' by family.
91 * : 91 * :
92 * @u.at: Applies when family = CAIFPROTO_AT. 92 * @u.at: Applies when family = CAIFPROTO_AT.
@@ -153,6 +153,7 @@ struct sockaddr_caif {
153 * 153 *
154 * 154 *
155 * This enum defines the CAIF Socket options to be used on a socket 155 * This enum defines the CAIF Socket options to be used on a socket
156 * of type PF_CAIF.
156 * 157 *
157 */ 158 */
158enum caif_socket_opts { 159enum caif_socket_opts {
diff --git a/include/linux/dcbnl.h b/include/linux/dcbnl.h
index b7cdbb4373df..8723491f7dfd 100644
--- a/include/linux/dcbnl.h
+++ b/include/linux/dcbnl.h
@@ -22,8 +22,6 @@
22 22
23#include <linux/types.h> 23#include <linux/types.h>
24 24
25#define DCB_PROTO_VERSION 1
26
27struct dcbmsg { 25struct dcbmsg {
28 __u8 dcb_family; 26 __u8 dcb_family;
29 __u8 cmd; 27 __u8 cmd;
diff --git a/include/linux/fib_rules.h b/include/linux/fib_rules.h
index 04a397619ebe..51da65b68b85 100644
--- a/include/linux/fib_rules.h
+++ b/include/linux/fib_rules.h
@@ -15,14 +15,6 @@
15/* try to find source address in routing lookups */ 15/* try to find source address in routing lookups */
16#define FIB_RULE_FIND_SADDR 0x00010000 16#define FIB_RULE_FIND_SADDR 0x00010000
17 17
18/* fib_rules families. values up to 127 are reserved for real address
19 * families, values above 128 may be used arbitrarily.
20 */
21#define FIB_RULES_IPV4 AF_INET
22#define FIB_RULES_IPV6 AF_INET6
23#define FIB_RULES_DECNET AF_DECnet
24#define FIB_RULES_IPMR 128
25
26struct fib_rule_hdr { 18struct fib_rule_hdr {
27 __u8 family; 19 __u8 family;
28 __u8 dst_len; 20 __u8 dst_len;
diff --git a/include/linux/filter.h b/include/linux/filter.h
index 29a0e3db9f43..151f5d703b7e 100644
--- a/include/linux/filter.h
+++ b/include/linux/filter.h
@@ -123,7 +123,8 @@ struct sock_fprog { /* Required for SO_ATTACH_FILTER. */
123#define SKF_AD_NLATTR_NEST 16 123#define SKF_AD_NLATTR_NEST 16
124#define SKF_AD_MARK 20 124#define SKF_AD_MARK 20
125#define SKF_AD_QUEUE 24 125#define SKF_AD_QUEUE 24
126#define SKF_AD_MAX 28 126#define SKF_AD_HATYPE 28
127#define SKF_AD_MAX 32
127#define SKF_NET_OFF (-0x100000) 128#define SKF_NET_OFF (-0x100000)
128#define SKF_LL_OFF (-0x200000) 129#define SKF_LL_OFF (-0x200000)
129 130
diff --git a/include/linux/firewire-cdev.h b/include/linux/firewire-cdev.h
index 40b11013408e..81f3b14d5d76 100644
--- a/include/linux/firewire-cdev.h
+++ b/include/linux/firewire-cdev.h
@@ -1,21 +1,26 @@
1/* 1/*
2 * Char device interface. 2 * Char device interface.
3 * 3 *
4 * Copyright (C) 2005-2006 Kristian Hoegsberg <krh@bitplanet.net> 4 * Copyright (C) 2005-2007 Kristian Hoegsberg <krh@bitplanet.net>
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * it under the terms of the GNU General Public License as published by 7 * copy of this software and associated documentation files (the "Software"),
8 * the Free Software Foundation; either version 2 of the License, or 8 * to deal in the Software without restriction, including without limitation
9 * (at your option) any later version. 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * 10 * and/or sell copies of the Software, and to permit persons to whom the
11 * This program is distributed in the hope that it will be useful, 11 * Software is furnished to do so, subject to the following conditions:
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * The above copyright notice and this permission notice (including the next
14 * GNU General Public License for more details. 14 * paragraph) shall be included in all copies or substantial portions of the
15 * 15 * Software.
16 * You should have received a copy of the GNU General Public License 16 *
17 * along with this program; if not, write to the Free Software Foundation, 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
21 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
22 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
19 */ 24 */
20 25
21#ifndef _LINUX_FIREWIRE_CDEV_H 26#ifndef _LINUX_FIREWIRE_CDEV_H
@@ -438,7 +443,7 @@ struct fw_cdev_remove_descriptor {
438 * @type: %FW_CDEV_ISO_CONTEXT_TRANSMIT or %FW_CDEV_ISO_CONTEXT_RECEIVE 443 * @type: %FW_CDEV_ISO_CONTEXT_TRANSMIT or %FW_CDEV_ISO_CONTEXT_RECEIVE
439 * @header_size: Header size to strip for receive contexts 444 * @header_size: Header size to strip for receive contexts
440 * @channel: Channel to bind to 445 * @channel: Channel to bind to
441 * @speed: Speed to transmit at 446 * @speed: Speed for transmit contexts
442 * @closure: To be returned in &fw_cdev_event_iso_interrupt 447 * @closure: To be returned in &fw_cdev_event_iso_interrupt
443 * @handle: Handle to context, written back by kernel 448 * @handle: Handle to context, written back by kernel
444 * 449 *
@@ -451,6 +456,9 @@ struct fw_cdev_remove_descriptor {
451 * If a context was successfully created, the kernel writes back a handle to the 456 * If a context was successfully created, the kernel writes back a handle to the
452 * context, which must be passed in for subsequent operations on that context. 457 * context, which must be passed in for subsequent operations on that context.
453 * 458 *
459 * For receive contexts, @header_size must be at least 4 and must be a multiple
460 * of 4.
461 *
454 * Note that the effect of a @header_size > 4 depends on 462 * Note that the effect of a @header_size > 4 depends on
455 * &fw_cdev_get_info.version, as documented at &fw_cdev_event_iso_interrupt. 463 * &fw_cdev_get_info.version, as documented at &fw_cdev_event_iso_interrupt.
456 */ 464 */
@@ -481,10 +489,34 @@ struct fw_cdev_create_iso_context {
481 * 489 *
482 * &struct fw_cdev_iso_packet is used to describe isochronous packet queues. 490 * &struct fw_cdev_iso_packet is used to describe isochronous packet queues.
483 * 491 *
484 * Use the FW_CDEV_ISO_ macros to fill in @control. The sy and tag fields are 492 * Use the FW_CDEV_ISO_ macros to fill in @control.
485 * specified by IEEE 1394a and IEC 61883. 493 *
486 * 494 * For transmit packets, the header length must be a multiple of 4 and specifies
487 * FIXME - finish this documentation 495 * the numbers of bytes in @header that will be prepended to the packet's
496 * payload; these bytes are copied into the kernel and will not be accessed
497 * after the ioctl has returned. The sy and tag fields are copied to the iso
498 * packet header (these fields are specified by IEEE 1394a and IEC 61883-1).
499 * The skip flag specifies that no packet is to be sent in a frame; when using
500 * this, all other fields except the interrupt flag must be zero.
501 *
502 * For receive packets, the header length must be a multiple of the context's
503 * header size; if the header length is larger than the context's header size,
504 * multiple packets are queued for this entry. The sy and tag fields are
505 * ignored. If the sync flag is set, the context drops all packets until
506 * a packet with a matching sy field is received (the sync value to wait for is
507 * specified in the &fw_cdev_start_iso structure). The payload length defines
508 * how many payload bytes can be received for one packet (in addition to payload
509 * quadlets that have been defined as headers and are stripped and returned in
510 * the &fw_cdev_event_iso_interrupt structure). If more bytes are received, the
511 * additional bytes are dropped. If less bytes are received, the remaining
512 * bytes in this part of the payload buffer will not be written to, not even by
513 * the next packet, i.e., packets received in consecutive frames will not
514 * necessarily be consecutive in memory. If an entry has queued multiple
515 * packets, the payload length is divided equally among them.
516 *
517 * When a packet with the interrupt flag set has been completed, the
518 * &fw_cdev_event_iso_interrupt event will be sent. An entry that has queued
519 * multiple receive packets is completed when its last packet is completed.
488 */ 520 */
489struct fw_cdev_iso_packet { 521struct fw_cdev_iso_packet {
490 __u32 control; 522 __u32 control;
@@ -501,7 +533,7 @@ struct fw_cdev_iso_packet {
501 * Queue a number of isochronous packets for reception or transmission. 533 * Queue a number of isochronous packets for reception or transmission.
502 * This ioctl takes a pointer to an array of &fw_cdev_iso_packet structs, 534 * This ioctl takes a pointer to an array of &fw_cdev_iso_packet structs,
503 * which describe how to transmit from or receive into a contiguous region 535 * which describe how to transmit from or receive into a contiguous region
504 * of a mmap()'ed payload buffer. As part of the packet descriptors, 536 * of a mmap()'ed payload buffer. As part of transmit packet descriptors,
505 * a series of headers can be supplied, which will be prepended to the 537 * a series of headers can be supplied, which will be prepended to the
506 * payload during DMA. 538 * payload during DMA.
507 * 539 *
@@ -620,8 +652,8 @@ struct fw_cdev_get_cycle_timer2 {
620 * instead of allocated. 652 * instead of allocated.
621 * An %FW_CDEV_EVENT_ISO_RESOURCE_DEALLOCATED event concludes this operation. 653 * An %FW_CDEV_EVENT_ISO_RESOURCE_DEALLOCATED event concludes this operation.
622 * 654 *
623 * To summarize, %FW_CDEV_IOC_DEALLOCATE_ISO_RESOURCE allocates iso resources 655 * To summarize, %FW_CDEV_IOC_ALLOCATE_ISO_RESOURCE allocates iso resources
624 * for the lifetime of the fd or handle. 656 * for the lifetime of the fd or @handle.
625 * In contrast, %FW_CDEV_IOC_ALLOCATE_ISO_RESOURCE_ONCE allocates iso resources 657 * In contrast, %FW_CDEV_IOC_ALLOCATE_ISO_RESOURCE_ONCE allocates iso resources
626 * for the duration of a bus generation. 658 * for the duration of a bus generation.
627 * 659 *
diff --git a/include/linux/firewire-constants.h b/include/linux/firewire-constants.h
index b316770a43fd..9c63f06e67f2 100644
--- a/include/linux/firewire-constants.h
+++ b/include/linux/firewire-constants.h
@@ -1,3 +1,28 @@
1/*
2 * IEEE 1394 constants.
3 *
4 * Copyright (C) 2005-2007 Kristian Hoegsberg <krh@bitplanet.net>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
21 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
22 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 */
25
1#ifndef _LINUX_FIREWIRE_CONSTANTS_H 26#ifndef _LINUX_FIREWIRE_CONSTANTS_H
2#define _LINUX_FIREWIRE_CONSTANTS_H 27#define _LINUX_FIREWIRE_CONSTANTS_H
3 28
@@ -21,7 +46,7 @@
21#define EXTCODE_WRAP_ADD 0x6 46#define EXTCODE_WRAP_ADD 0x6
22#define EXTCODE_VENDOR_DEPENDENT 0x7 47#define EXTCODE_VENDOR_DEPENDENT 0x7
23 48
24/* Juju specific tcodes */ 49/* Linux firewire-core (Juju) specific tcodes */
25#define TCODE_LOCK_MASK_SWAP (0x10 | EXTCODE_MASK_SWAP) 50#define TCODE_LOCK_MASK_SWAP (0x10 | EXTCODE_MASK_SWAP)
26#define TCODE_LOCK_COMPARE_SWAP (0x10 | EXTCODE_COMPARE_SWAP) 51#define TCODE_LOCK_COMPARE_SWAP (0x10 | EXTCODE_COMPARE_SWAP)
27#define TCODE_LOCK_FETCH_ADD (0x10 | EXTCODE_FETCH_ADD) 52#define TCODE_LOCK_FETCH_ADD (0x10 | EXTCODE_FETCH_ADD)
@@ -36,7 +61,7 @@
36#define RCODE_TYPE_ERROR 0x6 61#define RCODE_TYPE_ERROR 0x6
37#define RCODE_ADDRESS_ERROR 0x7 62#define RCODE_ADDRESS_ERROR 0x7
38 63
39/* Juju specific rcodes */ 64/* Linux firewire-core (Juju) specific rcodes */
40#define RCODE_SEND_ERROR 0x10 65#define RCODE_SEND_ERROR 0x10
41#define RCODE_CANCELLED 0x11 66#define RCODE_CANCELLED 0x11
42#define RCODE_BUSY 0x12 67#define RCODE_BUSY 0x12
diff --git a/include/linux/fs.h b/include/linux/fs.h
index 39d57bc6cc71..018d382f6f92 100644
--- a/include/linux/fs.h
+++ b/include/linux/fs.h
@@ -1280,10 +1280,12 @@ static inline int lock_may_write(struct inode *inode, loff_t start,
1280 1280
1281 1281
1282struct fasync_struct { 1282struct fasync_struct {
1283 int magic; 1283 spinlock_t fa_lock;
1284 int fa_fd; 1284 int magic;
1285 struct fasync_struct *fa_next; /* singly linked list */ 1285 int fa_fd;
1286 struct file *fa_file; 1286 struct fasync_struct *fa_next; /* singly linked list */
1287 struct file *fa_file;
1288 struct rcu_head fa_rcu;
1287}; 1289};
1288 1290
1289#define FASYNC_MAGIC 0x4601 1291#define FASYNC_MAGIC 0x4601
@@ -1292,8 +1294,6 @@ struct fasync_struct {
1292extern int fasync_helper(int, struct file *, int, struct fasync_struct **); 1294extern int fasync_helper(int, struct file *, int, struct fasync_struct **);
1293/* can be called from interrupts */ 1295/* can be called from interrupts */
1294extern void kill_fasync(struct fasync_struct **, int, int); 1296extern void kill_fasync(struct fasync_struct **, int, int);
1295/* only for net: no internal synchronization */
1296extern void __kill_fasync(struct fasync_struct *, int, int);
1297 1297
1298extern int __f_setown(struct file *filp, struct pid *, enum pid_type, int force); 1298extern int __f_setown(struct file *filp, struct pid *, enum pid_type, int force);
1299extern int f_setown(struct file *filp, unsigned long arg, int force); 1299extern int f_setown(struct file *filp, unsigned long arg, int force);
diff --git a/include/linux/ieee80211.h b/include/linux/ieee80211.h
index 1252ba1fbff5..97b2eae6a22c 100644
--- a/include/linux/ieee80211.h
+++ b/include/linux/ieee80211.h
@@ -876,6 +876,7 @@ struct ieee80211_ht_cap {
876#define IEEE80211_HT_CAP_SGI_40 0x0040 876#define IEEE80211_HT_CAP_SGI_40 0x0040
877#define IEEE80211_HT_CAP_TX_STBC 0x0080 877#define IEEE80211_HT_CAP_TX_STBC 0x0080
878#define IEEE80211_HT_CAP_RX_STBC 0x0300 878#define IEEE80211_HT_CAP_RX_STBC 0x0300
879#define IEEE80211_HT_CAP_RX_STBC_SHIFT 8
879#define IEEE80211_HT_CAP_DELAY_BA 0x0400 880#define IEEE80211_HT_CAP_DELAY_BA 0x0400
880#define IEEE80211_HT_CAP_MAX_AMSDU 0x0800 881#define IEEE80211_HT_CAP_MAX_AMSDU 0x0800
881#define IEEE80211_HT_CAP_DSSSCCK40 0x1000 882#define IEEE80211_HT_CAP_DSSSCCK40 0x1000
diff --git a/include/linux/if.h b/include/linux/if.h
index 3a9f410a296b..be350e62a905 100644
--- a/include/linux/if.h
+++ b/include/linux/if.h
@@ -71,6 +71,8 @@
71 * release skb->dst 71 * release skb->dst
72 */ 72 */
73#define IFF_DONT_BRIDGE 0x800 /* disallow bridging this ether dev */ 73#define IFF_DONT_BRIDGE 0x800 /* disallow bridging this ether dev */
74#define IFF_IN_NETPOLL 0x1000 /* whether we are processing netpoll */
75#define IFF_DISABLE_NETPOLL 0x2000 /* disable netpoll at run-time */
74 76
75#define IF_GET_IFACE 0x0001 /* for querying only */ 77#define IF_GET_IFACE 0x0001 /* for querying only */
76#define IF_GET_PROTO 0x0002 78#define IF_GET_PROTO 0x0002
diff --git a/include/linux/if_tun.h b/include/linux/if_tun.h
index 1350a246893a..06b1829731fd 100644
--- a/include/linux/if_tun.h
+++ b/include/linux/if_tun.h
@@ -51,6 +51,8 @@
51#define TUNSETSNDBUF _IOW('T', 212, int) 51#define TUNSETSNDBUF _IOW('T', 212, int)
52#define TUNATTACHFILTER _IOW('T', 213, struct sock_fprog) 52#define TUNATTACHFILTER _IOW('T', 213, struct sock_fprog)
53#define TUNDETACHFILTER _IOW('T', 214, struct sock_fprog) 53#define TUNDETACHFILTER _IOW('T', 214, struct sock_fprog)
54#define TUNGETVNETHDRSZ _IOR('T', 215, int)
55#define TUNSETVNETHDRSZ _IOW('T', 216, int)
54 56
55/* TUNSETIFF ifr flags */ 57/* TUNSETIFF ifr flags */
56#define IFF_TUN 0x0001 58#define IFF_TUN 0x0001
diff --git a/include/linux/if_x25.h b/include/linux/if_x25.h
new file mode 100644
index 000000000000..897765f5feb8
--- /dev/null
+++ b/include/linux/if_x25.h
@@ -0,0 +1,26 @@
1/*
2 * Linux X.25 packet to device interface
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#ifndef _IF_X25_H
16#define _IF_X25_H
17
18#include <linux/types.h>
19
20/* Documentation/networking/x25-iface.txt */
21#define X25_IFACE_DATA 0x00
22#define X25_IFACE_CONNECT 0x01
23#define X25_IFACE_DISCONNECT 0x02
24#define X25_IFACE_PARAMS 0x03
25
26#endif /* _IF_X25_H */
diff --git a/include/linux/in6.h b/include/linux/in6.h
index bd55c6e46b2e..c4bf46f764bf 100644
--- a/include/linux/in6.h
+++ b/include/linux/in6.h
@@ -221,10 +221,10 @@ struct in6_flowlabel_req {
221#define IPV6_RTHDR 57 221#define IPV6_RTHDR 57
222#define IPV6_RECVDSTOPTS 58 222#define IPV6_RECVDSTOPTS 58
223#define IPV6_DSTOPTS 59 223#define IPV6_DSTOPTS 59
224#if 0 /* not yet */
225#define IPV6_RECVPATHMTU 60 224#define IPV6_RECVPATHMTU 60
226#define IPV6_PATHMTU 61 225#define IPV6_PATHMTU 61
227#define IPV6_DONTFRAG 62 226#define IPV6_DONTFRAG 62
227#if 0 /* not yet */
228#define IPV6_USE_MIN_MTU 63 228#define IPV6_USE_MIN_MTU 63
229#endif 229#endif
230 230
@@ -265,6 +265,9 @@ struct in6_flowlabel_req {
265#define IPV6_PREFER_SRC_CGA 0x0008 265#define IPV6_PREFER_SRC_CGA 0x0008
266#define IPV6_PREFER_SRC_NONCGA 0x0800 266#define IPV6_PREFER_SRC_NONCGA 0x0800
267 267
268/* RFC5082: Generalized Ttl Security Mechanism */
269#define IPV6_MINHOPCOUNT 73
270
268/* 271/*
269 * Multicast Routing: 272 * Multicast Routing:
270 * see include/linux/mroute6.h. 273 * see include/linux/mroute6.h.
diff --git a/include/linux/input/matrix_keypad.h b/include/linux/input/matrix_keypad.h
index 3bd018baae20..c964cd7f436a 100644
--- a/include/linux/input/matrix_keypad.h
+++ b/include/linux/input/matrix_keypad.h
@@ -44,6 +44,7 @@ struct matrix_keymap_data {
44 * @active_low: gpio polarity 44 * @active_low: gpio polarity
45 * @wakeup: controls whether the device should be set up as wakeup 45 * @wakeup: controls whether the device should be set up as wakeup
46 * source 46 * source
47 * @no_autorepeat: disable key autorepeat
47 * 48 *
48 * This structure represents platform-specific data that use used by 49 * This structure represents platform-specific data that use used by
49 * matrix_keypad driver to perform proper initialization. 50 * matrix_keypad driver to perform proper initialization.
@@ -64,6 +65,7 @@ struct matrix_keypad_platform_data {
64 65
65 bool active_low; 66 bool active_low;
66 bool wakeup; 67 bool wakeup;
68 bool no_autorepeat;
67}; 69};
68 70
69/** 71/**
diff --git a/include/linux/ipv6.h b/include/linux/ipv6.h
index 7bdf6ffe2b49..0e269038bb38 100644
--- a/include/linux/ipv6.h
+++ b/include/linux/ipv6.h
@@ -21,6 +21,10 @@ struct in6_pktinfo {
21 int ipi6_ifindex; 21 int ipi6_ifindex;
22}; 22};
23 23
24struct ip6_mtuinfo {
25 struct sockaddr_in6 ip6m_addr;
26 __u32 ip6m_mtu;
27};
24 28
25struct in6_ifreq { 29struct in6_ifreq {
26 struct in6_addr ifr6_addr; 30 struct in6_addr ifr6_addr;
@@ -254,6 +258,7 @@ struct inet6_skb_parm {
254}; 258};
255 259
256#define IP6CB(skb) ((struct inet6_skb_parm*)((skb)->cb)) 260#define IP6CB(skb) ((struct inet6_skb_parm*)((skb)->cb))
261#define IP6CBMTU(skb) ((struct ip6_mtuinfo *)((skb)->cb))
257 262
258static inline int inet6_iif(const struct sk_buff *skb) 263static inline int inet6_iif(const struct sk_buff *skb)
259{ 264{
@@ -335,21 +340,25 @@ struct ipv6_pinfo {
335 dstopts:1, 340 dstopts:1,
336 odstopts:1, 341 odstopts:1,
337 rxflow:1, 342 rxflow:1,
338 rxtclass:1; 343 rxtclass:1,
344 rxpmtu:1;
339 } bits; 345 } bits;
340 __u16 all; 346 __u16 all;
341 } rxopt; 347 } rxopt;
342 348
343 /* sockopt flags */ 349 /* sockopt flags */
344 __u8 recverr:1, 350 __u16 recverr:1,
345 sndflow:1, 351 sndflow:1,
346 pmtudisc:2, 352 pmtudisc:2,
347 ipv6only:1, 353 ipv6only:1,
348 srcprefs:3; /* 001: prefer temporary address 354 srcprefs:3, /* 001: prefer temporary address
349 * 010: prefer public address 355 * 010: prefer public address
350 * 100: prefer care-of address 356 * 100: prefer care-of address
351 */ 357 */
358 dontfrag:1;
359 __u8 min_hopcount;
352 __u8 tclass; 360 __u8 tclass;
361 __u8 padding;
353 362
354 __u32 dst_cookie; 363 __u32 dst_cookie;
355 364
@@ -359,6 +368,7 @@ struct ipv6_pinfo {
359 368
360 struct ipv6_txoptions *opt; 369 struct ipv6_txoptions *opt;
361 struct sk_buff *pktoptions; 370 struct sk_buff *pktoptions;
371 struct sk_buff *rxpmtu;
362 struct { 372 struct {
363 struct ipv6_txoptions *opt; 373 struct ipv6_txoptions *opt;
364 u8 hop_limit; 374 u8 hop_limit;
diff --git a/include/linux/ks8842.h b/include/linux/ks8842.h
new file mode 100644
index 000000000000..da0341b8ca0a
--- /dev/null
+++ b/include/linux/ks8842.h
@@ -0,0 +1,34 @@
1/*
2 * ks8842.h KS8842 platform data struct definition
3 * Copyright (c) 2010 Intel Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19#ifndef _LINUX_KS8842_H
20#define _LINUX_KS8842_H
21
22#include <linux/if_ether.h>
23
24/**
25 * struct ks8842_platform_data - Platform data of the KS8842 network driver
26 * @macaddr: The MAC address of the device, set to all 0:s to use the on in
27 * the chip.
28 *
29 */
30struct ks8842_platform_data {
31 u8 macaddr[ETH_ALEN];
32};
33
34#endif
diff --git a/include/linux/net.h b/include/linux/net.h
index 4157b5d42bd6..2b4deeeb8646 100644
--- a/include/linux/net.h
+++ b/include/linux/net.h
@@ -59,6 +59,7 @@ typedef enum {
59#include <linux/wait.h> 59#include <linux/wait.h>
60#include <linux/fcntl.h> /* For O_CLOEXEC and O_NONBLOCK */ 60#include <linux/fcntl.h> /* For O_CLOEXEC and O_NONBLOCK */
61#include <linux/kmemcheck.h> 61#include <linux/kmemcheck.h>
62#include <linux/rcupdate.h>
62 63
63struct poll_table_struct; 64struct poll_table_struct;
64struct pipe_inode_info; 65struct pipe_inode_info;
@@ -116,6 +117,12 @@ enum sock_shutdown_cmd {
116 SHUT_RDWR = 2, 117 SHUT_RDWR = 2,
117}; 118};
118 119
120struct socket_wq {
121 wait_queue_head_t wait;
122 struct fasync_struct *fasync_list;
123 struct rcu_head rcu;
124} ____cacheline_aligned_in_smp;
125
119/** 126/**
120 * struct socket - general BSD socket 127 * struct socket - general BSD socket
121 * @state: socket state (%SS_CONNECTED, etc) 128 * @state: socket state (%SS_CONNECTED, etc)
@@ -135,11 +142,8 @@ struct socket {
135 kmemcheck_bitfield_end(type); 142 kmemcheck_bitfield_end(type);
136 143
137 unsigned long flags; 144 unsigned long flags;
138 /* 145
139 * Please keep fasync_list & wait fields in the same cache line 146 struct socket_wq *wq;
140 */
141 struct fasync_struct *fasync_list;
142 wait_queue_head_t wait;
143 147
144 struct file *file; 148 struct file *file;
145 struct sock *sk; 149 struct sock *sk;
diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h
index 3c5ed5f5274e..69022d47d6f2 100644
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
@@ -218,16 +218,6 @@ struct neighbour;
218struct neigh_parms; 218struct neigh_parms;
219struct sk_buff; 219struct sk_buff;
220 220
221struct netif_rx_stats {
222 unsigned total;
223 unsigned dropped;
224 unsigned time_squeeze;
225 unsigned cpu_collision;
226 unsigned received_rps;
227};
228
229DECLARE_PER_CPU(struct netif_rx_stats, netdev_rx_stat);
230
231struct netdev_hw_addr { 221struct netdev_hw_addr {
232 struct list_head list; 222 struct list_head list;
233 unsigned char addr[MAX_ADDR_LEN]; 223 unsigned char addr[MAX_ADDR_LEN];
@@ -734,6 +724,7 @@ struct net_device_ops {
734 unsigned short vid); 724 unsigned short vid);
735#ifdef CONFIG_NET_POLL_CONTROLLER 725#ifdef CONFIG_NET_POLL_CONTROLLER
736 void (*ndo_poll_controller)(struct net_device *dev); 726 void (*ndo_poll_controller)(struct net_device *dev);
727 void (*ndo_netpoll_cleanup)(struct net_device *dev);
737#endif 728#endif
738 int (*ndo_set_vf_mac)(struct net_device *dev, 729 int (*ndo_set_vf_mac)(struct net_device *dev,
739 int queue, u8 *mac); 730 int queue, u8 *mac);
@@ -888,7 +879,7 @@ struct net_device {
888 unsigned char operstate; /* RFC2863 operstate */ 879 unsigned char operstate; /* RFC2863 operstate */
889 unsigned char link_mode; /* mapping policy to operstate */ 880 unsigned char link_mode; /* mapping policy to operstate */
890 881
891 unsigned mtu; /* interface MTU value */ 882 unsigned int mtu; /* interface MTU value */
892 unsigned short type; /* interface hardware type */ 883 unsigned short type; /* interface hardware type */
893 unsigned short hard_header_len; /* hardware hdr length */ 884 unsigned short hard_header_len; /* hardware hdr length */
894 885
@@ -1385,8 +1376,16 @@ static inline int unregister_gifconf(unsigned int family)
1385 */ 1376 */
1386struct softnet_data { 1377struct softnet_data {
1387 struct Qdisc *output_queue; 1378 struct Qdisc *output_queue;
1379 struct Qdisc **output_queue_tailp;
1388 struct list_head poll_list; 1380 struct list_head poll_list;
1389 struct sk_buff *completion_queue; 1381 struct sk_buff *completion_queue;
1382 struct sk_buff_head process_queue;
1383
1384 /* stats */
1385 unsigned int processed;
1386 unsigned int time_squeeze;
1387 unsigned int cpu_collision;
1388 unsigned int received_rps;
1390 1389
1391#ifdef CONFIG_RPS 1390#ifdef CONFIG_RPS
1392 struct softnet_data *rps_ipi_list; 1391 struct softnet_data *rps_ipi_list;
@@ -1397,14 +1396,16 @@ struct softnet_data {
1397 unsigned int cpu; 1396 unsigned int cpu;
1398 unsigned int input_queue_head; 1397 unsigned int input_queue_head;
1399#endif 1398#endif
1399 unsigned dropped;
1400 struct sk_buff_head input_pkt_queue; 1400 struct sk_buff_head input_pkt_queue;
1401 struct napi_struct backlog; 1401 struct napi_struct backlog;
1402}; 1402};
1403 1403
1404static inline void input_queue_head_incr(struct softnet_data *sd) 1404static inline void input_queue_head_add(struct softnet_data *sd,
1405 unsigned int len)
1405{ 1406{
1406#ifdef CONFIG_RPS 1407#ifdef CONFIG_RPS
1407 sd->input_queue_head++; 1408 sd->input_queue_head += len;
1408#endif 1409#endif
1409} 1410}
1410 1411
diff --git a/include/linux/netpoll.h b/include/linux/netpoll.h
index a765ea898549..e9e231215865 100644
--- a/include/linux/netpoll.h
+++ b/include/linux/netpoll.h
@@ -14,6 +14,7 @@
14 14
15struct netpoll { 15struct netpoll {
16 struct net_device *dev; 16 struct net_device *dev;
17 struct net_device *real_dev;
17 char dev_name[IFNAMSIZ]; 18 char dev_name[IFNAMSIZ];
18 const char *name; 19 const char *name;
19 void (*rx_hook)(struct netpoll *, int, char *, int); 20 void (*rx_hook)(struct netpoll *, int, char *, int);
@@ -36,8 +37,11 @@ struct netpoll_info {
36 struct sk_buff_head txq; 37 struct sk_buff_head txq;
37 38
38 struct delayed_work tx_work; 39 struct delayed_work tx_work;
40
41 struct netpoll *netpoll;
39}; 42};
40 43
44void netpoll_poll_dev(struct net_device *dev);
41void netpoll_poll(struct netpoll *np); 45void netpoll_poll(struct netpoll *np);
42void netpoll_send_udp(struct netpoll *np, const char *msg, int len); 46void netpoll_send_udp(struct netpoll *np, const char *msg, int len);
43void netpoll_print_options(struct netpoll *np); 47void netpoll_print_options(struct netpoll *np);
@@ -47,22 +51,23 @@ int netpoll_trap(void);
47void netpoll_set_trap(int trap); 51void netpoll_set_trap(int trap);
48void netpoll_cleanup(struct netpoll *np); 52void netpoll_cleanup(struct netpoll *np);
49int __netpoll_rx(struct sk_buff *skb); 53int __netpoll_rx(struct sk_buff *skb);
54void netpoll_send_skb(struct netpoll *np, struct sk_buff *skb);
50 55
51 56
52#ifdef CONFIG_NETPOLL 57#ifdef CONFIG_NETPOLL
53static inline int netpoll_rx(struct sk_buff *skb) 58static inline bool netpoll_rx(struct sk_buff *skb)
54{ 59{
55 struct netpoll_info *npinfo = skb->dev->npinfo; 60 struct netpoll_info *npinfo = skb->dev->npinfo;
56 unsigned long flags; 61 unsigned long flags;
57 int ret = 0; 62 bool ret = false;
58 63
59 if (!npinfo || (list_empty(&npinfo->rx_np) && !npinfo->rx_flags)) 64 if (!npinfo || (list_empty(&npinfo->rx_np) && !npinfo->rx_flags))
60 return 0; 65 return false;
61 66
62 spin_lock_irqsave(&npinfo->rx_lock, flags); 67 spin_lock_irqsave(&npinfo->rx_lock, flags);
63 /* check rx_flags again with the lock held */ 68 /* check rx_flags again with the lock held */
64 if (npinfo->rx_flags && __netpoll_rx(skb)) 69 if (npinfo->rx_flags && __netpoll_rx(skb))
65 ret = 1; 70 ret = true;
66 spin_unlock_irqrestore(&npinfo->rx_lock, flags); 71 spin_unlock_irqrestore(&npinfo->rx_lock, flags);
67 72
68 return ret; 73 return ret;
diff --git a/include/linux/nfs_fs_sb.h b/include/linux/nfs_fs_sb.h
index 717a5e54eb1d..e82957acea56 100644
--- a/include/linux/nfs_fs_sb.h
+++ b/include/linux/nfs_fs_sb.h
@@ -176,6 +176,7 @@ struct nfs_server {
176#define NFS_CAP_ATIME (1U << 11) 176#define NFS_CAP_ATIME (1U << 11)
177#define NFS_CAP_CTIME (1U << 12) 177#define NFS_CAP_CTIME (1U << 12)
178#define NFS_CAP_MTIME (1U << 13) 178#define NFS_CAP_MTIME (1U << 13)
179#define NFS_CAP_POSIX_LOCK (1U << 14)
179 180
180 181
181/* maximum number of slots to use */ 182/* maximum number of slots to use */
diff --git a/include/linux/nl80211.h b/include/linux/nl80211.h
index 2ea3edeee7aa..f8750f9a65b8 100644
--- a/include/linux/nl80211.h
+++ b/include/linux/nl80211.h
@@ -709,6 +709,9 @@ enum nl80211_commands {
709 * NL80211_CMD_AUTHENTICATE, NL80211_CMD_DEAUTHENTICATE, 709 * NL80211_CMD_AUTHENTICATE, NL80211_CMD_DEAUTHENTICATE,
710 * NL80211_CMD_DISASSOCIATE. 710 * NL80211_CMD_DISASSOCIATE.
711 * 711 *
712 * @NL80211_ATTR_AP_ISOLATE: (AP mode) Do not forward traffic between stations
713 * connected to this BSS.
714 *
712 * @NL80211_ATTR_MAX: highest attribute number currently defined 715 * @NL80211_ATTR_MAX: highest attribute number currently defined
713 * @__NL80211_ATTR_AFTER_LAST: internal use 716 * @__NL80211_ATTR_AFTER_LAST: internal use
714 */ 717 */
@@ -864,6 +867,8 @@ enum nl80211_attrs {
864 867
865 NL80211_ATTR_LOCAL_STATE_CHANGE, 868 NL80211_ATTR_LOCAL_STATE_CHANGE,
866 869
870 NL80211_ATTR_AP_ISOLATE,
871
867 /* add attributes here, update the policy in nl80211.c */ 872 /* add attributes here, update the policy in nl80211.c */
868 873
869 __NL80211_ATTR_AFTER_LAST, 874 __NL80211_ATTR_AFTER_LAST,
diff --git a/include/linux/notifier.h b/include/linux/notifier.h
index 9c5d3fad01f3..7c3609622334 100644
--- a/include/linux/notifier.h
+++ b/include/linux/notifier.h
@@ -206,6 +206,7 @@ static inline int notifier_to_errno(int ret)
206#define NETDEV_POST_TYPE_CHANGE 0x000F 206#define NETDEV_POST_TYPE_CHANGE 0x000F
207#define NETDEV_POST_INIT 0x0010 207#define NETDEV_POST_INIT 0x0010
208#define NETDEV_UNREGISTER_BATCH 0x0011 208#define NETDEV_UNREGISTER_BATCH 0x0011
209#define NETDEV_BONDING_DESLAVE 0x0012
209 210
210#define SYS_DOWN 0x0001 /* Notify of system down */ 211#define SYS_DOWN 0x0001 /* Notify of system down */
211#define SYS_RESTART SYS_DOWN 212#define SYS_RESTART SYS_DOWN
diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h
index c8f302991b66..c4c3d68be19a 100644
--- a/include/linux/pci_regs.h
+++ b/include/linux/pci_regs.h
@@ -442,7 +442,10 @@
442#define PCI_EXP_LNKCTL_LABIE 0x0800 /* Lnk Autonomous Bandwidth Interrupt Enable */ 442#define PCI_EXP_LNKCTL_LABIE 0x0800 /* Lnk Autonomous Bandwidth Interrupt Enable */
443#define PCI_EXP_LNKSTA 18 /* Link Status */ 443#define PCI_EXP_LNKSTA 18 /* Link Status */
444#define PCI_EXP_LNKSTA_CLS 0x000f /* Current Link Speed */ 444#define PCI_EXP_LNKSTA_CLS 0x000f /* Current Link Speed */
445#define PCI_EXP_LNKSTA_CLS_2_5GB 0x01 /* Current Link Speed 2.5GT/s */
446#define PCI_EXP_LNKSTA_CLS_5_0GB 0x02 /* Current Link Speed 5.0GT/s */
445#define PCI_EXP_LNKSTA_NLW 0x03f0 /* Nogotiated Link Width */ 447#define PCI_EXP_LNKSTA_NLW 0x03f0 /* Nogotiated Link Width */
448#define PCI_EXP_LNKSTA_NLW_SHIFT 4 /* start of NLW mask in link status */
446#define PCI_EXP_LNKSTA_LT 0x0800 /* Link Training */ 449#define PCI_EXP_LNKSTA_LT 0x0800 /* Link Training */
447#define PCI_EXP_LNKSTA_SLC 0x1000 /* Slot Clock Configuration */ 450#define PCI_EXP_LNKSTA_SLC 0x1000 /* Slot Clock Configuration */
448#define PCI_EXP_LNKSTA_DLLLA 0x2000 /* Data Link Layer Link Active */ 451#define PCI_EXP_LNKSTA_DLLLA 0x2000 /* Data Link Layer Link Active */
diff --git a/include/linux/rculist.h b/include/linux/rculist.h
index 004908b104d5..4ec3b38ce9c5 100644
--- a/include/linux/rculist.h
+++ b/include/linux/rculist.h
@@ -429,6 +429,23 @@ static inline void hlist_add_after_rcu(struct hlist_node *prev,
429 pos = rcu_dereference_raw(pos->next)) 429 pos = rcu_dereference_raw(pos->next))
430 430
431/** 431/**
432 * hlist_for_each_entry_rcu_bh - iterate over rcu list of given type
433 * @tpos: the type * to use as a loop cursor.
434 * @pos: the &struct hlist_node to use as a loop cursor.
435 * @head: the head for your list.
436 * @member: the name of the hlist_node within the struct.
437 *
438 * This list-traversal primitive may safely run concurrently with
439 * the _rcu list-mutation primitives such as hlist_add_head_rcu()
440 * as long as the traversal is guarded by rcu_read_lock().
441 */
442#define hlist_for_each_entry_rcu_bh(tpos, pos, head, member) \
443 for (pos = rcu_dereference_bh((head)->first); \
444 pos && ({ prefetch(pos->next); 1; }) && \
445 ({ tpos = hlist_entry(pos, typeof(*tpos), member); 1; }); \
446 pos = rcu_dereference_bh(pos->next))
447
448/**
432 * hlist_for_each_entry_continue_rcu - iterate over a hlist continuing after current point 449 * hlist_for_each_entry_continue_rcu - iterate over a hlist continuing after current point
433 * @tpos: the type * to use as a loop cursor. 450 * @tpos: the type * to use as a loop cursor.
434 * @pos: the &struct hlist_node to use as a loop cursor. 451 * @pos: the &struct hlist_node to use as a loop cursor.
@@ -440,6 +457,18 @@ static inline void hlist_add_after_rcu(struct hlist_node *prev,
440 ({ tpos = hlist_entry(pos, typeof(*tpos), member); 1; }); \ 457 ({ tpos = hlist_entry(pos, typeof(*tpos), member); 1; }); \
441 pos = rcu_dereference(pos->next)) 458 pos = rcu_dereference(pos->next))
442 459
460/**
461 * hlist_for_each_entry_continue_rcu_bh - iterate over a hlist continuing after current point
462 * @tpos: the type * to use as a loop cursor.
463 * @pos: the &struct hlist_node to use as a loop cursor.
464 * @member: the name of the hlist_node within the struct.
465 */
466#define hlist_for_each_entry_continue_rcu_bh(tpos, pos, member) \
467 for (pos = rcu_dereference_bh((pos)->next); \
468 pos && ({ prefetch(pos->next); 1; }) && \
469 ({ tpos = hlist_entry(pos, typeof(*tpos), member); 1; }); \
470 pos = rcu_dereference_bh(pos->next))
471
443 472
444#endif /* __KERNEL__ */ 473#endif /* __KERNEL__ */
445#endif 474#endif
diff --git a/include/linux/rcupdate.h b/include/linux/rcupdate.h
index 872a98e13d6a..07db2feb8572 100644
--- a/include/linux/rcupdate.h
+++ b/include/linux/rcupdate.h
@@ -101,10 +101,7 @@ extern struct lockdep_map rcu_sched_lock_map;
101# define rcu_read_release_sched() \ 101# define rcu_read_release_sched() \
102 lock_release(&rcu_sched_lock_map, 1, _THIS_IP_) 102 lock_release(&rcu_sched_lock_map, 1, _THIS_IP_)
103 103
104static inline int debug_lockdep_rcu_enabled(void) 104extern int debug_lockdep_rcu_enabled(void);
105{
106 return likely(rcu_scheduler_active && debug_locks);
107}
108 105
109/** 106/**
110 * rcu_read_lock_held - might we be in RCU read-side critical section? 107 * rcu_read_lock_held - might we be in RCU read-side critical section?
@@ -195,12 +192,30 @@ static inline int rcu_read_lock_sched_held(void)
195 192
196/** 193/**
197 * rcu_dereference_check - rcu_dereference with debug checking 194 * rcu_dereference_check - rcu_dereference with debug checking
195 * @p: The pointer to read, prior to dereferencing
196 * @c: The conditions under which the dereference will take place
197 *
198 * Do an rcu_dereference(), but check that the conditions under which the
199 * dereference will take place are correct. Typically the conditions indicate
200 * the various locking conditions that should be held at that point. The check
201 * should return true if the conditions are satisfied.
202 *
203 * For example:
204 *
205 * bar = rcu_dereference_check(foo->bar, rcu_read_lock_held() ||
206 * lockdep_is_held(&foo->lock));
198 * 207 *
199 * Do an rcu_dereference(), but check that the context is correct. 208 * could be used to indicate to lockdep that foo->bar may only be dereferenced
200 * For example, rcu_dereference_check(gp, rcu_read_lock_held()) to 209 * if either the RCU read lock is held, or that the lock required to replace
201 * ensure that the rcu_dereference_check() executes within an RCU 210 * the bar struct at foo->bar is held.
202 * read-side critical section. It is also possible to check for 211 *
203 * locks being held, for example, by using lockdep_is_held(). 212 * Note that the list of conditions may also include indications of when a lock
213 * need not be held, for example during initialisation or destruction of the
214 * target struct:
215 *
216 * bar = rcu_dereference_check(foo->bar, rcu_read_lock_held() ||
217 * lockdep_is_held(&foo->lock) ||
218 * atomic_read(&foo->usage) == 0);
204 */ 219 */
205#define rcu_dereference_check(p, c) \ 220#define rcu_dereference_check(p, c) \
206 ({ \ 221 ({ \
@@ -209,13 +224,45 @@ static inline int rcu_read_lock_sched_held(void)
209 rcu_dereference_raw(p); \ 224 rcu_dereference_raw(p); \
210 }) 225 })
211 226
227/**
228 * rcu_dereference_protected - fetch RCU pointer when updates prevented
229 *
230 * Return the value of the specified RCU-protected pointer, but omit
231 * both the smp_read_barrier_depends() and the ACCESS_ONCE(). This
232 * is useful in cases where update-side locks prevent the value of the
233 * pointer from changing. Please note that this primitive does -not-
234 * prevent the compiler from repeating this reference or combining it
235 * with other references, so it should not be used without protection
236 * of appropriate locks.
237 */
238#define rcu_dereference_protected(p, c) \
239 ({ \
240 if (debug_lockdep_rcu_enabled() && !(c)) \
241 lockdep_rcu_dereference(__FILE__, __LINE__); \
242 (p); \
243 })
244
212#else /* #ifdef CONFIG_PROVE_RCU */ 245#else /* #ifdef CONFIG_PROVE_RCU */
213 246
214#define rcu_dereference_check(p, c) rcu_dereference_raw(p) 247#define rcu_dereference_check(p, c) rcu_dereference_raw(p)
248#define rcu_dereference_protected(p, c) (p)
215 249
216#endif /* #else #ifdef CONFIG_PROVE_RCU */ 250#endif /* #else #ifdef CONFIG_PROVE_RCU */
217 251
218/** 252/**
253 * rcu_access_pointer - fetch RCU pointer with no dereferencing
254 *
255 * Return the value of the specified RCU-protected pointer, but omit the
256 * smp_read_barrier_depends() and keep the ACCESS_ONCE(). This is useful
257 * when the value of this pointer is accessed, but the pointer is not
258 * dereferenced, for example, when testing an RCU-protected pointer against
259 * NULL. This may also be used in cases where update-side locks prevent
260 * the value of the pointer from changing, but rcu_dereference_protected()
261 * is a lighter-weight primitive for this use case.
262 */
263#define rcu_access_pointer(p) ACCESS_ONCE(p)
264
265/**
219 * rcu_read_lock - mark the beginning of an RCU read-side critical section. 266 * rcu_read_lock - mark the beginning of an RCU read-side critical section.
220 * 267 *
221 * When synchronize_rcu() is invoked on one CPU while other CPUs 268 * When synchronize_rcu() is invoked on one CPU while other CPUs
diff --git a/include/linux/rtnetlink.h b/include/linux/rtnetlink.h
index d1c7c90e9cd4..5a42c36cb6aa 100644
--- a/include/linux/rtnetlink.h
+++ b/include/linux/rtnetlink.h
@@ -7,6 +7,12 @@
7#include <linux/if_addr.h> 7#include <linux/if_addr.h>
8#include <linux/neighbour.h> 8#include <linux/neighbour.h>
9 9
10/* rtnetlink families. Values up to 127 are reserved for real address
11 * families, values above 128 may be used arbitrarily.
12 */
13#define RTNL_FAMILY_IPMR 128
14#define RTNL_FAMILY_MAX 128
15
10/**** 16/****
11 * Routing/neighbour discovery messages. 17 * Routing/neighbour discovery messages.
12 ****/ 18 ****/
diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h
index 38501d20650c..c9525bce80f6 100644
--- a/include/linux/skbuff.h
+++ b/include/linux/skbuff.h
@@ -187,7 +187,6 @@ union skb_shared_tx {
187 * the end of the header data, ie. at skb->end. 187 * the end of the header data, ie. at skb->end.
188 */ 188 */
189struct skb_shared_info { 189struct skb_shared_info {
190 atomic_t dataref;
191 unsigned short nr_frags; 190 unsigned short nr_frags;
192 unsigned short gso_size; 191 unsigned short gso_size;
193 /* Warning: this field is not always filled in (UFO)! */ 192 /* Warning: this field is not always filled in (UFO)! */
@@ -197,6 +196,12 @@ struct skb_shared_info {
197 union skb_shared_tx tx_flags; 196 union skb_shared_tx tx_flags;
198 struct sk_buff *frag_list; 197 struct sk_buff *frag_list;
199 struct skb_shared_hwtstamps hwtstamps; 198 struct skb_shared_hwtstamps hwtstamps;
199
200 /*
201 * Warning : all fields before dataref are cleared in __alloc_skb()
202 */
203 atomic_t dataref;
204
200 skb_frag_t frags[MAX_SKB_FRAGS]; 205 skb_frag_t frags[MAX_SKB_FRAGS];
201 /* Intermediate layers must ensure that destructor_arg 206 /* Intermediate layers must ensure that destructor_arg
202 * remains valid until skb destructor */ 207 * remains valid until skb destructor */
@@ -470,10 +475,6 @@ extern int skb_cow_data(struct sk_buff *skb, int tailbits,
470 struct sk_buff **trailer); 475 struct sk_buff **trailer);
471extern int skb_pad(struct sk_buff *skb, int pad); 476extern int skb_pad(struct sk_buff *skb, int pad);
472#define dev_kfree_skb(a) consume_skb(a) 477#define dev_kfree_skb(a) consume_skb(a)
473extern void skb_over_panic(struct sk_buff *skb, int len,
474 void *here);
475extern void skb_under_panic(struct sk_buff *skb, int len,
476 void *here);
477 478
478extern int skb_append_datato_frags(struct sock *sk, struct sk_buff *skb, 479extern int skb_append_datato_frags(struct sock *sk, struct sk_buff *skb,
479 int getfrag(void *from, char *to, int offset, 480 int getfrag(void *from, char *to, int offset,
@@ -1132,6 +1133,11 @@ static inline unsigned char *__skb_pull(struct sk_buff *skb, unsigned int len)
1132 return skb->data += len; 1133 return skb->data += len;
1133} 1134}
1134 1135
1136static inline unsigned char *skb_pull_inline(struct sk_buff *skb, unsigned int len)
1137{
1138 return unlikely(len > skb->len) ? NULL : __skb_pull(skb, len);
1139}
1140
1135extern unsigned char *__pskb_pull_tail(struct sk_buff *skb, int delta); 1141extern unsigned char *__pskb_pull_tail(struct sk_buff *skb, int delta);
1136 1142
1137static inline unsigned char *__pskb_pull(struct sk_buff *skb, unsigned int len) 1143static inline unsigned char *__pskb_pull(struct sk_buff *skb, unsigned int len)
@@ -1355,9 +1361,12 @@ static inline int skb_network_offset(const struct sk_buff *skb)
1355 * 1361 *
1356 * Various parts of the networking layer expect at least 32 bytes of 1362 * Various parts of the networking layer expect at least 32 bytes of
1357 * headroom, you should not reduce this. 1363 * headroom, you should not reduce this.
1364 * With RPS, we raised NET_SKB_PAD to 64 so that get_rps_cpus() fetches span
1365 * a 64 bytes aligned block to fit modern (>= 64 bytes) cache line sizes
1366 * NET_IP_ALIGN(2) + ethernet_header(14) + IP_header(20/40) + ports(8)
1358 */ 1367 */
1359#ifndef NET_SKB_PAD 1368#ifndef NET_SKB_PAD
1360#define NET_SKB_PAD 32 1369#define NET_SKB_PAD 64
1361#endif 1370#endif
1362 1371
1363extern int ___pskb_trim(struct sk_buff *skb, unsigned int len); 1372extern int ___pskb_trim(struct sk_buff *skb, unsigned int len);
diff --git a/include/linux/spi/wl12xx.h b/include/linux/spi/wl12xx.h
index aed64ed3dc8a..a223ecbc71ef 100644
--- a/include/linux/spi/wl12xx.h
+++ b/include/linux/spi/wl12xx.h
@@ -26,6 +26,8 @@
26 26
27struct wl12xx_platform_data { 27struct wl12xx_platform_data {
28 void (*set_power)(bool enable); 28 void (*set_power)(bool enable);
29 /* SDIO only: IRQ number if WLAN_IRQ line is used, 0 for SDIO IRQs */
30 int irq;
29 bool use_eeprom; 31 bool use_eeprom;
30}; 32};
31 33
diff --git a/include/linux/ssb/ssb.h b/include/linux/ssb/ssb.h
index 24f988547361..a2608bff9c78 100644
--- a/include/linux/ssb/ssb.h
+++ b/include/linux/ssb/ssb.h
@@ -305,6 +305,7 @@ struct ssb_bus {
305 /* ID information about the Chip. */ 305 /* ID information about the Chip. */
306 u16 chip_id; 306 u16 chip_id;
307 u16 chip_rev; 307 u16 chip_rev;
308 u16 sprom_offset;
308 u16 sprom_size; /* number of words in sprom */ 309 u16 sprom_size; /* number of words in sprom */
309 u8 chip_package; 310 u8 chip_package;
310 311
@@ -394,6 +395,9 @@ extern int ssb_bus_sdiobus_register(struct ssb_bus *bus,
394 395
395extern void ssb_bus_unregister(struct ssb_bus *bus); 396extern void ssb_bus_unregister(struct ssb_bus *bus);
396 397
398/* Does the device have an SPROM? */
399extern bool ssb_is_sprom_available(struct ssb_bus *bus);
400
397/* Set a fallback SPROM. 401/* Set a fallback SPROM.
398 * See kdoc at the function definition for complete documentation. */ 402 * See kdoc at the function definition for complete documentation. */
399extern int ssb_arch_set_fallback_sprom(const struct ssb_sprom *sprom); 403extern int ssb_arch_set_fallback_sprom(const struct ssb_sprom *sprom);
diff --git a/include/linux/ssb/ssb_driver_chipcommon.h b/include/linux/ssb/ssb_driver_chipcommon.h
index 4e27acf0a92f..2cdf249b4e5f 100644
--- a/include/linux/ssb/ssb_driver_chipcommon.h
+++ b/include/linux/ssb/ssb_driver_chipcommon.h
@@ -53,6 +53,7 @@
53#define SSB_CHIPCO_CAP_64BIT 0x08000000 /* 64-bit Backplane */ 53#define SSB_CHIPCO_CAP_64BIT 0x08000000 /* 64-bit Backplane */
54#define SSB_CHIPCO_CAP_PMU 0x10000000 /* PMU available (rev >= 20) */ 54#define SSB_CHIPCO_CAP_PMU 0x10000000 /* PMU available (rev >= 20) */
55#define SSB_CHIPCO_CAP_ECI 0x20000000 /* ECI available (rev >= 20) */ 55#define SSB_CHIPCO_CAP_ECI 0x20000000 /* ECI available (rev >= 20) */
56#define SSB_CHIPCO_CAP_SPROM 0x40000000 /* SPROM present */
56#define SSB_CHIPCO_CORECTL 0x0008 57#define SSB_CHIPCO_CORECTL 0x0008
57#define SSB_CHIPCO_CORECTL_UARTCLK0 0x00000001 /* Drive UART with internal clock */ 58#define SSB_CHIPCO_CORECTL_UARTCLK0 0x00000001 /* Drive UART with internal clock */
58#define SSB_CHIPCO_CORECTL_SE 0x00000002 /* sync clk out enable (corerev >= 3) */ 59#define SSB_CHIPCO_CORECTL_SE 0x00000002 /* sync clk out enable (corerev >= 3) */
@@ -385,6 +386,7 @@
385 386
386 387
387/** Chip specific Chip-Status register contents. */ 388/** Chip specific Chip-Status register contents. */
389#define SSB_CHIPCO_CHST_4322_SPROM_EXISTS 0x00000040 /* SPROM present */
388#define SSB_CHIPCO_CHST_4325_SPROM_OTP_SEL 0x00000003 390#define SSB_CHIPCO_CHST_4325_SPROM_OTP_SEL 0x00000003
389#define SSB_CHIPCO_CHST_4325_DEFCIS_SEL 0 /* OTP is powered up, use def. CIS, no SPROM */ 391#define SSB_CHIPCO_CHST_4325_DEFCIS_SEL 0 /* OTP is powered up, use def. CIS, no SPROM */
390#define SSB_CHIPCO_CHST_4325_SPROM_SEL 1 /* OTP is powered up, SPROM is present */ 392#define SSB_CHIPCO_CHST_4325_SPROM_SEL 1 /* OTP is powered up, SPROM is present */
@@ -398,6 +400,18 @@
398#define SSB_CHIPCO_CHST_4325_RCAL_VALUE_SHIFT 4 400#define SSB_CHIPCO_CHST_4325_RCAL_VALUE_SHIFT 4
399#define SSB_CHIPCO_CHST_4325_PMUTOP_2B 0x00000200 /* 1 for 2b, 0 for to 2a */ 401#define SSB_CHIPCO_CHST_4325_PMUTOP_2B 0x00000200 /* 1 for 2b, 0 for to 2a */
400 402
403/** Macros to determine SPROM presence based on Chip-Status register. */
404#define SSB_CHIPCO_CHST_4312_SPROM_PRESENT(status) \
405 ((status & SSB_CHIPCO_CHST_4325_SPROM_OTP_SEL) != \
406 SSB_CHIPCO_CHST_4325_OTP_SEL)
407#define SSB_CHIPCO_CHST_4322_SPROM_PRESENT(status) \
408 (status & SSB_CHIPCO_CHST_4322_SPROM_EXISTS)
409#define SSB_CHIPCO_CHST_4325_SPROM_PRESENT(status) \
410 (((status & SSB_CHIPCO_CHST_4325_SPROM_OTP_SEL) != \
411 SSB_CHIPCO_CHST_4325_DEFCIS_SEL) && \
412 ((status & SSB_CHIPCO_CHST_4325_SPROM_OTP_SEL) != \
413 SSB_CHIPCO_CHST_4325_OTP_SEL))
414
401 415
402 416
403/** Clockcontrol masks and values **/ 417/** Clockcontrol masks and values **/
@@ -564,6 +578,7 @@ struct ssb_chipcommon_pmu {
564struct ssb_chipcommon { 578struct ssb_chipcommon {
565 struct ssb_device *dev; 579 struct ssb_device *dev;
566 u32 capabilities; 580 u32 capabilities;
581 u32 status;
567 /* Fast Powerup Delay constant */ 582 /* Fast Powerup Delay constant */
568 u16 fast_pwrup_delay; 583 u16 fast_pwrup_delay;
569 struct ssb_chipcommon_pmu pmu; 584 struct ssb_chipcommon_pmu pmu;
diff --git a/include/linux/ssb/ssb_regs.h b/include/linux/ssb/ssb_regs.h
index 9ae9082eaeb4..a6d5225b9275 100644
--- a/include/linux/ssb/ssb_regs.h
+++ b/include/linux/ssb/ssb_regs.h
@@ -170,26 +170,27 @@
170#define SSB_SPROMSIZE_WORDS_R4 220 170#define SSB_SPROMSIZE_WORDS_R4 220
171#define SSB_SPROMSIZE_BYTES_R123 (SSB_SPROMSIZE_WORDS_R123 * sizeof(u16)) 171#define SSB_SPROMSIZE_BYTES_R123 (SSB_SPROMSIZE_WORDS_R123 * sizeof(u16))
172#define SSB_SPROMSIZE_BYTES_R4 (SSB_SPROMSIZE_WORDS_R4 * sizeof(u16)) 172#define SSB_SPROMSIZE_BYTES_R4 (SSB_SPROMSIZE_WORDS_R4 * sizeof(u16))
173#define SSB_SPROM_BASE 0x1000 173#define SSB_SPROM_BASE1 0x1000
174#define SSB_SPROM_REVISION 0x107E 174#define SSB_SPROM_BASE31 0x0800
175#define SSB_SPROM_REVISION 0x007E
175#define SSB_SPROM_REVISION_REV 0x00FF /* SPROM Revision number */ 176#define SSB_SPROM_REVISION_REV 0x00FF /* SPROM Revision number */
176#define SSB_SPROM_REVISION_CRC 0xFF00 /* SPROM CRC8 value */ 177#define SSB_SPROM_REVISION_CRC 0xFF00 /* SPROM CRC8 value */
177#define SSB_SPROM_REVISION_CRC_SHIFT 8 178#define SSB_SPROM_REVISION_CRC_SHIFT 8
178 179
179/* SPROM Revision 1 */ 180/* SPROM Revision 1 */
180#define SSB_SPROM1_SPID 0x1004 /* Subsystem Product ID for PCI */ 181#define SSB_SPROM1_SPID 0x0004 /* Subsystem Product ID for PCI */
181#define SSB_SPROM1_SVID 0x1006 /* Subsystem Vendor ID for PCI */ 182#define SSB_SPROM1_SVID 0x0006 /* Subsystem Vendor ID for PCI */
182#define SSB_SPROM1_PID 0x1008 /* Product ID for PCI */ 183#define SSB_SPROM1_PID 0x0008 /* Product ID for PCI */
183#define SSB_SPROM1_IL0MAC 0x1048 /* 6 bytes MAC address for 802.11b/g */ 184#define SSB_SPROM1_IL0MAC 0x0048 /* 6 bytes MAC address for 802.11b/g */
184#define SSB_SPROM1_ET0MAC 0x104E /* 6 bytes MAC address for Ethernet */ 185#define SSB_SPROM1_ET0MAC 0x004E /* 6 bytes MAC address for Ethernet */
185#define SSB_SPROM1_ET1MAC 0x1054 /* 6 bytes MAC address for 802.11a */ 186#define SSB_SPROM1_ET1MAC 0x0054 /* 6 bytes MAC address for 802.11a */
186#define SSB_SPROM1_ETHPHY 0x105A /* Ethernet PHY settings */ 187#define SSB_SPROM1_ETHPHY 0x005A /* Ethernet PHY settings */
187#define SSB_SPROM1_ETHPHY_ET0A 0x001F /* MII Address for enet0 */ 188#define SSB_SPROM1_ETHPHY_ET0A 0x001F /* MII Address for enet0 */
188#define SSB_SPROM1_ETHPHY_ET1A 0x03E0 /* MII Address for enet1 */ 189#define SSB_SPROM1_ETHPHY_ET1A 0x03E0 /* MII Address for enet1 */
189#define SSB_SPROM1_ETHPHY_ET1A_SHIFT 5 190#define SSB_SPROM1_ETHPHY_ET1A_SHIFT 5
190#define SSB_SPROM1_ETHPHY_ET0M (1<<14) /* MDIO for enet0 */ 191#define SSB_SPROM1_ETHPHY_ET0M (1<<14) /* MDIO for enet0 */
191#define SSB_SPROM1_ETHPHY_ET1M (1<<15) /* MDIO for enet1 */ 192#define SSB_SPROM1_ETHPHY_ET1M (1<<15) /* MDIO for enet1 */
192#define SSB_SPROM1_BINF 0x105C /* Board info */ 193#define SSB_SPROM1_BINF 0x005C /* Board info */
193#define SSB_SPROM1_BINF_BREV 0x00FF /* Board Revision */ 194#define SSB_SPROM1_BINF_BREV 0x00FF /* Board Revision */
194#define SSB_SPROM1_BINF_CCODE 0x0F00 /* Country Code */ 195#define SSB_SPROM1_BINF_CCODE 0x0F00 /* Country Code */
195#define SSB_SPROM1_BINF_CCODE_SHIFT 8 196#define SSB_SPROM1_BINF_CCODE_SHIFT 8
@@ -197,63 +198,63 @@
197#define SSB_SPROM1_BINF_ANTBG_SHIFT 12 198#define SSB_SPROM1_BINF_ANTBG_SHIFT 12
198#define SSB_SPROM1_BINF_ANTA 0xC000 /* Available A-PHY antennas */ 199#define SSB_SPROM1_BINF_ANTA 0xC000 /* Available A-PHY antennas */
199#define SSB_SPROM1_BINF_ANTA_SHIFT 14 200#define SSB_SPROM1_BINF_ANTA_SHIFT 14
200#define SSB_SPROM1_PA0B0 0x105E 201#define SSB_SPROM1_PA0B0 0x005E
201#define SSB_SPROM1_PA0B1 0x1060 202#define SSB_SPROM1_PA0B1 0x0060
202#define SSB_SPROM1_PA0B2 0x1062 203#define SSB_SPROM1_PA0B2 0x0062
203#define SSB_SPROM1_GPIOA 0x1064 /* General Purpose IO pins 0 and 1 */ 204#define SSB_SPROM1_GPIOA 0x0064 /* General Purpose IO pins 0 and 1 */
204#define SSB_SPROM1_GPIOA_P0 0x00FF /* Pin 0 */ 205#define SSB_SPROM1_GPIOA_P0 0x00FF /* Pin 0 */
205#define SSB_SPROM1_GPIOA_P1 0xFF00 /* Pin 1 */ 206#define SSB_SPROM1_GPIOA_P1 0xFF00 /* Pin 1 */
206#define SSB_SPROM1_GPIOA_P1_SHIFT 8 207#define SSB_SPROM1_GPIOA_P1_SHIFT 8
207#define SSB_SPROM1_GPIOB 0x1066 /* General Purpuse IO pins 2 and 3 */ 208#define SSB_SPROM1_GPIOB 0x0066 /* General Purpuse IO pins 2 and 3 */
208#define SSB_SPROM1_GPIOB_P2 0x00FF /* Pin 2 */ 209#define SSB_SPROM1_GPIOB_P2 0x00FF /* Pin 2 */
209#define SSB_SPROM1_GPIOB_P3 0xFF00 /* Pin 3 */ 210#define SSB_SPROM1_GPIOB_P3 0xFF00 /* Pin 3 */
210#define SSB_SPROM1_GPIOB_P3_SHIFT 8 211#define SSB_SPROM1_GPIOB_P3_SHIFT 8
211#define SSB_SPROM1_MAXPWR 0x1068 /* Power Amplifier Max Power */ 212#define SSB_SPROM1_MAXPWR 0x0068 /* Power Amplifier Max Power */
212#define SSB_SPROM1_MAXPWR_BG 0x00FF /* B-PHY and G-PHY (in dBm Q5.2) */ 213#define SSB_SPROM1_MAXPWR_BG 0x00FF /* B-PHY and G-PHY (in dBm Q5.2) */
213#define SSB_SPROM1_MAXPWR_A 0xFF00 /* A-PHY (in dBm Q5.2) */ 214#define SSB_SPROM1_MAXPWR_A 0xFF00 /* A-PHY (in dBm Q5.2) */
214#define SSB_SPROM1_MAXPWR_A_SHIFT 8 215#define SSB_SPROM1_MAXPWR_A_SHIFT 8
215#define SSB_SPROM1_PA1B0 0x106A 216#define SSB_SPROM1_PA1B0 0x006A
216#define SSB_SPROM1_PA1B1 0x106C 217#define SSB_SPROM1_PA1B1 0x006C
217#define SSB_SPROM1_PA1B2 0x106E 218#define SSB_SPROM1_PA1B2 0x006E
218#define SSB_SPROM1_ITSSI 0x1070 /* Idle TSSI Target */ 219#define SSB_SPROM1_ITSSI 0x0070 /* Idle TSSI Target */
219#define SSB_SPROM1_ITSSI_BG 0x00FF /* B-PHY and G-PHY*/ 220#define SSB_SPROM1_ITSSI_BG 0x00FF /* B-PHY and G-PHY*/
220#define SSB_SPROM1_ITSSI_A 0xFF00 /* A-PHY */ 221#define SSB_SPROM1_ITSSI_A 0xFF00 /* A-PHY */
221#define SSB_SPROM1_ITSSI_A_SHIFT 8 222#define SSB_SPROM1_ITSSI_A_SHIFT 8
222#define SSB_SPROM1_BFLLO 0x1072 /* Boardflags (low 16 bits) */ 223#define SSB_SPROM1_BFLLO 0x0072 /* Boardflags (low 16 bits) */
223#define SSB_SPROM1_AGAIN 0x1074 /* Antenna Gain (in dBm Q5.2) */ 224#define SSB_SPROM1_AGAIN 0x0074 /* Antenna Gain (in dBm Q5.2) */
224#define SSB_SPROM1_AGAIN_BG 0x00FF /* B-PHY and G-PHY */ 225#define SSB_SPROM1_AGAIN_BG 0x00FF /* B-PHY and G-PHY */
225#define SSB_SPROM1_AGAIN_BG_SHIFT 0 226#define SSB_SPROM1_AGAIN_BG_SHIFT 0
226#define SSB_SPROM1_AGAIN_A 0xFF00 /* A-PHY */ 227#define SSB_SPROM1_AGAIN_A 0xFF00 /* A-PHY */
227#define SSB_SPROM1_AGAIN_A_SHIFT 8 228#define SSB_SPROM1_AGAIN_A_SHIFT 8
228 229
229/* SPROM Revision 2 (inherits from rev 1) */ 230/* SPROM Revision 2 (inherits from rev 1) */
230#define SSB_SPROM2_BFLHI 0x1038 /* Boardflags (high 16 bits) */ 231#define SSB_SPROM2_BFLHI 0x0038 /* Boardflags (high 16 bits) */
231#define SSB_SPROM2_MAXP_A 0x103A /* A-PHY Max Power */ 232#define SSB_SPROM2_MAXP_A 0x003A /* A-PHY Max Power */
232#define SSB_SPROM2_MAXP_A_HI 0x00FF /* Max Power High */ 233#define SSB_SPROM2_MAXP_A_HI 0x00FF /* Max Power High */
233#define SSB_SPROM2_MAXP_A_LO 0xFF00 /* Max Power Low */ 234#define SSB_SPROM2_MAXP_A_LO 0xFF00 /* Max Power Low */
234#define SSB_SPROM2_MAXP_A_LO_SHIFT 8 235#define SSB_SPROM2_MAXP_A_LO_SHIFT 8
235#define SSB_SPROM2_PA1LOB0 0x103C /* A-PHY PowerAmplifier Low Settings */ 236#define SSB_SPROM2_PA1LOB0 0x003C /* A-PHY PowerAmplifier Low Settings */
236#define SSB_SPROM2_PA1LOB1 0x103E /* A-PHY PowerAmplifier Low Settings */ 237#define SSB_SPROM2_PA1LOB1 0x003E /* A-PHY PowerAmplifier Low Settings */
237#define SSB_SPROM2_PA1LOB2 0x1040 /* A-PHY PowerAmplifier Low Settings */ 238#define SSB_SPROM2_PA1LOB2 0x0040 /* A-PHY PowerAmplifier Low Settings */
238#define SSB_SPROM2_PA1HIB0 0x1042 /* A-PHY PowerAmplifier High Settings */ 239#define SSB_SPROM2_PA1HIB0 0x0042 /* A-PHY PowerAmplifier High Settings */
239#define SSB_SPROM2_PA1HIB1 0x1044 /* A-PHY PowerAmplifier High Settings */ 240#define SSB_SPROM2_PA1HIB1 0x0044 /* A-PHY PowerAmplifier High Settings */
240#define SSB_SPROM2_PA1HIB2 0x1046 /* A-PHY PowerAmplifier High Settings */ 241#define SSB_SPROM2_PA1HIB2 0x0046 /* A-PHY PowerAmplifier High Settings */
241#define SSB_SPROM2_OPO 0x1078 /* OFDM Power Offset from CCK Level */ 242#define SSB_SPROM2_OPO 0x0078 /* OFDM Power Offset from CCK Level */
242#define SSB_SPROM2_OPO_VALUE 0x00FF 243#define SSB_SPROM2_OPO_VALUE 0x00FF
243#define SSB_SPROM2_OPO_UNUSED 0xFF00 244#define SSB_SPROM2_OPO_UNUSED 0xFF00
244#define SSB_SPROM2_CCODE 0x107C /* Two char Country Code */ 245#define SSB_SPROM2_CCODE 0x007C /* Two char Country Code */
245 246
246/* SPROM Revision 3 (inherits most data from rev 2) */ 247/* SPROM Revision 3 (inherits most data from rev 2) */
247#define SSB_SPROM3_IL0MAC 0x104A /* 6 bytes MAC address for 802.11b/g */ 248#define SSB_SPROM3_OFDMAPO 0x002C /* A-PHY OFDM Mid Power Offset (4 bytes, BigEndian) */
248#define SSB_SPROM3_OFDMAPO 0x102C /* A-PHY OFDM Mid Power Offset (4 bytes, BigEndian) */ 249#define SSB_SPROM3_OFDMALPO 0x0030 /* A-PHY OFDM Low Power Offset (4 bytes, BigEndian) */
249#define SSB_SPROM3_OFDMALPO 0x1030 /* A-PHY OFDM Low Power Offset (4 bytes, BigEndian) */ 250#define SSB_SPROM3_OFDMAHPO 0x0034 /* A-PHY OFDM High Power Offset (4 bytes, BigEndian) */
250#define SSB_SPROM3_OFDMAHPO 0x1034 /* A-PHY OFDM High Power Offset (4 bytes, BigEndian) */ 251#define SSB_SPROM3_GPIOLDC 0x0042 /* GPIO LED Powersave Duty Cycle (4 bytes, BigEndian) */
251#define SSB_SPROM3_GPIOLDC 0x1042 /* GPIO LED Powersave Duty Cycle (4 bytes, BigEndian) */
252#define SSB_SPROM3_GPIOLDC_OFF 0x0000FF00 /* Off Count */ 252#define SSB_SPROM3_GPIOLDC_OFF 0x0000FF00 /* Off Count */
253#define SSB_SPROM3_GPIOLDC_OFF_SHIFT 8 253#define SSB_SPROM3_GPIOLDC_OFF_SHIFT 8
254#define SSB_SPROM3_GPIOLDC_ON 0x00FF0000 /* On Count */ 254#define SSB_SPROM3_GPIOLDC_ON 0x00FF0000 /* On Count */
255#define SSB_SPROM3_GPIOLDC_ON_SHIFT 16 255#define SSB_SPROM3_GPIOLDC_ON_SHIFT 16
256#define SSB_SPROM3_CCKPO 0x1078 /* CCK Power Offset */ 256#define SSB_SPROM3_IL0MAC 0x004A /* 6 bytes MAC address for 802.11b/g */
257#define SSB_SPROM3_CCKPO 0x0078 /* CCK Power Offset */
257#define SSB_SPROM3_CCKPO_1M 0x000F /* 1M Rate PO */ 258#define SSB_SPROM3_CCKPO_1M 0x000F /* 1M Rate PO */
258#define SSB_SPROM3_CCKPO_2M 0x00F0 /* 2M Rate PO */ 259#define SSB_SPROM3_CCKPO_2M 0x00F0 /* 2M Rate PO */
259#define SSB_SPROM3_CCKPO_2M_SHIFT 4 260#define SSB_SPROM3_CCKPO_2M_SHIFT 4
@@ -264,100 +265,100 @@
264#define SSB_SPROM3_OFDMGPO 0x107A /* G-PHY OFDM Power Offset (4 bytes, BigEndian) */ 265#define SSB_SPROM3_OFDMGPO 0x107A /* G-PHY OFDM Power Offset (4 bytes, BigEndian) */
265 266
266/* SPROM Revision 4 */ 267/* SPROM Revision 4 */
267#define SSB_SPROM4_IL0MAC 0x104C /* 6 byte MAC address for a/b/g/n */ 268#define SSB_SPROM4_BFLLO 0x0044 /* Boardflags (low 16 bits) */
268#define SSB_SPROM4_ETHPHY 0x105A /* Ethernet PHY settings ?? */ 269#define SSB_SPROM4_BFLHI 0x0046 /* Board Flags Hi */
270#define SSB_SPROM4_IL0MAC 0x004C /* 6 byte MAC address for a/b/g/n */
271#define SSB_SPROM4_CCODE 0x0052 /* Country Code (2 bytes) */
272#define SSB_SPROM4_GPIOA 0x0056 /* Gen. Purpose IO # 0 and 1 */
273#define SSB_SPROM4_GPIOA_P0 0x00FF /* Pin 0 */
274#define SSB_SPROM4_GPIOA_P1 0xFF00 /* Pin 1 */
275#define SSB_SPROM4_GPIOA_P1_SHIFT 8
276#define SSB_SPROM4_GPIOB 0x0058 /* Gen. Purpose IO # 2 and 3 */
277#define SSB_SPROM4_GPIOB_P2 0x00FF /* Pin 2 */
278#define SSB_SPROM4_GPIOB_P3 0xFF00 /* Pin 3 */
279#define SSB_SPROM4_GPIOB_P3_SHIFT 8
280#define SSB_SPROM4_ETHPHY 0x005A /* Ethernet PHY settings ?? */
269#define SSB_SPROM4_ETHPHY_ET0A 0x001F /* MII Address for enet0 */ 281#define SSB_SPROM4_ETHPHY_ET0A 0x001F /* MII Address for enet0 */
270#define SSB_SPROM4_ETHPHY_ET1A 0x03E0 /* MII Address for enet1 */ 282#define SSB_SPROM4_ETHPHY_ET1A 0x03E0 /* MII Address for enet1 */
271#define SSB_SPROM4_ETHPHY_ET1A_SHIFT 5 283#define SSB_SPROM4_ETHPHY_ET1A_SHIFT 5
272#define SSB_SPROM4_ETHPHY_ET0M (1<<14) /* MDIO for enet0 */ 284#define SSB_SPROM4_ETHPHY_ET0M (1<<14) /* MDIO for enet0 */
273#define SSB_SPROM4_ETHPHY_ET1M (1<<15) /* MDIO for enet1 */ 285#define SSB_SPROM4_ETHPHY_ET1M (1<<15) /* MDIO for enet1 */
274#define SSB_SPROM4_CCODE 0x1052 /* Country Code (2 bytes) */ 286#define SSB_SPROM4_ANTAVAIL 0x005D /* Antenna available bitfields */
275#define SSB_SPROM4_ANTAVAIL 0x105D /* Antenna available bitfields */ 287#define SSB_SPROM4_ANTAVAIL_A 0x00FF /* A-PHY bitfield */
276#define SSB_SPROM4_ANTAVAIL_A 0x00FF /* A-PHY bitfield */ 288#define SSB_SPROM4_ANTAVAIL_A_SHIFT 0
277#define SSB_SPROM4_ANTAVAIL_A_SHIFT 0 289#define SSB_SPROM4_ANTAVAIL_BG 0xFF00 /* B-PHY and G-PHY bitfield */
278#define SSB_SPROM4_ANTAVAIL_BG 0xFF00 /* B-PHY and G-PHY bitfield */ 290#define SSB_SPROM4_ANTAVAIL_BG_SHIFT 8
279#define SSB_SPROM4_ANTAVAIL_BG_SHIFT 8 291#define SSB_SPROM4_AGAIN01 0x005E /* Antenna Gain (in dBm Q5.2) */
280#define SSB_SPROM4_BFLLO 0x1044 /* Boardflags (low 16 bits) */
281#define SSB_SPROM4_AGAIN01 0x105E /* Antenna Gain (in dBm Q5.2) */
282#define SSB_SPROM4_AGAIN0 0x00FF /* Antenna 0 */ 292#define SSB_SPROM4_AGAIN0 0x00FF /* Antenna 0 */
283#define SSB_SPROM4_AGAIN0_SHIFT 0 293#define SSB_SPROM4_AGAIN0_SHIFT 0
284#define SSB_SPROM4_AGAIN1 0xFF00 /* Antenna 1 */ 294#define SSB_SPROM4_AGAIN1 0xFF00 /* Antenna 1 */
285#define SSB_SPROM4_AGAIN1_SHIFT 8 295#define SSB_SPROM4_AGAIN1_SHIFT 8
286#define SSB_SPROM4_AGAIN23 0x1060 296#define SSB_SPROM4_AGAIN23 0x0060
287#define SSB_SPROM4_AGAIN2 0x00FF /* Antenna 2 */ 297#define SSB_SPROM4_AGAIN2 0x00FF /* Antenna 2 */
288#define SSB_SPROM4_AGAIN2_SHIFT 0 298#define SSB_SPROM4_AGAIN2_SHIFT 0
289#define SSB_SPROM4_AGAIN3 0xFF00 /* Antenna 3 */ 299#define SSB_SPROM4_AGAIN3 0xFF00 /* Antenna 3 */
290#define SSB_SPROM4_AGAIN3_SHIFT 8 300#define SSB_SPROM4_AGAIN3_SHIFT 8
291#define SSB_SPROM4_BFLHI 0x1046 /* Board Flags Hi */ 301#define SSB_SPROM4_MAXP_BG 0x0080 /* Max Power BG in path 1 */
292#define SSB_SPROM4_MAXP_BG 0x1080 /* Max Power BG in path 1 */
293#define SSB_SPROM4_MAXP_BG_MASK 0x00FF /* Mask for Max Power BG */ 302#define SSB_SPROM4_MAXP_BG_MASK 0x00FF /* Mask for Max Power BG */
294#define SSB_SPROM4_ITSSI_BG 0xFF00 /* Mask for path 1 itssi_bg */ 303#define SSB_SPROM4_ITSSI_BG 0xFF00 /* Mask for path 1 itssi_bg */
295#define SSB_SPROM4_ITSSI_BG_SHIFT 8 304#define SSB_SPROM4_ITSSI_BG_SHIFT 8
296#define SSB_SPROM4_MAXP_A 0x108A /* Max Power A in path 1 */ 305#define SSB_SPROM4_MAXP_A 0x008A /* Max Power A in path 1 */
297#define SSB_SPROM4_MAXP_A_MASK 0x00FF /* Mask for Max Power A */ 306#define SSB_SPROM4_MAXP_A_MASK 0x00FF /* Mask for Max Power A */
298#define SSB_SPROM4_ITSSI_A 0xFF00 /* Mask for path 1 itssi_a */ 307#define SSB_SPROM4_ITSSI_A 0xFF00 /* Mask for path 1 itssi_a */
299#define SSB_SPROM4_ITSSI_A_SHIFT 8 308#define SSB_SPROM4_ITSSI_A_SHIFT 8
300#define SSB_SPROM4_GPIOA 0x1056 /* Gen. Purpose IO # 0 and 1 */ 309#define SSB_SPROM4_PA0B0 0x0082 /* The paXbY locations are */
301#define SSB_SPROM4_GPIOA_P0 0x00FF /* Pin 0 */ 310#define SSB_SPROM4_PA0B1 0x0084 /* only guesses */
302#define SSB_SPROM4_GPIOA_P1 0xFF00 /* Pin 1 */ 311#define SSB_SPROM4_PA0B2 0x0086
303#define SSB_SPROM4_GPIOA_P1_SHIFT 8 312#define SSB_SPROM4_PA1B0 0x008E
304#define SSB_SPROM4_GPIOB 0x1058 /* Gen. Purpose IO # 2 and 3 */ 313#define SSB_SPROM4_PA1B1 0x0090
305#define SSB_SPROM4_GPIOB_P2 0x00FF /* Pin 2 */ 314#define SSB_SPROM4_PA1B2 0x0092
306#define SSB_SPROM4_GPIOB_P3 0xFF00 /* Pin 3 */
307#define SSB_SPROM4_GPIOB_P3_SHIFT 8
308#define SSB_SPROM4_PA0B0 0x1082 /* The paXbY locations are */
309#define SSB_SPROM4_PA0B1 0x1084 /* only guesses */
310#define SSB_SPROM4_PA0B2 0x1086
311#define SSB_SPROM4_PA1B0 0x108E
312#define SSB_SPROM4_PA1B1 0x1090
313#define SSB_SPROM4_PA1B2 0x1092
314 315
315/* SPROM Revision 5 (inherits most data from rev 4) */ 316/* SPROM Revision 5 (inherits most data from rev 4) */
316#define SSB_SPROM5_BFLLO 0x104A /* Boardflags (low 16 bits) */ 317#define SSB_SPROM5_CCODE 0x0044 /* Country Code (2 bytes) */
317#define SSB_SPROM5_BFLHI 0x104C /* Board Flags Hi */ 318#define SSB_SPROM5_BFLLO 0x004A /* Boardflags (low 16 bits) */
318#define SSB_SPROM5_IL0MAC 0x1052 /* 6 byte MAC address for a/b/g/n */ 319#define SSB_SPROM5_BFLHI 0x004C /* Board Flags Hi */
319#define SSB_SPROM5_CCODE 0x1044 /* Country Code (2 bytes) */ 320#define SSB_SPROM5_IL0MAC 0x0052 /* 6 byte MAC address for a/b/g/n */
320#define SSB_SPROM5_GPIOA 0x1076 /* Gen. Purpose IO # 0 and 1 */ 321#define SSB_SPROM5_GPIOA 0x0076 /* Gen. Purpose IO # 0 and 1 */
321#define SSB_SPROM5_GPIOA_P0 0x00FF /* Pin 0 */ 322#define SSB_SPROM5_GPIOA_P0 0x00FF /* Pin 0 */
322#define SSB_SPROM5_GPIOA_P1 0xFF00 /* Pin 1 */ 323#define SSB_SPROM5_GPIOA_P1 0xFF00 /* Pin 1 */
323#define SSB_SPROM5_GPIOA_P1_SHIFT 8 324#define SSB_SPROM5_GPIOA_P1_SHIFT 8
324#define SSB_SPROM5_GPIOB 0x1078 /* Gen. Purpose IO # 2 and 3 */ 325#define SSB_SPROM5_GPIOB 0x0078 /* Gen. Purpose IO # 2 and 3 */
325#define SSB_SPROM5_GPIOB_P2 0x00FF /* Pin 2 */ 326#define SSB_SPROM5_GPIOB_P2 0x00FF /* Pin 2 */
326#define SSB_SPROM5_GPIOB_P3 0xFF00 /* Pin 3 */ 327#define SSB_SPROM5_GPIOB_P3 0xFF00 /* Pin 3 */
327#define SSB_SPROM5_GPIOB_P3_SHIFT 8 328#define SSB_SPROM5_GPIOB_P3_SHIFT 8
328 329
329/* SPROM Revision 8 */ 330/* SPROM Revision 8 */
330#define SSB_SPROM8_BOARDREV 0x1082 /* Board revision */ 331#define SSB_SPROM8_BOARDREV 0x0082 /* Board revision */
331#define SSB_SPROM8_BFLLO 0x1084 /* Board flags (bits 0-15) */ 332#define SSB_SPROM8_BFLLO 0x0084 /* Board flags (bits 0-15) */
332#define SSB_SPROM8_BFLHI 0x1086 /* Board flags (bits 16-31) */ 333#define SSB_SPROM8_BFLHI 0x0086 /* Board flags (bits 16-31) */
333#define SSB_SPROM8_BFL2LO 0x1088 /* Board flags (bits 32-47) */ 334#define SSB_SPROM8_BFL2LO 0x0088 /* Board flags (bits 32-47) */
334#define SSB_SPROM8_BFL2HI 0x108A /* Board flags (bits 48-63) */ 335#define SSB_SPROM8_BFL2HI 0x008A /* Board flags (bits 48-63) */
335#define SSB_SPROM8_IL0MAC 0x108C /* 6 byte MAC address */ 336#define SSB_SPROM8_IL0MAC 0x008C /* 6 byte MAC address */
336#define SSB_SPROM8_CCODE 0x1092 /* 2 byte country code */ 337#define SSB_SPROM8_CCODE 0x0092 /* 2 byte country code */
337#define SSB_SPROM8_ANTAVAIL 0x109C /* Antenna available bitfields*/ 338#define SSB_SPROM8_GPIOA 0x0096 /*Gen. Purpose IO # 0 and 1 */
338#define SSB_SPROM8_ANTAVAIL_A 0xFF00 /* A-PHY bitfield */ 339#define SSB_SPROM8_GPIOA_P0 0x00FF /* Pin 0 */
339#define SSB_SPROM8_ANTAVAIL_A_SHIFT 8 340#define SSB_SPROM8_GPIOA_P1 0xFF00 /* Pin 1 */
340#define SSB_SPROM8_ANTAVAIL_BG 0x00FF /* B-PHY and G-PHY bitfield */ 341#define SSB_SPROM8_GPIOA_P1_SHIFT 8
341#define SSB_SPROM8_ANTAVAIL_BG_SHIFT 0 342#define SSB_SPROM8_GPIOB 0x0098 /* Gen. Purpose IO # 2 and 3 */
342#define SSB_SPROM8_AGAIN01 0x109E /* Antenna Gain (in dBm Q5.2) */ 343#define SSB_SPROM8_GPIOB_P2 0x00FF /* Pin 2 */
344#define SSB_SPROM8_GPIOB_P3 0xFF00 /* Pin 3 */
345#define SSB_SPROM8_GPIOB_P3_SHIFT 8
346#define SSB_SPROM8_ANTAVAIL 0x009C /* Antenna available bitfields*/
347#define SSB_SPROM8_ANTAVAIL_A 0xFF00 /* A-PHY bitfield */
348#define SSB_SPROM8_ANTAVAIL_A_SHIFT 8
349#define SSB_SPROM8_ANTAVAIL_BG 0x00FF /* B-PHY and G-PHY bitfield */
350#define SSB_SPROM8_ANTAVAIL_BG_SHIFT 0
351#define SSB_SPROM8_AGAIN01 0x009E /* Antenna Gain (in dBm Q5.2) */
343#define SSB_SPROM8_AGAIN0 0x00FF /* Antenna 0 */ 352#define SSB_SPROM8_AGAIN0 0x00FF /* Antenna 0 */
344#define SSB_SPROM8_AGAIN0_SHIFT 0 353#define SSB_SPROM8_AGAIN0_SHIFT 0
345#define SSB_SPROM8_AGAIN1 0xFF00 /* Antenna 1 */ 354#define SSB_SPROM8_AGAIN1 0xFF00 /* Antenna 1 */
346#define SSB_SPROM8_AGAIN1_SHIFT 8 355#define SSB_SPROM8_AGAIN1_SHIFT 8
347#define SSB_SPROM8_AGAIN23 0x10A0 356#define SSB_SPROM8_AGAIN23 0x00A0
348#define SSB_SPROM8_AGAIN2 0x00FF /* Antenna 2 */ 357#define SSB_SPROM8_AGAIN2 0x00FF /* Antenna 2 */
349#define SSB_SPROM8_AGAIN2_SHIFT 0 358#define SSB_SPROM8_AGAIN2_SHIFT 0
350#define SSB_SPROM8_AGAIN3 0xFF00 /* Antenna 3 */ 359#define SSB_SPROM8_AGAIN3 0xFF00 /* Antenna 3 */
351#define SSB_SPROM8_AGAIN3_SHIFT 8 360#define SSB_SPROM8_AGAIN3_SHIFT 8
352#define SSB_SPROM8_GPIOA 0x1096 /*Gen. Purpose IO # 0 and 1 */ 361#define SSB_SPROM8_RSSIPARM2G 0x00A4 /* RSSI params for 2GHz */
353#define SSB_SPROM8_GPIOA_P0 0x00FF /* Pin 0 */
354#define SSB_SPROM8_GPIOA_P1 0xFF00 /* Pin 1 */
355#define SSB_SPROM8_GPIOA_P1_SHIFT 8
356#define SSB_SPROM8_GPIOB 0x1098 /* Gen. Purpose IO # 2 and 3 */
357#define SSB_SPROM8_GPIOB_P2 0x00FF /* Pin 2 */
358#define SSB_SPROM8_GPIOB_P3 0xFF00 /* Pin 3 */
359#define SSB_SPROM8_GPIOB_P3_SHIFT 8
360#define SSB_SPROM8_RSSIPARM2G 0x10A4 /* RSSI params for 2GHz */
361#define SSB_SPROM8_RSSISMF2G 0x000F 362#define SSB_SPROM8_RSSISMF2G 0x000F
362#define SSB_SPROM8_RSSISMC2G 0x00F0 363#define SSB_SPROM8_RSSISMC2G 0x00F0
363#define SSB_SPROM8_RSSISMC2G_SHIFT 4 364#define SSB_SPROM8_RSSISMC2G_SHIFT 4
@@ -365,7 +366,7 @@
365#define SSB_SPROM8_RSSISAV2G_SHIFT 8 366#define SSB_SPROM8_RSSISAV2G_SHIFT 8
366#define SSB_SPROM8_BXA2G 0x1800 367#define SSB_SPROM8_BXA2G 0x1800
367#define SSB_SPROM8_BXA2G_SHIFT 11 368#define SSB_SPROM8_BXA2G_SHIFT 11
368#define SSB_SPROM8_RSSIPARM5G 0x10A6 /* RSSI params for 5GHz */ 369#define SSB_SPROM8_RSSIPARM5G 0x00A6 /* RSSI params for 5GHz */
369#define SSB_SPROM8_RSSISMF5G 0x000F 370#define SSB_SPROM8_RSSISMF5G 0x000F
370#define SSB_SPROM8_RSSISMC5G 0x00F0 371#define SSB_SPROM8_RSSISMC5G 0x00F0
371#define SSB_SPROM8_RSSISMC5G_SHIFT 4 372#define SSB_SPROM8_RSSISMC5G_SHIFT 4
@@ -373,47 +374,47 @@
373#define SSB_SPROM8_RSSISAV5G_SHIFT 8 374#define SSB_SPROM8_RSSISAV5G_SHIFT 8
374#define SSB_SPROM8_BXA5G 0x1800 375#define SSB_SPROM8_BXA5G 0x1800
375#define SSB_SPROM8_BXA5G_SHIFT 11 376#define SSB_SPROM8_BXA5G_SHIFT 11
376#define SSB_SPROM8_TRI25G 0x10A8 /* TX isolation 2.4&5.3GHz */ 377#define SSB_SPROM8_TRI25G 0x00A8 /* TX isolation 2.4&5.3GHz */
377#define SSB_SPROM8_TRI2G 0x00FF /* TX isolation 2.4GHz */ 378#define SSB_SPROM8_TRI2G 0x00FF /* TX isolation 2.4GHz */
378#define SSB_SPROM8_TRI5G 0xFF00 /* TX isolation 5.3GHz */ 379#define SSB_SPROM8_TRI5G 0xFF00 /* TX isolation 5.3GHz */
379#define SSB_SPROM8_TRI5G_SHIFT 8 380#define SSB_SPROM8_TRI5G_SHIFT 8
380#define SSB_SPROM8_TRI5GHL 0x10AA /* TX isolation 5.2/5.8GHz */ 381#define SSB_SPROM8_TRI5GHL 0x00AA /* TX isolation 5.2/5.8GHz */
381#define SSB_SPROM8_TRI5GL 0x00FF /* TX isolation 5.2GHz */ 382#define SSB_SPROM8_TRI5GL 0x00FF /* TX isolation 5.2GHz */
382#define SSB_SPROM8_TRI5GH 0xFF00 /* TX isolation 5.8GHz */ 383#define SSB_SPROM8_TRI5GH 0xFF00 /* TX isolation 5.8GHz */
383#define SSB_SPROM8_TRI5GH_SHIFT 8 384#define SSB_SPROM8_TRI5GH_SHIFT 8
384#define SSB_SPROM8_RXPO 0x10AC /* RX power offsets */ 385#define SSB_SPROM8_RXPO 0x00AC /* RX power offsets */
385#define SSB_SPROM8_RXPO2G 0x00FF /* 2GHz RX power offset */ 386#define SSB_SPROM8_RXPO2G 0x00FF /* 2GHz RX power offset */
386#define SSB_SPROM8_RXPO5G 0xFF00 /* 5GHz RX power offset */ 387#define SSB_SPROM8_RXPO5G 0xFF00 /* 5GHz RX power offset */
387#define SSB_SPROM8_RXPO5G_SHIFT 8 388#define SSB_SPROM8_RXPO5G_SHIFT 8
388#define SSB_SPROM8_MAXP_BG 0x10C0 /* Max Power 2GHz in path 1 */ 389#define SSB_SPROM8_MAXP_BG 0x00C0 /* Max Power 2GHz in path 1 */
389#define SSB_SPROM8_MAXP_BG_MASK 0x00FF /* Mask for Max Power 2GHz */ 390#define SSB_SPROM8_MAXP_BG_MASK 0x00FF /* Mask for Max Power 2GHz */
390#define SSB_SPROM8_ITSSI_BG 0xFF00 /* Mask for path 1 itssi_bg */ 391#define SSB_SPROM8_ITSSI_BG 0xFF00 /* Mask for path 1 itssi_bg */
391#define SSB_SPROM8_ITSSI_BG_SHIFT 8 392#define SSB_SPROM8_ITSSI_BG_SHIFT 8
392#define SSB_SPROM8_PA0B0 0x10C2 /* 2GHz power amp settings */ 393#define SSB_SPROM8_PA0B0 0x00C2 /* 2GHz power amp settings */
393#define SSB_SPROM8_PA0B1 0x10C4 394#define SSB_SPROM8_PA0B1 0x00C4
394#define SSB_SPROM8_PA0B2 0x10C6 395#define SSB_SPROM8_PA0B2 0x00C6
395#define SSB_SPROM8_MAXP_A 0x10C8 /* Max Power 5.3GHz */ 396#define SSB_SPROM8_MAXP_A 0x00C8 /* Max Power 5.3GHz */
396#define SSB_SPROM8_MAXP_A_MASK 0x00FF /* Mask for Max Power 5.3GHz */ 397#define SSB_SPROM8_MAXP_A_MASK 0x00FF /* Mask for Max Power 5.3GHz */
397#define SSB_SPROM8_ITSSI_A 0xFF00 /* Mask for path 1 itssi_a */ 398#define SSB_SPROM8_ITSSI_A 0xFF00 /* Mask for path 1 itssi_a */
398#define SSB_SPROM8_ITSSI_A_SHIFT 8 399#define SSB_SPROM8_ITSSI_A_SHIFT 8
399#define SSB_SPROM8_MAXP_AHL 0x10CA /* Max Power 5.2/5.8GHz */ 400#define SSB_SPROM8_MAXP_AHL 0x00CA /* Max Power 5.2/5.8GHz */
400#define SSB_SPROM8_MAXP_AH_MASK 0x00FF /* Mask for Max Power 5.8GHz */ 401#define SSB_SPROM8_MAXP_AH_MASK 0x00FF /* Mask for Max Power 5.8GHz */
401#define SSB_SPROM8_MAXP_AL_MASK 0xFF00 /* Mask for Max Power 5.2GHz */ 402#define SSB_SPROM8_MAXP_AL_MASK 0xFF00 /* Mask for Max Power 5.2GHz */
402#define SSB_SPROM8_MAXP_AL_SHIFT 8 403#define SSB_SPROM8_MAXP_AL_SHIFT 8
403#define SSB_SPROM8_PA1B0 0x10CC /* 5.3GHz power amp settings */ 404#define SSB_SPROM8_PA1B0 0x00CC /* 5.3GHz power amp settings */
404#define SSB_SPROM8_PA1B1 0x10CE 405#define SSB_SPROM8_PA1B1 0x00CE
405#define SSB_SPROM8_PA1B2 0x10D0 406#define SSB_SPROM8_PA1B2 0x00D0
406#define SSB_SPROM8_PA1LOB0 0x10D2 /* 5.2GHz power amp settings */ 407#define SSB_SPROM8_PA1LOB0 0x00D2 /* 5.2GHz power amp settings */
407#define SSB_SPROM8_PA1LOB1 0x10D4 408#define SSB_SPROM8_PA1LOB1 0x00D4
408#define SSB_SPROM8_PA1LOB2 0x10D6 409#define SSB_SPROM8_PA1LOB2 0x00D6
409#define SSB_SPROM8_PA1HIB0 0x10D8 /* 5.8GHz power amp settings */ 410#define SSB_SPROM8_PA1HIB0 0x00D8 /* 5.8GHz power amp settings */
410#define SSB_SPROM8_PA1HIB1 0x10DA 411#define SSB_SPROM8_PA1HIB1 0x00DA
411#define SSB_SPROM8_PA1HIB2 0x10DC 412#define SSB_SPROM8_PA1HIB2 0x00DC
412#define SSB_SPROM8_CCK2GPO 0x1140 /* CCK power offset */ 413#define SSB_SPROM8_CCK2GPO 0x0140 /* CCK power offset */
413#define SSB_SPROM8_OFDM2GPO 0x1142 /* 2.4GHz OFDM power offset */ 414#define SSB_SPROM8_OFDM2GPO 0x0142 /* 2.4GHz OFDM power offset */
414#define SSB_SPROM8_OFDM5GPO 0x1146 /* 5.3GHz OFDM power offset */ 415#define SSB_SPROM8_OFDM5GPO 0x0146 /* 5.3GHz OFDM power offset */
415#define SSB_SPROM8_OFDM5GLPO 0x114A /* 5.2GHz OFDM power offset */ 416#define SSB_SPROM8_OFDM5GLPO 0x014A /* 5.2GHz OFDM power offset */
416#define SSB_SPROM8_OFDM5GHPO 0x114E /* 5.8GHz OFDM power offset */ 417#define SSB_SPROM8_OFDM5GHPO 0x014E /* 5.8GHz OFDM power offset */
417 418
418/* Values for SSB_SPROM1_BINF_CCODE */ 419/* Values for SSB_SPROM1_BINF_CCODE */
419enum { 420enum {
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-10 22:21:13 -0500