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Diffstat (limited to 'include/asm-x86/apic.h')
-rw-r--r--include/asm-x86/apic.h28
1 files changed, 8 insertions, 20 deletions
diff --git a/include/asm-x86/apic.h b/include/asm-x86/apic.h
index 4e2c1e517f06..133c998161ca 100644
--- a/include/asm-x86/apic.h
+++ b/include/asm-x86/apic.h
@@ -3,6 +3,8 @@
3 3
4#include <linux/pm.h> 4#include <linux/pm.h>
5#include <linux/delay.h> 5#include <linux/delay.h>
6
7#include <asm/alternative.h>
6#include <asm/fixmap.h> 8#include <asm/fixmap.h>
7#include <asm/apicdef.h> 9#include <asm/apicdef.h>
8#include <asm/processor.h> 10#include <asm/processor.h>
@@ -10,8 +12,6 @@
10 12
11#define ARCH_APICTIMER_STOPS_ON_C3 1 13#define ARCH_APICTIMER_STOPS_ON_C3 1
12 14
13#define Dprintk(x...)
14
15/* 15/*
16 * Debugging macros 16 * Debugging macros
17 */ 17 */
@@ -35,7 +35,7 @@ extern void generic_apic_probe(void);
35 35
36#ifdef CONFIG_X86_LOCAL_APIC 36#ifdef CONFIG_X86_LOCAL_APIC
37 37
38extern int apic_verbosity; 38extern unsigned int apic_verbosity;
39extern int local_apic_timer_c2_ok; 39extern int local_apic_timer_c2_ok;
40 40
41extern int ioapic_force; 41extern int ioapic_force;
@@ -48,7 +48,6 @@ extern int disable_apic;
48#include <asm/paravirt.h> 48#include <asm/paravirt.h>
49#else 49#else
50#define apic_write native_apic_write 50#define apic_write native_apic_write
51#define apic_write_atomic native_apic_write_atomic
52#define apic_read native_apic_read 51#define apic_read native_apic_read
53#define setup_boot_clock setup_boot_APIC_clock 52#define setup_boot_clock setup_boot_APIC_clock
54#define setup_secondary_clock setup_secondary_APIC_clock 53#define setup_secondary_clock setup_secondary_APIC_clock
@@ -58,12 +57,11 @@ extern int is_vsmp_box(void);
58 57
59static inline void native_apic_write(unsigned long reg, u32 v) 58static inline void native_apic_write(unsigned long reg, u32 v)
60{ 59{
61 *((volatile u32 *)(APIC_BASE + reg)) = v; 60 volatile u32 *addr = (volatile u32 *)(APIC_BASE + reg);
62}
63 61
64static inline void native_apic_write_atomic(unsigned long reg, u32 v) 62 alternative_io("movl %0, %1", "xchgl %0, %1", X86_FEATURE_11AP,
65{ 63 ASM_OUTPUT2("=r" (v), "=m" (*addr)),
66 (void)xchg((u32 *)(APIC_BASE + reg), v); 64 ASM_OUTPUT2("0" (v), "m" (*addr)));
67} 65}
68 66
69static inline u32 native_apic_read(unsigned long reg) 67static inline u32 native_apic_read(unsigned long reg)
@@ -75,16 +73,6 @@ extern void apic_wait_icr_idle(void);
75extern u32 safe_apic_wait_icr_idle(void); 73extern u32 safe_apic_wait_icr_idle(void);
76extern int get_physical_broadcast(void); 74extern int get_physical_broadcast(void);
77 75
78#ifdef CONFIG_X86_GOOD_APIC
79# define FORCE_READ_AROUND_WRITE 0
80# define apic_read_around(x)
81# define apic_write_around(x, y) apic_write((x), (y))
82#else
83# define FORCE_READ_AROUND_WRITE 1
84# define apic_read_around(x) apic_read(x)
85# define apic_write_around(x, y) apic_write_atomic((x), (y))
86#endif
87
88static inline void ack_APIC_irq(void) 76static inline void ack_APIC_irq(void)
89{ 77{
90 /* 78 /*
@@ -95,7 +83,7 @@ static inline void ack_APIC_irq(void)
95 */ 83 */
96 84
97 /* Docs say use 0 for future compatibility */ 85 /* Docs say use 0 for future compatibility */
98 apic_write_around(APIC_EOI, 0); 86 apic_write(APIC_EOI, 0);
99} 87}
100 88
101extern int lapic_get_maxlvt(void); 89extern int lapic_get_maxlvt(void);