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-rw-r--r--include/asm-ppc/bseip.h38
-rw-r--r--include/asm-ppc/btext.h2
-rw-r--r--include/asm-ppc/ipic.h85
-rw-r--r--include/asm-ppc/machdep.h4
-rw-r--r--include/asm-ppc/mpc85xx.h4
-rw-r--r--include/asm-ppc/pci-bridge.h9
-rw-r--r--include/asm-ppc/prom.h32
7 files changed, 49 insertions, 125 deletions
diff --git a/include/asm-ppc/bseip.h b/include/asm-ppc/bseip.h
deleted file mode 100644
index 691f4a52b0a5..000000000000
--- a/include/asm-ppc/bseip.h
+++ /dev/null
@@ -1,38 +0,0 @@
1/*
2 * A collection of structures, addresses, and values associated with
3 * the Bright Star Engineering ip-Engine board. Copied from the MBX stuff.
4 *
5 * Copyright (c) 1998 Dan Malek (dmalek@jlc.net)
6 */
7#ifndef __MACH_BSEIP_DEFS
8#define __MACH_BSEIP_DEFS
9
10#ifndef __ASSEMBLY__
11/* A Board Information structure that is given to a program when
12 * prom starts it up.
13 */
14typedef struct bd_info {
15 unsigned int bi_memstart; /* Memory start address */
16 unsigned int bi_memsize; /* Memory (end) size in bytes */
17 unsigned int bi_intfreq; /* Internal Freq, in Hz */
18 unsigned int bi_busfreq; /* Bus Freq, in Hz */
19 unsigned char bi_enetaddr[6];
20 unsigned int bi_baudrate;
21} bd_t;
22
23extern bd_t m8xx_board_info;
24
25/* Memory map is configured by the PROM startup.
26 * All we need to get started is the IMMR.
27 */
28#define IMAP_ADDR ((uint)0xff000000)
29#define IMAP_SIZE ((uint)(64 * 1024))
30#define PCMCIA_MEM_ADDR ((uint)0x04000000)
31#define PCMCIA_MEM_SIZE ((uint)(64 * 1024))
32#endif /* !__ASSEMBLY__ */
33
34/* We don't use the 8259.
35*/
36#define NR_8259_INTS 0
37
38#endif
diff --git a/include/asm-ppc/btext.h b/include/asm-ppc/btext.h
index ccaefabe0bf5..ed3630251b3b 100644
--- a/include/asm-ppc/btext.h
+++ b/include/asm-ppc/btext.h
@@ -17,7 +17,7 @@ extern unsigned long disp_BAT[2];
17extern boot_infos_t disp_bi; 17extern boot_infos_t disp_bi;
18extern int boot_text_mapped; 18extern int boot_text_mapped;
19 19
20extern void init_boot_display(void); 20extern void btext_init(boot_infos_t *bi);
21extern void btext_welcome(void); 21extern void btext_welcome(void);
22extern void btext_prepare_BAT(void); 22extern void btext_prepare_BAT(void);
23extern void btext_setup_display(int width, int height, int depth, int pitch, 23extern void btext_setup_display(int width, int height, int depth, int pitch,
diff --git a/include/asm-ppc/ipic.h b/include/asm-ppc/ipic.h
deleted file mode 100644
index 0fe396a2b666..000000000000
--- a/include/asm-ppc/ipic.h
+++ /dev/null
@@ -1,85 +0,0 @@
1/*
2 * include/asm-ppc/ipic.h
3 *
4 * IPIC external definitions and structure.
5 *
6 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
7 *
8 * Copyright 2005 Freescale Semiconductor, Inc
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 */
15#ifdef __KERNEL__
16#ifndef __ASM_IPIC_H__
17#define __ASM_IPIC_H__
18
19#include <linux/irq.h>
20
21/* Flags when we init the IPIC */
22#define IPIC_SPREADMODE_GRP_A 0x00000001
23#define IPIC_SPREADMODE_GRP_D 0x00000002
24#define IPIC_SPREADMODE_MIX_A 0x00000004
25#define IPIC_SPREADMODE_MIX_B 0x00000008
26#define IPIC_DISABLE_MCP_OUT 0x00000010
27#define IPIC_IRQ0_MCP 0x00000020
28
29/* IPIC registers offsets */
30#define IPIC_SICFR 0x00 /* System Global Interrupt Configuration Register */
31#define IPIC_SIVCR 0x04 /* System Global Interrupt Vector Register */
32#define IPIC_SIPNR_H 0x08 /* System Internal Interrupt Pending Register (HIGH) */
33#define IPIC_SIPNR_L 0x0C /* System Internal Interrupt Pending Register (LOW) */
34#define IPIC_SIPRR_A 0x10 /* System Internal Interrupt group A Priority Register */
35#define IPIC_SIPRR_B 0x14 /* System Internal Interrupt group B Priority Register */
36#define IPIC_SIPRR_C 0x18 /* System Internal Interrupt group C Priority Register */
37#define IPIC_SIPRR_D 0x1C /* System Internal Interrupt group D Priority Register */
38#define IPIC_SIMSR_H 0x20 /* System Internal Interrupt Mask Register (HIGH) */
39#define IPIC_SIMSR_L 0x24 /* System Internal Interrupt Mask Register (LOW) */
40#define IPIC_SICNR 0x28 /* System Internal Interrupt Control Register */
41#define IPIC_SEPNR 0x2C /* System External Interrupt Pending Register */
42#define IPIC_SMPRR_A 0x30 /* System Mixed Interrupt group A Priority Register */
43#define IPIC_SMPRR_B 0x34 /* System Mixed Interrupt group B Priority Register */
44#define IPIC_SEMSR 0x38 /* System External Interrupt Mask Register */
45#define IPIC_SECNR 0x3C /* System External Interrupt Control Register */
46#define IPIC_SERSR 0x40 /* System Error Status Register */
47#define IPIC_SERMR 0x44 /* System Error Mask Register */
48#define IPIC_SERCR 0x48 /* System Error Control Register */
49#define IPIC_SIFCR_H 0x50 /* System Internal Interrupt Force Register (HIGH) */
50#define IPIC_SIFCR_L 0x54 /* System Internal Interrupt Force Register (LOW) */
51#define IPIC_SEFCR 0x58 /* System External Interrupt Force Register */
52#define IPIC_SERFR 0x5C /* System Error Force Register */
53#define IPIC_SCVCR 0x60 /* System Critical Interrupt Vector Register */
54#define IPIC_SMVCR 0x64 /* System Management Interrupt Vector Register */
55
56enum ipic_prio_grp {
57 IPIC_INT_GRP_A = IPIC_SIPRR_A,
58 IPIC_INT_GRP_D = IPIC_SIPRR_D,
59 IPIC_MIX_GRP_A = IPIC_SMPRR_A,
60 IPIC_MIX_GRP_B = IPIC_SMPRR_B,
61};
62
63enum ipic_mcp_irq {
64 IPIC_MCP_IRQ0 = 0,
65 IPIC_MCP_WDT = 1,
66 IPIC_MCP_SBA = 2,
67 IPIC_MCP_PCI1 = 5,
68 IPIC_MCP_PCI2 = 6,
69 IPIC_MCP_MU = 7,
70};
71
72extern void ipic_init(phys_addr_t phys_addr, unsigned int flags,
73 unsigned int irq_offset,
74 unsigned char *senses, unsigned int senses_count);
75extern int ipic_set_priority(unsigned int irq, unsigned int priority);
76extern void ipic_set_highest_priority(unsigned int irq);
77extern void ipic_set_default_priority(void);
78extern void ipic_enable_mcp(enum ipic_mcp_irq mcp_irq);
79extern void ipic_disable_mcp(enum ipic_mcp_irq mcp_irq);
80extern u32 ipic_get_mcp_status(void);
81extern void ipic_clear_mcp_status(u32 mask);
82extern int ipic_get_irq(struct pt_regs *regs);
83
84#endif /* __ASM_IPIC_H__ */
85#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/machdep.h b/include/asm-ppc/machdep.h
index f01255bd1dc3..39200def8d11 100644
--- a/include/asm-ppc/machdep.h
+++ b/include/asm-ppc/machdep.h
@@ -35,8 +35,10 @@ struct machdep_calls {
35 int (*get_irq)(struct pt_regs *); 35 int (*get_irq)(struct pt_regs *);
36 36
37 /* A general init function, called by ppc_init in init/main.c. 37 /* A general init function, called by ppc_init in init/main.c.
38 May be NULL. */ 38 May be NULL. DEPRECATED ! */
39 void (*init)(void); 39 void (*init)(void);
40 /* For compatibility with merged platforms */
41 void (*init_early)(void);
40 42
41 void (*restart)(char *cmd); 43 void (*restart)(char *cmd);
42 void (*power_off)(void); 44 void (*power_off)(void);
diff --git a/include/asm-ppc/mpc85xx.h b/include/asm-ppc/mpc85xx.h
index 9d14baea3d71..c8a96aa44fb7 100644
--- a/include/asm-ppc/mpc85xx.h
+++ b/include/asm-ppc/mpc85xx.h
@@ -37,6 +37,10 @@
37#ifdef CONFIG_STX_GP3 37#ifdef CONFIG_STX_GP3
38#include <platforms/85xx/stx_gp3.h> 38#include <platforms/85xx/stx_gp3.h>
39#endif 39#endif
40#if defined(CONFIG_TQM8540) || defined(CONFIG_TQM8541) || \
41 defined(CONFIG_TQM8555) || defined(CONFIG_TQM8560)
42#include <platforms/85xx/tqm85xx.h>
43#endif
40 44
41#define _IO_BASE isa_io_base 45#define _IO_BASE isa_io_base
42#define _ISA_MEM_BASE isa_mem_base 46#define _ISA_MEM_BASE isa_mem_base
diff --git a/include/asm-ppc/pci-bridge.h b/include/asm-ppc/pci-bridge.h
index e58c78f90a5a..9d5230689b31 100644
--- a/include/asm-ppc/pci-bridge.h
+++ b/include/asm-ppc/pci-bridge.h
@@ -137,5 +137,14 @@ static inline unsigned char bridge_swizzle(unsigned char pin,
137 */ 137 */
138extern int pciauto_bus_scan(struct pci_controller *, int); 138extern int pciauto_bus_scan(struct pci_controller *, int);
139 139
140#ifdef CONFIG_PCI
141extern unsigned long pci_address_to_pio(phys_addr_t address);
142#else
143static inline unsigned long pci_address_to_pio(phys_addr_t address)
144{
145 return (unsigned long)-1;
146}
147#endif
148
140#endif 149#endif
141#endif /* __KERNEL__ */ 150#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/prom.h b/include/asm-ppc/prom.h
index 3e39827ed566..eb317a0806e4 100644
--- a/include/asm-ppc/prom.h
+++ b/include/asm-ppc/prom.h
@@ -136,5 +136,37 @@ extern unsigned long sub_reloc_offset(unsigned long);
136#define PTRRELOC(x) ((typeof(x))add_reloc_offset((unsigned long)(x))) 136#define PTRRELOC(x) ((typeof(x))add_reloc_offset((unsigned long)(x)))
137#define PTRUNRELOC(x) ((typeof(x))sub_reloc_offset((unsigned long)(x))) 137#define PTRUNRELOC(x) ((typeof(x))sub_reloc_offset((unsigned long)(x)))
138 138
139
140/*
141 * OF address retreival & translation
142 */
143
144
145/* Translate an OF address block into a CPU physical address
146 */
147#define OF_BAD_ADDR ((u64)-1)
148extern u64 of_translate_address(struct device_node *np, u32 *addr);
149
150/* Extract an address from a device, returns the region size and
151 * the address space flags too. The PCI version uses a BAR number
152 * instead of an absolute index
153 */
154extern u32 *of_get_address(struct device_node *dev, int index,
155 u64 *size, unsigned int *flags);
156extern u32 *of_get_pci_address(struct device_node *dev, int bar_no,
157 u64 *size, unsigned int *flags);
158
159/* Get an address as a resource. Note that if your address is
160 * a PIO address, the conversion will fail if the physical address
161 * can't be internally converted to an IO token with
162 * pci_address_to_pio(), that is because it's either called to early
163 * or it can't be matched to any host bridge IO space
164 */
165extern int of_address_to_resource(struct device_node *dev, int index,
166 struct resource *r);
167extern int of_pci_address_to_resource(struct device_node *dev, int bar,
168 struct resource *r);
169
170
139#endif /* _PPC_PROM_H */ 171#endif /* _PPC_PROM_H */
140#endif /* __KERNEL__ */ 172#endif /* __KERNEL__ */
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-17 21:29:07 -0500