diff options
Diffstat (limited to 'include/asm-blackfin/mach-bf548/cdefBF54x_base.h')
| -rw-r--r-- | include/asm-blackfin/mach-bf548/cdefBF54x_base.h | 33 |
1 files changed, 0 insertions, 33 deletions
diff --git a/include/asm-blackfin/mach-bf548/cdefBF54x_base.h b/include/asm-blackfin/mach-bf548/cdefBF54x_base.h index 19ddcd83c71f..d8d2f1f127db 100644 --- a/include/asm-blackfin/mach-bf548/cdefBF54x_base.h +++ b/include/asm-blackfin/mach-bf548/cdefBF54x_base.h | |||
| @@ -211,39 +211,6 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val) | |||
| 211 | 211 | ||
| 212 | /* Two Wire Interface Registers (TWI0) */ | 212 | /* Two Wire Interface Registers (TWI0) */ |
| 213 | 213 | ||
| 214 | #define bfin_read_TWI0_CLKDIV() bfin_read16(TWI0_CLKDIV) | ||
| 215 | #define bfin_write_TWI0_CLKDIV(val) bfin_write16(TWI0_CLKDIV, val) | ||
| 216 | #define bfin_read_TWI0_CONTROL() bfin_read16(TWI0_CONTROL) | ||
| 217 | #define bfin_write_TWI0_CONTROL(val) bfin_write16(TWI0_CONTROL, val) | ||
| 218 | #define bfin_read_TWI0_SLAVE_CTRL() bfin_read16(TWI0_SLAVE_CTRL) | ||
| 219 | #define bfin_write_TWI0_SLAVE_CTRL(val) bfin_write16(TWI0_SLAVE_CTRL, val) | ||
| 220 | #define bfin_read_TWI0_SLAVE_STAT() bfin_read16(TWI0_SLAVE_STAT) | ||
| 221 | #define bfin_write_TWI0_SLAVE_STAT(val) bfin_write16(TWI0_SLAVE_STAT, val) | ||
| 222 | #define bfin_read_TWI0_SLAVE_ADDR() bfin_read16(TWI0_SLAVE_ADDR) | ||
| 223 | #define bfin_write_TWI0_SLAVE_ADDR(val) bfin_write16(TWI0_SLAVE_ADDR, val) | ||
| 224 | #define bfin_read_TWI0_MASTER_CTRL() bfin_read16(TWI0_MASTER_CTRL) | ||
| 225 | #define bfin_write_TWI0_MASTER_CTRL(val) bfin_write16(TWI0_MASTER_CTRL, val) | ||
| 226 | #define bfin_read_TWI0_MASTER_STAT() bfin_read16(TWI0_MASTER_STAT) | ||
| 227 | #define bfin_write_TWI0_MASTER_STAT(val) bfin_write16(TWI0_MASTER_STAT, val) | ||
| 228 | #define bfin_read_TWI0_MASTER_ADDR() bfin_read16(TWI0_MASTER_ADDR) | ||
| 229 | #define bfin_write_TWI0_MASTER_ADDR(val) bfin_write16(TWI0_MASTER_ADDR, val) | ||
| 230 | #define bfin_read_TWI0_INT_STAT() bfin_read16(TWI0_INT_STAT) | ||
| 231 | #define bfin_write_TWI0_INT_STAT(val) bfin_write16(TWI0_INT_STAT, val) | ||
| 232 | #define bfin_read_TWI0_INT_MASK() bfin_read16(TWI0_INT_MASK) | ||
| 233 | #define bfin_write_TWI0_INT_MASK(val) bfin_write16(TWI0_INT_MASK, val) | ||
| 234 | #define bfin_read_TWI0_FIFO_CTRL() bfin_read16(TWI0_FIFO_CTRL) | ||
| 235 | #define bfin_write_TWI0_FIFO_CTRL(val) bfin_write16(TWI0_FIFO_CTRL, val) | ||
| 236 | #define bfin_read_TWI0_FIFO_STAT() bfin_read16(TWI0_FIFO_STAT) | ||
| 237 | #define bfin_write_TWI0_FIFO_STAT(val) bfin_write16(TWI0_FIFO_STAT, val) | ||
| 238 | #define bfin_read_TWI0_XMT_DATA8() bfin_read16(TWI0_XMT_DATA8) | ||
| 239 | #define bfin_write_TWI0_XMT_DATA8(val) bfin_write16(TWI0_XMT_DATA8, val) | ||
| 240 | #define bfin_read_TWI0_XMT_DATA16() bfin_read16(TWI0_XMT_DATA16) | ||
| 241 | #define bfin_write_TWI0_XMT_DATA16(val) bfin_write16(TWI0_XMT_DATA16, val) | ||
| 242 | #define bfin_read_TWI0_RCV_DATA8() bfin_read16(TWI0_RCV_DATA8) | ||
| 243 | #define bfin_write_TWI0_RCV_DATA8(val) bfin_write16(TWI0_RCV_DATA8, val) | ||
| 244 | #define bfin_read_TWI0_RCV_DATA16() bfin_read16(TWI0_RCV_DATA16) | ||
| 245 | #define bfin_write_TWI0_RCV_DATA16(val) bfin_write16(TWI0_RCV_DATA16, val) | ||
| 246 | |||
| 247 | /* SPORT0 is not defined in the shared file because it is not available on the ADSP-BF542 and ADSP-BF544 bfin_read_()rocessors */ | 214 | /* SPORT0 is not defined in the shared file because it is not available on the ADSP-BF542 and ADSP-BF544 bfin_read_()rocessors */ |
| 248 | 215 | ||
| 249 | /* SPORT1 Registers */ | 216 | /* SPORT1 Registers */ |