aboutsummaryrefslogtreecommitdiffstats
path: root/include/asm-arm
diff options
context:
space:
mode:
Diffstat (limited to 'include/asm-arm')
-rw-r--r--include/asm-arm/arch-aaec2000/aaec2000.h151
-rw-r--r--include/asm-arm/arch-aaec2000/debug-macro.S36
-rw-r--r--include/asm-arm/arch-aaec2000/dma.h17
-rw-r--r--include/asm-arm/arch-aaec2000/entry-macro.S33
-rw-r--r--include/asm-arm/arch-aaec2000/hardware.h49
-rw-r--r--include/asm-arm/arch-aaec2000/io.h19
-rw-r--r--include/asm-arm/arch-aaec2000/irqs.h46
-rw-r--r--include/asm-arm/arch-aaec2000/memory.h73
-rw-r--r--include/asm-arm/arch-aaec2000/param.h15
-rw-r--r--include/asm-arm/arch-aaec2000/system.h24
-rw-r--r--include/asm-arm/arch-aaec2000/timex.h18
-rw-r--r--include/asm-arm/arch-aaec2000/uncompress.h47
-rw-r--r--include/asm-arm/arch-aaec2000/vmalloc.h16
-rw-r--r--include/asm-arm/arch-integrator/platform.h4
-rw-r--r--include/asm-arm/arch-integrator/smp.h19
-rw-r--r--include/asm-arm/arch-ixp2000/io.h16
-rw-r--r--include/asm-arm/arch-ixp2000/ixp2000-regs.h1
-rw-r--r--include/asm-arm/arch-pxa/pxa-regs.h2
-rw-r--r--include/asm-arm/arch-versatile/hardware.h27
-rw-r--r--include/asm-arm/arch-versatile/io.h2
-rw-r--r--include/asm-arm/arch-versatile/platform.h33
-rw-r--r--include/asm-arm/cacheflush.h3
-rw-r--r--include/asm-arm/elf.h4
-rw-r--r--include/asm-arm/io.h27
-rw-r--r--include/asm-arm/smp.h16
-rw-r--r--include/asm-arm/system.h3
26 files changed, 671 insertions, 30 deletions
diff --git a/include/asm-arm/arch-aaec2000/aaec2000.h b/include/asm-arm/arch-aaec2000/aaec2000.h
new file mode 100644
index 000000000000..0e9b7e18af05
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/aaec2000.h
@@ -0,0 +1,151 @@
1/*
2 * linux/include/asm-arm/arch-aaec2000/aaec2000.h
3 *
4 * AAEC-2000 registers definition
5 *
6 * Copyright (c) 2005 Nicolas Bellido Y Ortega
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __ASM_ARCH_AAEC2000_H
14#define __ASM_ARCH_AAEC2000_H
15
16#ifndef __ASM_ARCH_HARDWARE_H
17#error You must include hardware.h not this file
18#endif /* __ASM_ARCH_HARDWARE_H */
19
20/* Interrupt controller */
21#define IRQ_BASE __REG(0x80000500)
22#define IRQ_INTSR __REG(0x80000500) /* Int Status Register */
23#define IRQ_INTRSR __REG(0x80000504) /* Int Raw (unmasked) Status */
24#define IRQ_INTENS __REG(0x80000508) /* Int Enable Set */
25#define IRQ_INTENC __REG(0x8000050c) /* Int Enable Clear */
26
27/* UART 1 */
28#define UART1_BASE __REG(0x80000600)
29#define UART1_DR __REG(0x80000600) /* Data/FIFO Register */
30#define UART1_LCR __REG(0x80000604) /* Link Control Register */
31#define UART1_BRCR __REG(0x80000608) /* Baud Rate Control Register */
32#define UART1_CR __REG(0x8000060c) /* Control Register */
33#define UART1_SR __REG(0x80000610) /* Status Register */
34#define UART1_INT __REG(0x80000614) /* Interrupt Status Register */
35#define UART1_INTM __REG(0x80000618) /* Interrupt Mask Register */
36#define UART1_INTRES __REG(0x8000061c) /* Int Result (masked status) Register */
37
38/* UART 2 */
39#define UART2_BASE __REG(0x80000700)
40#define UART2_DR __REG(0x80000700) /* Data/FIFO Register */
41#define UART2_LCR __REG(0x80000704) /* Link Control Register */
42#define UART2_BRCR __REG(0x80000708) /* Baud Rate Control Register */
43#define UART2_CR __REG(0x8000070c) /* Control Register */
44#define UART2_SR __REG(0x80000710) /* Status Register */
45#define UART2_INT __REG(0x80000714) /* Interrupt Status Register */
46#define UART2_INTM __REG(0x80000718) /* Interrupt Mask Register */
47#define UART2_INTRES __REG(0x8000071c) /* Int Result (masked status) Register */
48
49/* UART 3 */
50#define UART3_BASE __REG(0x80000800)
51#define UART3_DR __REG(0x80000800) /* Data/FIFO Register */
52#define UART3_LCR __REG(0x80000804) /* Link Control Register */
53#define UART3_BRCR __REG(0x80000808) /* Baud Rate Control Register */
54#define UART3_CR __REG(0x8000080c) /* Control Register */
55#define UART3_SR __REG(0x80000810) /* Status Register */
56#define UART3_INT __REG(0x80000814) /* Interrupt Status Register */
57#define UART3_INTM __REG(0x80000818) /* Interrupt Mask Register */
58#define UART3_INTRES __REG(0x8000081c) /* Int Result (masked status) Register */
59
60/* These are used in some places */
61#define _UART1_BASE __PREG(UART1_BASE)
62#define _UART2_BASE __PREG(UART2_BASE)
63#define _UART3_BASE __PREG(UART3_BASE)
64
65/* UART Registers Offsets */
66#define UART_DR 0x00
67#define UART_LCR 0x04
68#define UART_BRCR 0x08
69#define UART_CR 0x0c
70#define UART_SR 0x10
71#define UART_INT 0x14
72#define UART_INTM 0x18
73#define UART_INTRES 0x1c
74
75/* UART_LCR Bitmask */
76#define UART_LCR_BRK (1 << 0) /* Send Break */
77#define UART_LCR_PEN (1 << 1) /* Parity Enable */
78#define UART_LCR_EP (1 << 2) /* Even/Odd Parity */
79#define UART_LCR_S2 (1 << 3) /* One/Two Stop bits */
80#define UART_LCR_FIFO (1 << 4) /* FIFO Enable */
81#define UART_LCR_WL5 (0 << 5) /* Word Length - 5 bits */
82#define UART_LCR_WL6 (1 << 5) /* Word Length - 6 bits */
83#define UART_LCR_WL7 (1 << 6) /* Word Length - 7 bits */
84#define UART_LCR_WL8 (1 << 7) /* Word Length - 8 bits */
85
86/* UART_CR Bitmask */
87#define UART_CR_EN (1 << 0) /* UART Enable */
88#define UART_CR_SIR (1 << 1) /* IrDA SIR Enable */
89#define UART_CR_SIRLP (1 << 2) /* Low Power IrDA Enable */
90#define UART_CR_RXP (1 << 3) /* Receive Pin Polarity */
91#define UART_CR_TXP (1 << 4) /* Transmit Pin Polarity */
92#define UART_CR_MXP (1 << 5) /* Modem Pin Polarity */
93#define UART_CR_LOOP (1 << 6) /* Loopback Mode */
94
95/* UART_SR Bitmask */
96#define UART_SR_CTS (1 << 0) /* Clear To Send Status */
97#define UART_SR_DSR (1 << 1) /* Data Set Ready Status */
98#define UART_SR_DCD (1 << 2) /* Data Carrier Detect Status */
99#define UART_SR_TxBSY (1 << 3) /* Transmitter Busy Status */
100#define UART_SR_RxFE (1 << 4) /* Receive FIFO Empty Status */
101#define UART_SR_TxFF (1 << 5) /* Transmit FIFO Full Status */
102#define UART_SR_RxFF (1 << 6) /* Receive FIFO Full Status */
103#define UART_SR_TxFE (1 << 7) /* Transmit FIFO Empty Status */
104
105/* UART_INT Bitmask */
106#define UART_INT_RIS (1 << 0) /* Rx Interrupt */
107#define UART_INT_TIS (1 << 1) /* Tx Interrupt */
108#define UART_INT_MIS (1 << 2) /* Modem Interrupt */
109#define UART_INT_RTIS (1 << 3) /* Receive Timeout Interrupt */
110
111/* Timer 1 */
112#define TIMER1_BASE __REG(0x80000c00)
113#define TIMER1_LOAD __REG(0x80000c00) /* Timer 1 Load Register */
114#define TIMER1_VAL __REG(0x80000c04) /* Timer 1 Value Register */
115#define TIMER1_CTRL __REG(0x80000c08) /* Timer 1 Control Register */
116#define TIMER1_CLEAR __REG(0x80000c0c) /* Timer 1 Clear Register */
117
118/* Timer 2 */
119#define TIMER2_BASE __REG(0x80000d00)
120#define TIMER2_LOAD __REG(0x80000d00) /* Timer 2 Load Register */
121#define TIMER2_VAL __REG(0x80000d04) /* Timer 2 Value Register */
122#define TIMER2_CTRL __REG(0x80000d08) /* Timer 2 Control Register */
123#define TIMER2_CLEAR __REG(0x80000d0c) /* Timer 2 Clear Register */
124
125/* Timer 3 */
126#define TIMER3_BASE __REG(0x80000e00)
127#define TIMER3_LOAD __REG(0x80000e00) /* Timer 3 Load Register */
128#define TIMER3_VAL __REG(0x80000e04) /* Timer 3 Value Register */
129#define TIMER3_CTRL __REG(0x80000e08) /* Timer 3 Control Register */
130#define TIMER3_CLEAR __REG(0x80000e0c) /* Timer 3 Clear Register */
131
132/* Timer Control register bits */
133#define TIMER_CTRL_ENABLE (1 << 7) /* Enable (Start° Timer */
134#define TIMER_CTRL_PERIODIC (1 << 6) /* Periodic Running Mode */
135#define TIMER_CTRL_FREE_RUNNING (0 << 6) /* Normal Running Mode */
136#define TIMER_CTRL_CLKSEL_508K (1 << 3) /* 508KHz Clock select (Timer 1, 2) */
137#define TIMER_CTRL_CLKSEL_2K (0 << 3) /* 2KHz Clock Select (Timer 1, 2)*/
138
139/* Power and State Control */
140#define POWER_BASE __REG(0x80000400)
141#define POWER_PWRSR __REG(0x80000400) /* Power Status Register */
142#define POWER_PWRCNT __REG(0x80000404) /* Power/Clock control */
143#define POWER_HALT __REG(0x80000408) /* Power Idle Mode */
144#define POWER_STDBY __REG(0x8000040c) /* Power Standby Mode */
145#define POWER_BLEOI __REG(0x80000410) /* Battery Low End of Interrupt */
146#define POWER_MCEOI __REG(0x80000414) /* Media Changed EoI */
147#define POWER_TEOI __REG(0x80000418) /* Tick EoI */
148#define POWER_STFCLR __REG(0x8000041c) /* NbFlg, RSTFlg, PFFlg, CLDFlg Clear */
149#define POWER_CLKSET __REG(0x80000420) /* Clock Speed Control */
150
151#endif /* __ARM_ARCH_AAEC2000_H */
diff --git a/include/asm-arm/arch-aaec2000/debug-macro.S b/include/asm-arm/arch-aaec2000/debug-macro.S
new file mode 100644
index 000000000000..e4f1fa539a74
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/debug-macro.S
@@ -0,0 +1,36 @@
1/* linux/include/asm-arm/arch-aaec2000/debug-macro.S
2 *
3 * Debugging macro include header
4 *
5 * Copyright (c) 2005 Nicolas Bellido Y Ortega
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12 .macro addruart,rx
13 mrc p15, 0, \rx, c1, c0
14 tst \rx, #1 @ MMU enabled?
15 moveq \rx, #0x80000000 @ physical
16 movne \rx, #io_p2v(0x80000000) @ virtual
17 orr \rx, \rx, #0x00000800
18 .endm
19
20 .macro senduart,rd,rx
21 str \rd, [\rx, #0]
22 .endm
23
24 .macro busyuart,rd,rx
251002: ldr \rd, [\rx, #0x10]
26 tst \rd, #(1 << 7)
27 beq 1002b
28 .endm
29
30 .macro waituart,rd,rx
31#if 0
321001: ldr \rd, [\rx, #0x10]
33 tst \rd, #(1 << 5)
34 beq 1001b
35#endif
36 .endm
diff --git a/include/asm-arm/arch-aaec2000/dma.h b/include/asm-arm/arch-aaec2000/dma.h
new file mode 100644
index 000000000000..28c890b4a1d3
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/dma.h
@@ -0,0 +1,17 @@
1/*
2 * linux/include/asm-arm/arch-aaec2000/dma.h
3 *
4 * Copyright (c) 2005 Nicolas Bellido Y Ortega
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_DMA_H
12#define __ASM_ARCH_DMA_H
13
14#define MAX_DMA_ADDRESS 0xffffffff
15#define MAX_DMA_CHANNELS 0
16
17#endif
diff --git a/include/asm-arm/arch-aaec2000/entry-macro.S b/include/asm-arm/arch-aaec2000/entry-macro.S
new file mode 100644
index 000000000000..df31313ab07e
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/entry-macro.S
@@ -0,0 +1,33 @@
1/*
2 * linux/include/asm-arm/arch-aaec2000/entry-macro.S
3 *
4 * Low-level IRQ helper for aaec-2000 based platforms
5 *
6 * Copyright (c) 2005 Nicolas Bellido Y Ortega
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
14 .macro disable_fiq
15 .endm
16
17 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
18 mov r4, #0xf8000000
19 add r4, r4, #0x00000500
20 mov \base, r4
21 ldr \irqstat, [\base, #0]
22 cmp \irqstat, #0
23 bne 1001f
24 ldr \irqnr, =NR_IRQS+1
25 b 1003f
261001: mov \irqnr, #0
271002: ands \tmp, \irqstat, #1
28 mov \irqstat, \irqstat, LSR #1
29 add \irqnr, \irqnr, #1
30 beq 1002b
31 sub \irqnr, \irqnr, #1
321003:
33 .endm
diff --git a/include/asm-arm/arch-aaec2000/hardware.h b/include/asm-arm/arch-aaec2000/hardware.h
new file mode 100644
index 000000000000..4c37219e030e
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/hardware.h
@@ -0,0 +1,49 @@
1/*
2 * linux/include/asm-arm/arch-aaec2000/hardware.h
3 *
4 * Copyright (c) 2005 Nicolas Bellido Y Ortega
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_HARDWARE_H
12#define __ASM_ARCH_HARDWARE_H
13
14#include <linux/config.h>
15
16/* The kernel is loaded at physical address 0xf8000000.
17 * We map the IO space a bit after
18 */
19#define PIO_APB_BASE 0x80000000
20#define VIO_APB_BASE 0xf8000000
21#define IO_APB_LENGTH 0x2000
22#define PIO_AHB_BASE 0x80002000
23#define VIO_AHB_BASE 0xf8002000
24#define IO_AHB_LENGTH 0x2000
25
26#define VIO_BASE VIO_APB_BASE
27#define PIO_BASE PIO_APB_BASE
28
29#define io_p2v(x) ( (x) - PIO_BASE + VIO_BASE )
30#define io_v2p(x) ( (x) + PIO_BASE - VIO_BASE )
31
32#ifndef __ASSEMBLY__
33
34#include <asm/types.h>
35
36/* FIXME: Is it needed to optimize this a la pxa ?? */
37#define __REG(x) (*((volatile u32 *)io_p2v(x)))
38#define __PREG(x) (io_v2p((u32)&(x)))
39
40#else /* __ASSEMBLY__ */
41
42#define __REG(x) io_p2v(x)
43#define __PREG(x) io_v2p(x)
44
45#endif
46
47#include "aaec2000.h"
48
49#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/include/asm-arm/arch-aaec2000/io.h b/include/asm-arm/arch-aaec2000/io.h
new file mode 100644
index 000000000000..c58a8d10425a
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/io.h
@@ -0,0 +1,19 @@
1/*
2 * linux/include/asm-arm/arch-aaec2000/io.h
3 *
4 * Copied from asm/arch/sa1100/io.h
5 */
6#ifndef __ASM_ARM_ARCH_IO_H
7#define __ASM_ARM_ARCH_IO_H
8
9#define IO_SPACE_LIMIT 0xffffffff
10
11/*
12 * We don't actually have real ISA nor PCI buses, but there is so many
13 * drivers out there that might just work if we fake them...
14 */
15#define __io(a) ((void __iomem *)(a))
16#define __mem_pci(a) (a)
17#define __mem_isa(a) (a)
18
19#endif
diff --git a/include/asm-arm/arch-aaec2000/irqs.h b/include/asm-arm/arch-aaec2000/irqs.h
new file mode 100644
index 000000000000..de252220e806
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/irqs.h
@@ -0,0 +1,46 @@
1/*
2 * linux/include/asm-arm/arch-aaec2000/irqs.h
3 *
4 * Copyright (c) 2005 Nicolas Bellido Y Ortega
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_IRQS_H
12#define __ASM_ARCH_IRQS_H
13
14
15#define INT_GPIOF0_FIQ 0 /* External GPIO Port F O Fast Interrupt Input */
16#define INT_BL_FIQ 1 /* Battery Low Fast Interrupt */
17#define INT_WE_FIQ 2 /* Watchdog Expired Fast Interrupt */
18#define INT_MV_FIQ 3 /* Media Changed Interrupt */
19#define INT_SC 4 /* Sound Codec Interrupt */
20#define INT_GPIO1 5 /* GPIO Port F Configurable Int 1 */
21#define INT_GPIO2 6 /* GPIO Port F Configurable Int 2 */
22#define INT_GPIO3 7 /* GPIO Port F Configurable Int 3 */
23#define INT_TMR1_OFL 8 /* Timer 1 Overflow Interrupt */
24#define INT_TMR2_OFL 9 /* Timer 2 Overflow Interrupt */
25#define INT_RTC_CM 10 /* RTC Compare Match Interrupt */
26#define INT_TICK 11 /* 64Hz Tick Interrupt */
27#define INT_UART1 12 /* UART1 Interrupt */
28#define INT_UART2 13 /* UART2 & Modem State Changed Interrupt */
29#define INT_LCD 14 /* LCD Interrupt */
30#define INT_SSI 15 /* SSI End of Transfer Interrupt */
31#define INT_UART3 16 /* UART3 Interrupt */
32#define INT_SCI 17 /* SCI Interrupt */
33#define INT_AAC 18 /* Advanced Audio Codec Interrupt */
34#define INT_MMC 19 /* MMC Interrupt */
35#define INT_USB 20 /* USB Interrupt */
36#define INT_DMA 21 /* DMA Interrupt */
37#define INT_TMR3_UOFL 22 /* Timer 3 Underflow Interrupt */
38#define INT_GPIO4 23 /* GPIO Port F Configurable Int 4 */
39#define INT_GPIO5 24 /* GPIO Port F Configurable Int 4 */
40#define INT_GPIO6 25 /* GPIO Port F Configurable Int 4 */
41#define INT_GPIO7 26 /* GPIO Port F Configurable Int 4 */
42#define INT_BMI 27 /* BMI Interrupt */
43
44#define NR_IRQS (INT_BMI + 1)
45
46#endif /* __ASM_ARCH_IRQS_H */
diff --git a/include/asm-arm/arch-aaec2000/memory.h b/include/asm-arm/arch-aaec2000/memory.h
new file mode 100644
index 000000000000..681b6a6171a1
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/memory.h
@@ -0,0 +1,73 @@
1/*
2 * linux/include/asm-arm/arch-aaec2000/memory.h
3 *
4 * Copyright (c) 2005 Nicolas Bellido Y Ortega
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_MEMORY_H
12#define __ASM_ARCH_MEMORY_H
13
14#include <linux/config.h>
15
16#define PHYS_OFFSET (0xf0000000UL)
17
18#define __virt_to_bus(x) __virt_to_phys(x)
19#define __bus_to_virt(x) __phys_to_virt(x)
20
21#ifdef CONFIG_DISCONTIGMEM
22
23/*
24 * The nodes are the followings:
25 *
26 * node 0: 0xf000.0000 - 0xf3ff.ffff
27 * node 1: 0xf400.0000 - 0xf7ff.ffff
28 * node 2: 0xf800.0000 - 0xfbff.ffff
29 * node 3: 0xfc00.0000 - 0xffff.ffff
30 */
31
32/*
33 * Given a kernel address, find the home node of the underlying memory.
34 */
35#define KVADDR_TO_NID(addr) \
36 (((unsigned long)(addr) - PAGE_OFFSET) >> NODE_MAX_MEM_SHIFT)
37
38/*
39 * Given a page frame number, convert it to a node id.
40 */
41#define PFN_TO_NID(pfn) \
42 (((pfn) - PHYS_PFN_OFFSET) >> (NODE_MAX_MEM_SHIFT - PAGE_SHIFT))
43
44/*
45 * Given a kaddr, ADDR_TO_MAPBASE finds the owning node of the memory
46 * and return the mem_map of that node.
47 */
48#define ADDR_TO_MAPBASE(kaddr) NODE_MEM_MAP(KVADDR_TO_NID(kaddr))
49
50/*
51 * Given a page frame number, find the owning node of the memory
52 * and return the mem_map of that node.
53 */
54#define PFN_TO_MAPBASE(pfn) NODE_MEM_MAP(PFN_TO_NID(pfn))
55
56/*
57 * Given a kaddr, LOCAL_MEM_MAP finds the owning node of the memory
58 * and returns the index corresponding to the appropriate page in the
59 * node's mem_map.
60 */
61#define LOCAL_MAP_NR(addr) \
62 (((unsigned long)(addr) & (NODE_MAX_MEM_SIZE - 1)) >> PAGE_SHIFT)
63
64#define NODE_MAX_MEM_SHIFT 26
65#define NODE_MAX_MEM_SIZE (1 << NODE_MAX_MEM_SHIFT)
66
67#else
68
69#define PFN_TO_NID(addr) (0)
70
71#endif /* CONFIG_DISCONTIGMEM */
72
73#endif /* __ASM_ARCH_MEMORY_H */
diff --git a/include/asm-arm/arch-aaec2000/param.h b/include/asm-arm/arch-aaec2000/param.h
new file mode 100644
index 000000000000..139936c2faf2
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/param.h
@@ -0,0 +1,15 @@
1/*
2 * linux/include/asm-arm/arch-aaec2000/param.h
3 *
4 * Copyright (c) 2005 Nicolas Bellido Y Ortega
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_PARAM_H
12#define __ASM_ARCH_PARAM_H
13
14#endif /* __ASM_ARCH_PARAM_H */
15
diff --git a/include/asm-arm/arch-aaec2000/system.h b/include/asm-arm/arch-aaec2000/system.h
new file mode 100644
index 000000000000..08de97b407a8
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/system.h
@@ -0,0 +1,24 @@
1/*
2 * linux/include/asm-arm/arch-aaed2000/system.h
3 *
4 * Copyright (c) 2005 Nicolas Bellido Y Ortega
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_SYSTEM_H
12#define __ASM_ARCH_SYSTEM_H
13
14static inline void arch_idle(void)
15{
16 cpu_do_idle();
17}
18
19static inline void arch_reset(char mode)
20{
21 cpu_reset(0);
22}
23
24#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/include/asm-arm/arch-aaec2000/timex.h b/include/asm-arm/arch-aaec2000/timex.h
new file mode 100644
index 000000000000..f5708b38fb7f
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/timex.h
@@ -0,0 +1,18 @@
1/*
2 * linux/include/asm-arm/arch-aaec2000/timex.h
3 *
4 * AAEC-2000 Architecture timex specification
5 *
6 * Copyright (c) 2005 Nicolas Bellido Y Ortega
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __ASM_ARCH_TIMEX_H
14#define __ASM_ARCH_TIMEX_H
15
16#define CLOCK_TICK_RATE 508000
17
18#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/include/asm-arm/arch-aaec2000/uncompress.h b/include/asm-arm/arch-aaec2000/uncompress.h
new file mode 100644
index 000000000000..fff0c94b75c4
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/uncompress.h
@@ -0,0 +1,47 @@
1/*
2 * linux/include/asm-arm/arch-aaec2000/uncompress.h
3 *
4 * Copyright (c) 2005 Nicolas Bellido Y Ortega
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_UNCOMPRESS_H
12#define __ASM_ARCH_UNCOMPRESS_H
13
14#include "hardware.h"
15
16#define UART(x) (*(volatile unsigned long *)(serial_port + (x)))
17
18static void putstr( const char *s )
19{
20 unsigned long serial_port;
21 do {
22 serial_port = _UART3_BASE;
23 if (UART(UART_CR) & UART_CR_EN) break;
24 serial_port = _UART1_BASE;
25 if (UART(UART_CR) & UART_CR_EN) break;
26 serial_port = _UART2_BASE;
27 if (UART(UART_CR) & UART_CR_EN) break;
28 return;
29 } while (0);
30
31 for (; *s; s++) {
32 /* wait for space in the UART's transmitter */
33 while ((UART(UART_SR) & UART_SR_TxFF));
34 /* send the character out. */
35 UART(UART_DR) = *s;
36 /* if a LF, also do CR... */
37 if (*s == 10) {
38 while ((UART(UART_SR) & UART_SR_TxFF));
39 UART(UART_DR) = 13;
40 }
41 }
42}
43
44#define arch_decomp_setup()
45#define arch_decomp_wdog()
46
47#endif /* __ASM_ARCH_UNCOMPRESS_H */
diff --git a/include/asm-arm/arch-aaec2000/vmalloc.h b/include/asm-arm/arch-aaec2000/vmalloc.h
new file mode 100644
index 000000000000..ecb991e2e4ff
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/vmalloc.h
@@ -0,0 +1,16 @@
1/*
2 * linux/include/asm-arm/arch-aaec2000/vmalloc.h
3 *
4 * Copyright (c) 2005 Nicolas Bellido Y Ortega
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_VMALLOC_H
12#define __ASM_ARCH_VMALLOC_H
13
14#define VMALLOC_END (PAGE_OFFSET + 0x10000000)
15
16#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/include/asm-arm/arch-integrator/platform.h b/include/asm-arm/arch-integrator/platform.h
index bd364f5a99bc..96ad3d2a66d1 100644
--- a/include/asm-arm/arch-integrator/platform.h
+++ b/include/asm-arm/arch-integrator/platform.h
@@ -293,7 +293,11 @@
293#define INTEGRATOR_DBG_SWITCH (INTEGRATOR_DBG_BASE + INTEGRATOR_DBG_SWITCH_OFFSET) 293#define INTEGRATOR_DBG_SWITCH (INTEGRATOR_DBG_BASE + INTEGRATOR_DBG_SWITCH_OFFSET)
294 294
295 295
296#if defined(CONFIG_ARCH_INTEGRATOR_AP)
296#define INTEGRATOR_GPIO_BASE 0x1B000000 /* GPIO */ 297#define INTEGRATOR_GPIO_BASE 0x1B000000 /* GPIO */
298#elif defined(CONFIG_ARCH_INTEGRATOR_CP)
299#define INTEGRATOR_GPIO_BASE 0xC9000000 /* GPIO */
300#endif
297 301
298/* ------------------------------------------------------------------------ 302/* ------------------------------------------------------------------------
299 * KMI keyboard/mouse definitions 303 * KMI keyboard/mouse definitions
diff --git a/include/asm-arm/arch-integrator/smp.h b/include/asm-arm/arch-integrator/smp.h
new file mode 100644
index 000000000000..0ec7093f7c37
--- /dev/null
+++ b/include/asm-arm/arch-integrator/smp.h
@@ -0,0 +1,19 @@
1#ifndef ASMARM_ARCH_SMP_H
2#define ASMARM_ARCH_SMP_H
3
4#include <linux/config.h>
5
6#include <asm/arch/hardware.h>
7#include <asm/io.h>
8
9#define hard_smp_processor_id() \
10 ({ \
11 unsigned int cpunum; \
12 __asm__("mrc p15, 0, %0, c0, c0, 5" \
13 : "=r" (cpunum)); \
14 cpunum &= 0x0F; \
15 })
16
17extern void secondary_scan_irqs(void);
18
19#endif
diff --git a/include/asm-arm/arch-ixp2000/io.h b/include/asm-arm/arch-ixp2000/io.h
index a8e3c2daefd6..083462668e18 100644
--- a/include/asm-arm/arch-ixp2000/io.h
+++ b/include/asm-arm/arch-ixp2000/io.h
@@ -75,8 +75,8 @@ static inline void insw(u32 ptr, void *buf, int length)
75 * Is this cycle meant for the CS8900? 75 * Is this cycle meant for the CS8900?
76 */ 76 */
77 if ((machine_is_ixdp2401() || machine_is_ixdp2801()) && 77 if ((machine_is_ixdp2401() || machine_is_ixdp2801()) &&
78 ((port >= IXDP2X01_CS8900_VIRT_BASE) && 78 (((u32)port >= (u32)IXDP2X01_CS8900_VIRT_BASE) &&
79 (port <= IXDP2X01_CS8900_VIRT_END))) { 79 ((u32)port <= (u32)IXDP2X01_CS8900_VIRT_END))) {
80 u8 *buf8 = (u8*)buf; 80 u8 *buf8 = (u8*)buf;
81 register u32 tmp32; 81 register u32 tmp32;
82 82
@@ -100,8 +100,8 @@ static inline void outsw(u32 ptr, void *buf, int length)
100 * Is this cycle meant for the CS8900? 100 * Is this cycle meant for the CS8900?
101 */ 101 */
102 if ((machine_is_ixdp2401() || machine_is_ixdp2801()) && 102 if ((machine_is_ixdp2401() || machine_is_ixdp2801()) &&
103 ((port >= IXDP2X01_CS8900_VIRT_BASE) && 103 (((u32)port >= (u32)IXDP2X01_CS8900_VIRT_BASE) &&
104 (port <= IXDP2X01_CS8900_VIRT_END))) { 104 ((u32)port <= (u32)IXDP2X01_CS8900_VIRT_END))) {
105 register u32 tmp32; 105 register u32 tmp32;
106 u8 *buf8 = (u8*)buf; 106 u8 *buf8 = (u8*)buf;
107 do { 107 do {
@@ -124,8 +124,8 @@ static inline u16 inw(u32 ptr)
124 * Is this cycle meant for the CS8900? 124 * Is this cycle meant for the CS8900?
125 */ 125 */
126 if ((machine_is_ixdp2401() || machine_is_ixdp2801()) && 126 if ((machine_is_ixdp2401() || machine_is_ixdp2801()) &&
127 ((port >= IXDP2X01_CS8900_VIRT_BASE) && 127 (((u32)port >= (u32)IXDP2X01_CS8900_VIRT_BASE) &&
128 (port <= IXDP2X01_CS8900_VIRT_END))) { 128 ((u32)port <= (u32)IXDP2X01_CS8900_VIRT_END))) {
129 return (u16)(*port); 129 return (u16)(*port);
130 } 130 }
131 131
@@ -137,8 +137,8 @@ static inline void outw(u16 value, u32 ptr)
137 register volatile u32 *port = (volatile u32 *)ptr; 137 register volatile u32 *port = (volatile u32 *)ptr;
138 138
139 if ((machine_is_ixdp2401() || machine_is_ixdp2801()) && 139 if ((machine_is_ixdp2401() || machine_is_ixdp2801()) &&
140 ((port >= IXDP2X01_CS8900_VIRT_BASE) && 140 (((u32)port >= (u32)IXDP2X01_CS8900_VIRT_BASE) &&
141 (port <= IXDP2X01_CS8900_VIRT_END))) { 141 ((u32)port <= (u32)IXDP2X01_CS8900_VIRT_END))) {
142 *port = value; 142 *port = value;
143 return; 143 return;
144 } 144 }
diff --git a/include/asm-arm/arch-ixp2000/ixp2000-regs.h b/include/asm-arm/arch-ixp2000/ixp2000-regs.h
index 6c56708d0ff0..a1d9e181b10f 100644
--- a/include/asm-arm/arch-ixp2000/ixp2000-regs.h
+++ b/include/asm-arm/arch-ixp2000/ixp2000-regs.h
@@ -363,6 +363,7 @@
363#define IXP2000_MIN_REV_MASK 0x0000000F 363#define IXP2000_MIN_REV_MASK 0x0000000F
364#define IXP2000_PROD_ID_MASK 0xFFFFFFFF 364#define IXP2000_PROD_ID_MASK 0xFFFFFFFF
365 365
366#define IXP2000_PRODUCT_ID GLOBAL_REG(0x00)
366#define IXP2000_MISC_CONTROL GLOBAL_REG(0x04) 367#define IXP2000_MISC_CONTROL GLOBAL_REG(0x04)
367#define IXP2000_MSF_CLK_CNTRL GLOBAL_REG(0x08) 368#define IXP2000_MSF_CLK_CNTRL GLOBAL_REG(0x08)
368#define IXP2000_RESET0 GLOBAL_REG(0x0c) 369#define IXP2000_RESET0 GLOBAL_REG(0x0c)
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index 39741d3c9a34..b5e54a9e9fa7 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -1296,6 +1296,7 @@
1296#define GPIO111_MMCDAT3 111 /* MMC DAT3 (PXA27x) */ 1296#define GPIO111_MMCDAT3 111 /* MMC DAT3 (PXA27x) */
1297#define GPIO111_MMCCS1 111 /* MMC Chip Select 1 (PXA27x) */ 1297#define GPIO111_MMCCS1 111 /* MMC Chip Select 1 (PXA27x) */
1298#define GPIO112_MMCCMD 112 /* MMC CMD (PXA27x) */ 1298#define GPIO112_MMCCMD 112 /* MMC CMD (PXA27x) */
1299#define GPIO113_I2S_SYSCLK 113 /* I2S System Clock (PXA27x) */
1299#define GPIO113_AC97_RESET_N 113 /* AC97 NRESET on (PXA27x) */ 1300#define GPIO113_AC97_RESET_N 113 /* AC97 NRESET on (PXA27x) */
1300 1301
1301/* GPIO alternate function mode & direction */ 1302/* GPIO alternate function mode & direction */
@@ -1428,6 +1429,7 @@
1428#define GPIO111_MMCDAT3_MD (111 | GPIO_ALT_FN_1_OUT) 1429#define GPIO111_MMCDAT3_MD (111 | GPIO_ALT_FN_1_OUT)
1429#define GPIO110_MMCCS1_MD (111 | GPIO_ALT_FN_1_OUT) 1430#define GPIO110_MMCCS1_MD (111 | GPIO_ALT_FN_1_OUT)
1430#define GPIO112_MMCCMD_MD (112 | GPIO_ALT_FN_1_OUT) 1431#define GPIO112_MMCCMD_MD (112 | GPIO_ALT_FN_1_OUT)
1432#define GPIO113_I2S_SYSCLK_MD (113 | GPIO_ALT_FN_1_OUT)
1431#define GPIO113_AC97_RESET_N_MD (113 | GPIO_ALT_FN_2_OUT) 1433#define GPIO113_AC97_RESET_N_MD (113 | GPIO_ALT_FN_2_OUT)
1432#define GPIO117_I2CSCL_MD (117 | GPIO_ALT_FN_1_OUT) 1434#define GPIO117_I2CSCL_MD (117 | GPIO_ALT_FN_1_OUT)
1433#define GPIO118_I2CSDA_MD (118 | GPIO_ALT_FN_1_IN) 1435#define GPIO118_I2CSDA_MD (118 | GPIO_ALT_FN_1_IN)
diff --git a/include/asm-arm/arch-versatile/hardware.h b/include/asm-arm/arch-versatile/hardware.h
index d5fb4a251e7f..41c1bee342ad 100644
--- a/include/asm-arm/arch-versatile/hardware.h
+++ b/include/asm-arm/arch-versatile/hardware.h
@@ -25,19 +25,26 @@
25#include <asm/sizes.h> 25#include <asm/sizes.h>
26#include <asm/arch/platform.h> 26#include <asm/arch/platform.h>
27 27
28// FIXME = PCI settings need to be fixed!!!!!
29
30/* 28/*
31 * Similar to above, but for PCI addresses (memory, IO, Config and the 29 * PCI space virtual addresses
32 * V3 chip itself). WARNING: this has to mirror definitions in platform.h
33 */ 30 */
34#define PCI_MEMORY_VADDR 0xe8000000 31#define VERSATILE_PCI_VIRT_BASE 0xe8000000
35#define PCI_CONFIG_VADDR 0xec000000 32#define VERSATILE_PCI_CFG_VIRT_BASE 0xe9000000
36#define PCI_V3_VADDR 0xed000000 33
37#define PCI_IO_VADDR 0xee000000 34#if 0
35#define VERSATILE_PCI_VIRT_MEM_BASE0 0xf4000000
36#define VERSATILE_PCI_VIRT_MEM_BASE1 0xf5000000
37#define VERSATILE_PCI_VIRT_MEM_BASE2 0xf6000000
38
39#define PCIO_BASE VERSATILE_PCI_VIRT_MEM_BASE0
40#define PCIMEM_BASE VERSATILE_PCI_VIRT_MEM_BASE1
41#endif
42
43/* CIK guesswork */
44#define PCIBIOS_MIN_IO 0x44000000
45#define PCIBIOS_MIN_MEM 0x50000000
38 46
39#define PCIO_BASE PCI_IO_VADDR 47#define pcibios_assign_all_busses() 1
40#define PCIMEM_BASE PCI_MEMORY_VADDR
41 48
42/* macro to get at IO space when running virtually */ 49/* macro to get at IO space when running virtually */
43#define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000) 50#define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000)
diff --git a/include/asm-arm/arch-versatile/io.h b/include/asm-arm/arch-versatile/io.h
index dbb7158788fc..9f895bf61494 100644
--- a/include/asm-arm/arch-versatile/io.h
+++ b/include/asm-arm/arch-versatile/io.h
@@ -20,7 +20,7 @@
20#ifndef __ASM_ARM_ARCH_IO_H 20#ifndef __ASM_ARM_ARCH_IO_H
21#define __ASM_ARM_ARCH_IO_H 21#define __ASM_ARM_ARCH_IO_H
22 22
23#define IO_SPACE_LIMIT 0xffff 23#define IO_SPACE_LIMIT 0xffffffff
24 24
25#define __io(a) ((void __iomem *)(a)) 25#define __io(a) ((void __iomem *)(a))
26#define __mem_pci(a) (a) 26#define __mem_pci(a) (a)
diff --git a/include/asm-arm/arch-versatile/platform.h b/include/asm-arm/arch-versatile/platform.h
index 2598d1f08548..cbdd9fb96332 100644
--- a/include/asm-arm/arch-versatile/platform.h
+++ b/include/asm-arm/arch-versatile/platform.h
@@ -76,7 +76,7 @@
76#define VERSATILE_SYS_NVFLAGSSET_OFFSET 0x38 76#define VERSATILE_SYS_NVFLAGSSET_OFFSET 0x38
77#define VERSATILE_SYS_NVFLAGSCLR_OFFSET 0x3C 77#define VERSATILE_SYS_NVFLAGSCLR_OFFSET 0x3C
78#define VERSATILE_SYS_RESETCTL_OFFSET 0x40 78#define VERSATILE_SYS_RESETCTL_OFFSET 0x40
79#define VERSATILE_SYS_PICCTL_OFFSET 0x44 79#define VERSATILE_SYS_PCICTL_OFFSET 0x44
80#define VERSATILE_SYS_MCI_OFFSET 0x48 80#define VERSATILE_SYS_MCI_OFFSET 0x48
81#define VERSATILE_SYS_FLASH_OFFSET 0x4C 81#define VERSATILE_SYS_FLASH_OFFSET 0x4C
82#define VERSATILE_SYS_CLCD_OFFSET 0x50 82#define VERSATILE_SYS_CLCD_OFFSET 0x50
@@ -114,7 +114,7 @@
114#define VERSATILE_SYS_NVFLAGSSET (VERSATILE_SYS_BASE + VERSATILE_SYS_NVFLAGSSET_OFFSET) 114#define VERSATILE_SYS_NVFLAGSSET (VERSATILE_SYS_BASE + VERSATILE_SYS_NVFLAGSSET_OFFSET)
115#define VERSATILE_SYS_NVFLAGSCLR (VERSATILE_SYS_BASE + VERSATILE_SYS_NVFLAGSCLR_OFFSET) 115#define VERSATILE_SYS_NVFLAGSCLR (VERSATILE_SYS_BASE + VERSATILE_SYS_NVFLAGSCLR_OFFSET)
116#define VERSATILE_SYS_RESETCTL (VERSATILE_SYS_BASE + VERSATILE_SYS_RESETCTL_OFFSET) 116#define VERSATILE_SYS_RESETCTL (VERSATILE_SYS_BASE + VERSATILE_SYS_RESETCTL_OFFSET)
117#define VERSATILE_SYS_PICCTL (VERSATILE_SYS_BASE + VERSATILE_SYS_PICCTL_OFFSET) 117#define VERSATILE_SYS_PCICTL (VERSATILE_SYS_BASE + VERSATILE_SYS_PCICTL_OFFSET)
118#define VERSATILE_SYS_MCI (VERSATILE_SYS_BASE + VERSATILE_SYS_MCI_OFFSET) 118#define VERSATILE_SYS_MCI (VERSATILE_SYS_BASE + VERSATILE_SYS_MCI_OFFSET)
119#define VERSATILE_SYS_FLASH (VERSATILE_SYS_BASE + VERSATILE_SYS_FLASH_OFFSET) 119#define VERSATILE_SYS_FLASH (VERSATILE_SYS_BASE + VERSATILE_SYS_FLASH_OFFSET)
120#define VERSATILE_SYS_CLCD (VERSATILE_SYS_BASE + VERSATILE_SYS_CLCD_OFFSET) 120#define VERSATILE_SYS_CLCD (VERSATILE_SYS_BASE + VERSATILE_SYS_CLCD_OFFSET)
@@ -225,7 +225,20 @@
225#define VERSATILE_SSMC_BASE 0x20000000 /* SSMC */ 225#define VERSATILE_SSMC_BASE 0x20000000 /* SSMC */
226#define VERSATILE_IB2_BASE 0x24000000 /* IB2 module */ 226#define VERSATILE_IB2_BASE 0x24000000 /* IB2 module */
227#define VERSATILE_MBX_BASE 0x40000000 /* MBX */ 227#define VERSATILE_MBX_BASE 0x40000000 /* MBX */
228
229/* PCI space */
228#define VERSATILE_PCI_BASE 0x41000000 /* PCI Interface */ 230#define VERSATILE_PCI_BASE 0x41000000 /* PCI Interface */
231#define VERSATILE_PCI_CFG_BASE 0x42000000
232#define VERSATILE_PCI_MEM_BASE0 0x44000000
233#define VERSATILE_PCI_MEM_BASE1 0x50000000
234#define VERSATILE_PCI_MEM_BASE2 0x60000000
235/* Sizes of above maps */
236#define VERSATILE_PCI_BASE_SIZE 0x01000000
237#define VERSATILE_PCI_CFG_BASE_SIZE 0x02000000
238#define VERSATILE_PCI_MEM_BASE0_SIZE 0x0c000000 /* 32Mb */
239#define VERSATILE_PCI_MEM_BASE1_SIZE 0x10000000 /* 256Mb */
240#define VERSATILE_PCI_MEM_BASE2_SIZE 0x10000000 /* 256Mb */
241
229#define VERSATILE_SDRAM67_BASE 0x70000000 /* SDRAM banks 6 and 7 */ 242#define VERSATILE_SDRAM67_BASE 0x70000000 /* SDRAM banks 6 and 7 */
230#define VERSATILE_LT_BASE 0x80000000 /* Logic Tile expansion */ 243#define VERSATILE_LT_BASE 0x80000000 /* Logic Tile expansion */
231 244
@@ -498,11 +511,17 @@
498/* 511/*
499 * IB2 Versatile/AB expansion board definitions 512 * IB2 Versatile/AB expansion board definitions
500 */ 513 */
501#define VERSATILE_IB2_CAMERA_BANK 0x24000000 514#define VERSATILE_IB2_CAMERA_BANK VERSATILE_IB2_BASE
502#define VERSATILE_IB2_KBD_DATAREG 0x25000000 515#define VERSATILE_IB2_KBD_DATAREG (VERSATILE_IB2_BASE + 0x01000000)
503#define VERSATILE_IB2_IER 0x26000000 /* for VICINTSOURCE27 */ 516
504#define VERSATILE_IB2_CTRL 0x27000000 517/* VICINTSOURCE27 */
505#define VERSATILE_IB2_STAT 0x27000004 518#define VERSATILE_IB2_INT_BASE (VERSATILE_IB2_BASE + 0x02000000)
519#define VERSATILE_IB2_IER (VERSATILE_IB2_INT_BASE + 0)
520#define VERSATILE_IB2_ISR (VERSATILE_IB2_INT_BASE + 4)
521
522#define VERSATILE_IB2_CTL_BASE (VERSATILE_IB2_BASE + 0x03000000)
523#define VERSATILE_IB2_CTRL (VERSATILE_IB2_CTL_BASE + 0)
524#define VERSATILE_IB2_STAT (VERSATILE_IB2_CTL_BASE + 4)
506#endif 525#endif
507 526
508#endif 527#endif
diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h
index 09ffeed507c2..035cdcff43d2 100644
--- a/include/asm-arm/cacheflush.h
+++ b/include/asm-arm/cacheflush.h
@@ -16,6 +16,9 @@
16 16
17#include <asm/mman.h> 17#include <asm/mman.h>
18#include <asm/glue.h> 18#include <asm/glue.h>
19#include <asm/shmparam.h>
20
21#define CACHE_COLOUR(vaddr) ((vaddr & (SHMLBA - 1)) >> PAGE_SHIFT)
19 22
20/* 23/*
21 * Cache Model 24 * Cache Model
diff --git a/include/asm-arm/elf.h b/include/asm-arm/elf.h
index cbceacbe5afa..a1696ba238d3 100644
--- a/include/asm-arm/elf.h
+++ b/include/asm-arm/elf.h
@@ -38,9 +38,9 @@ typedef struct user_fp elf_fpregset_t;
38 */ 38 */
39#define ELF_CLASS ELFCLASS32 39#define ELF_CLASS ELFCLASS32
40#ifdef __ARMEB__ 40#ifdef __ARMEB__
41#define ELF_DATA ELFDATA2MSB; 41#define ELF_DATA ELFDATA2MSB
42#else 42#else
43#define ELF_DATA ELFDATA2LSB; 43#define ELF_DATA ELFDATA2LSB
44#endif 44#endif
45#define ELF_ARCH EM_ARM 45#define ELF_ARCH EM_ARM
46 46
diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h
index 658ffa384fda..08a46302d265 100644
--- a/include/asm-arm/io.h
+++ b/include/asm-arm/io.h
@@ -273,6 +273,33 @@ extern void __iounmap(void __iomem *addr);
273#endif 273#endif
274 274
275/* 275/*
276 * io{read,write}{8,16,32} macros
277 */
278#define ioread8(p) ({ unsigned int __v = __raw_readb(p); __v; })
279#define ioread16(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(p)); __v; })
280#define ioread32(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(p)); __v; })
281
282#define iowrite8(v,p) __raw_writeb(v, p)
283#define iowrite16(v,p) __raw_writew(cpu_to_le16(v), p)
284#define iowrite32(v,p) __raw_writel(cpu_to_le32(v), p)
285
286#define ioread8_rep(p,d,c) __raw_readsb(p,d,c)
287#define ioread16_rep(p,d,c) __raw_readsw(p,d,c)
288#define ioread32_rep(p,d,c) __raw_readsl(p,d,c)
289
290#define iowrite8_rep(p,s,c) __raw_writesb(p,s,c)
291#define iowrite16_rep(p,s,c) __raw_writesw(p,s,c)
292#define iowrite32_rep(p,s,c) __raw_writesl(p,s,c)
293
294extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
295extern void ioport_unmap(void __iomem *addr);
296
297struct pci_dev;
298
299extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen);
300extern void pci_iounmap(struct pci_dev *dev, void __iomem *addr);
301
302/*
276 * can the hardware map this into one segment or not, given no other 303 * can the hardware map this into one segment or not, given no other
277 * constraints. 304 * constraints.
278 */ 305 */
diff --git a/include/asm-arm/smp.h b/include/asm-arm/smp.h
index f21fd8f6bcdd..6c6c60adbbaa 100644
--- a/include/asm-arm/smp.h
+++ b/include/asm-arm/smp.h
@@ -21,7 +21,7 @@
21# error "<asm-arm/smp.h> included in non-SMP build" 21# error "<asm-arm/smp.h> included in non-SMP build"
22#endif 22#endif
23 23
24#define smp_processor_id() (current_thread_info()->cpu) 24#define raw_smp_processor_id() (current_thread_info()->cpu)
25 25
26extern cpumask_t cpu_present_mask; 26extern cpumask_t cpu_present_mask;
27#define cpu_possible_map cpu_present_mask 27#define cpu_possible_map cpu_present_mask
@@ -55,4 +55,18 @@ extern void smp_cross_call(cpumask_t callmap);
55 */ 55 */
56extern int boot_secondary(unsigned int cpu, struct task_struct *); 56extern int boot_secondary(unsigned int cpu, struct task_struct *);
57 57
58/*
59 * Perform platform specific initialisation of the specified CPU.
60 */
61extern void platform_secondary_init(unsigned int cpu);
62
63/*
64 * Initial data for bringing up a secondary CPU.
65 */
66struct secondary_data {
67 unsigned long pgdir;
68 void *stack;
69};
70extern struct secondary_data secondary_data;
71
58#endif /* ifndef __ASM_ARM_SMP_H */ 72#endif /* ifndef __ASM_ARM_SMP_H */
diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h
index b13a8da4847b..39dd7008013c 100644
--- a/include/asm-arm/system.h
+++ b/include/asm-arm/system.h
@@ -104,6 +104,7 @@ extern void show_pte(struct mm_struct *mm, unsigned long addr);
104extern void __show_regs(struct pt_regs *); 104extern void __show_regs(struct pt_regs *);
105 105
106extern int cpu_architecture(void); 106extern int cpu_architecture(void);
107extern void cpu_init(void);
107 108
108#define set_cr(x) \ 109#define set_cr(x) \
109 __asm__ __volatile__( \ 110 __asm__ __volatile__( \
@@ -307,7 +308,7 @@ do { \
307({ \ 308({ \
308 unsigned long flags; \ 309 unsigned long flags; \
309 local_save_flags(flags); \ 310 local_save_flags(flags); \
310 flags & PSR_I_BIT; \ 311 (int)(flags & PSR_I_BIT); \
311}) 312})
312 313
313#ifdef CONFIG_SMP 314#ifdef CONFIG_SMP